The struct is a simple wraper around gbm_bo and brings no actual
benefit.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Rob Herring <robh@kernel.org>
Introduced back in 2012 with fd6acb97fb ("gbm: Create hooks for
dri2_loader_extension in dri backend") and hasn't been used since.
Seemingly a copy/paste thinko from development stage.
Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Rob Herring <robh@kernel.org>
radv: automake: list shared libraries after the static ones
Analogous to previous commit - the compiler can discard xcb + wayland
libs, since there is no user (the static libraries) before it on the
command line.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
anv: automake: list shared libraries after the static ones
The compiler can discard the shared ones from the link chain, since
there is no user (the static libraries) before it on the command line.
Cc: mesa-stable@lists.freedesktop.org
Reported-by: Laurent Carlier <lordheavym@gmail.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
freedreno: fix fence creation fail if no rendering
Android tries to create a FENCE_FD fence without any rendering. And
then falls over when that fails. So just always create an initial
batch.
Fixes: e4ad8695 ("freedreno: fix crash when flush() but no rendering")
Signed-off-by: Rob Clark <robdclark@gmail.com>
radeonsi: drop useless memcmp() check in si_set_blend_color()
cso_set_blend_color() already checks if the old state is different.
Only Nine uses pipe::set_blend_color() directly but I guess it
should use the cache too.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
llvmpipe: add LP_NEW_GS flag for updating vertex info
The vertex information we compute here is really dependent on the last
stage before FS. It just happened to work most of the time because new
GS tend to come with new VS and/or FS...
(The LP_NEW_GS flag was previously set but never used.)
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
svga: document some incorrect VGPU10 shader translation issues
We have a few mistakes in our shader translation code, but the virtual
GPU is forgiving.
Reviewed-by: Michal Krol <michal@vmware.com>
Reviewed-by: Neha Bhende<bhenden@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
This was just an accidental typo in the refactoring. The intention was
to try the blitter on gen4-5, not just gen4.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Fixes linking error in libOSmesa when using libunwind.
CXXLD libOSMesa.la
src/gallium/auxiliary/.libs/libgallium.a(u_debug_stack.o): In function `symbol_name_cached':
./src/gallium/auxiliary/util/u_debug_stack.c:87: undefined reference to `_ULx86_64_get_proc_name'
src/gallium/auxiliary/.libs/libgallium.a(u_debug_stack.o): In function `debug_backtrace_capture':
./src/gallium/auxiliary/util/u_debug_stack.c:114: undefined reference to `_Ux86_64_getcontext'
./src/gallium/auxiliary/util/u_debug_stack.c:115: undefined reference to `_ULx86_64_init_local'
./src/gallium/auxiliary/util/u_debug_stack.c:117: undefined reference to `_ULx86_64_step'
./src/gallium/auxiliary/util/u_debug_stack.c:123: undefined reference to `_ULx86_64_get_reg'
./src/gallium/auxiliary/util/u_debug_stack.c:124: undefined reference to `_ULx86_64_get_proc_info'
./src/gallium/auxiliary/util/u_debug_stack.c:120: undefined reference to `_ULx86_64_step'
collect2: error: ld returned 1 exit status
v2 : Fixes title and adds the original error it is fixing.
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
We keep the blit path because it's probably faster when it works.
However, now that we can use blorp, we can delete that nasty CPU
fall-back path.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
i965: Round copy size to the nearest block in intel_miptree_copy
The width and height of the copy don't have to be aligned to the block
size if they specify the right or bottom edges of the image. (See also
the comment and asserts right above). We need to round them up when we
do the division in order to get it 100% right.
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.0 17.1" <mesa-stable@lists.freedesktop.org>
We don't support replicated data clears yet. Those take a bit more work
and enabling replicated data clears in its own commit is probably better
for bisectibility anyway.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Due to complications with things such as URB setup on gen4-5, it's
easier to keep gen4 support in blorp completely internal to i965. This
makes things a bit awkward because that means there's a file in i965
that includes blorp_priv.h but it's either that or have a file in blorp
that includes brw_context.h.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
As part of enabling support for SF programs, we plumb the SF URB size
through to emit_urb_config. For now, it's always zero but, on gen4, it
may be something larger.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
intel/blorp: Use designated initializers to set up VERTEX_ELEMENTS
We also add a slot variable and use it as an iterator. This will make
it much easier to conditionally put something between the header and the
vertex position.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
It isn't supported prior to gen6 and, on gen6+, NIR will fuse the fmul
and fadd into an ffma automatically for us anyway.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
intel/blorp/blit: Add support for normalized coordinates
Gen5 and earlier can't do non-normalized coordinates so we need to
compensate in the shader. Fortunately, it's pretty easy plumb through.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
i965/clip: Make brw_clip_prog_key::interp_mode an array
Having it be a pointer means that we end up caching clip programs based
on a pointer to wm_prog_data rather than the actual interpolation modes.
We've been caching one clip program per FS ever since 91d61fbf7c
where Timothy rewrote brw_setup_vue_interpolation().
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
i965/sf: make brw_sf_prog_key::interp_mode an array
Having it be a pointer means that we end up caching clip programs based
on a pointer to wm_prog_data rather than the actual interpolation modes.
We've been caching one clip program per FS ever since 91d61fbf7c
where Timothy rewrote brw_setup_vue_interpolation().
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
intel/decoder: Handle gen4 VF_STATISTICS and PIPELINE_SELECT
These need special handling because they have no "DWord Length"
parameter and they have an unusual bias of 1.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Emil Velikov