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intel: Remove long-disabled meta readpixels, and associated meta support.

tags/7.8-rc1
Eric Anholt 15 лет назад
Родитель
c75e238434
Сommit
f9439e4a46
11 измененных файлов: 20 добавлений и 1178 удалений
Разделённый вид Показать статистику Diff
  1. 0
    2
      src/mesa/drivers/dri/i915/Makefile
  2. 0
    1
      src/mesa/drivers/dri/i915/i830_context.c
  3. 1
    5
      src/mesa/drivers/dri/i915/i830_context.h
  4. 0
    456
      src/mesa/drivers/dri/i915/i830_metaops.c
  5. 9
    30
      src/mesa/drivers/dri/i915/i830_vtbl.c
  6. 0
    1
      src/mesa/drivers/dri/i915/i915_context.c
  7. 1
    7
      src/mesa/drivers/dri/i915/i915_context.h
  8. 0
    507
      src/mesa/drivers/dri/i915/i915_metaops.c
  9. 9
    33
      src/mesa/drivers/dri/i915/i915_vtbl.c
  10. 0
    34
      src/mesa/drivers/dri/intel/intel_context.h
  11. 0
    102
      src/mesa/drivers/dri/intel/intel_pixel_read.c

+ 0
- 2
src/mesa/drivers/dri/i915/Makefile Просмотреть файл

@@ -8,7 +8,6 @@ MINIGLX_SOURCES = server/intel_dri.c

DRIVER_SOURCES = \
i830_context.c \
i830_metaops.c \
i830_state.c \
i830_texblend.c \
i830_texstate.c \
@@ -40,7 +39,6 @@ DRIVER_SOURCES = \
i915_debug.c \
i915_debug_fp.c \
i915_fragprog.c \
i915_metaops.c \
i915_program.c \
i915_state.c \
i915_vtbl.c \

+ 0
- 1
src/mesa/drivers/dri/i915/i830_context.c Просмотреть файл

@@ -105,7 +105,6 @@ i830CreateContext(const __GLcontextModes * mesaVis,
intel->verts = TNL_CONTEXT(ctx)->clipspace.vertex_buf;

i830InitState(i830);
i830InitMetaFuncs(i830);

_tnl_allow_vertex_fog(ctx, 1);
_tnl_allow_pixel_fog(ctx, 0);

+ 1
- 5
src/mesa/drivers/dri/i915/i830_context.h Просмотреть файл

@@ -144,7 +144,7 @@ struct i830_context
GLuint lodbias_tm0s3[MAX_TEXTURE_UNITS];
DECLARE_RENDERINPUTS(last_index_bitset);

struct i830_hw_state meta, initial, state, *current;
struct i830_hw_state initial, state, *current;
};


@@ -206,10 +206,6 @@ extern void i830EmitState(struct i830_context *i830);
extern void i830InitState(struct i830_context *i830);
extern void i830_update_provoking_vertex(GLcontext *ctx);

/* i830_metaops.c
*/
extern void i830InitMetaFuncs(struct i830_context *i830);

/*======================================================================
* Inline conversion functions. These are better-typed than the
* macros used previously:

+ 0
- 456
src/mesa/drivers/dri/i915/i830_metaops.c Просмотреть файл

@@ -1,456 +0,0 @@
/**************************************************************************
*
* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
**************************************************************************/

#include "main/glheader.h"
#include "main/enums.h"
#include "main/mtypes.h"
#include "main/macros.h"
#include "utils.h"

#include "intel_screen.h"
#include "intel_batchbuffer.h"
#include "intel_regions.h"

#include "i830_context.h"
#include "i830_reg.h"

/* A large amount of state doesn't need to be uploaded.
*/
#define ACTIVE (I830_UPLOAD_INVARIENT | \
I830_UPLOAD_CTX | \
I830_UPLOAD_BUFFERS | \
I830_UPLOAD_STIPPLE | \
I830_UPLOAD_TEXBLEND(0) | \
I830_UPLOAD_TEX(0))


#define SET_STATE( i830, STATE ) \
do { \
i830->current->emitted &= ~ACTIVE; \
i830->current = &i830->STATE; \
i830->current->emitted &= ~ACTIVE; \
} while (0)


static void
set_no_stencil_write(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);

/* ctx->Driver.Enable( ctx, GL_STENCIL_TEST, GL_FALSE )
*/
i830->meta.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_STENCIL_TEST;
i830->meta.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_STENCIL_WRITE;
i830->meta.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_STENCIL_TEST;
i830->meta.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_STENCIL_WRITE;

i830->meta.emitted &= ~I830_UPLOAD_CTX;
}

static void
set_no_depth_write(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);

/* ctx->Driver.Enable( ctx, GL_DEPTH_TEST, GL_FALSE )
*/
i830->meta.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_DEPTH_TEST_MASK;
i830->meta.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DIS_DEPTH_WRITE_MASK;
i830->meta.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_DEPTH_TEST;
i830->meta.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DEPTH_WRITE;

i830->meta.emitted &= ~I830_UPLOAD_CTX;
}

/* Set depth unit to replace.
*/
static void
set_depth_replace(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);

/* ctx->Driver.Enable( ctx, GL_DEPTH_TEST, GL_FALSE )
* ctx->Driver.DepthMask( ctx, GL_TRUE )
*/
i830->meta.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_DEPTH_TEST_MASK;
i830->meta.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DIS_DEPTH_WRITE_MASK;
i830->meta.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_DEPTH_TEST;
i830->meta.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DEPTH_WRITE;

/* ctx->Driver.DepthFunc( ctx, GL_ALWAYS )
*/
i830->meta.Ctx[I830_CTXREG_STATE3] &= ~DEPTH_TEST_FUNC_MASK;
i830->meta.Ctx[I830_CTXREG_STATE3] |= (ENABLE_DEPTH_TEST_FUNC |
DEPTH_TEST_FUNC
(COMPAREFUNC_ALWAYS));

i830->meta.emitted &= ~I830_UPLOAD_CTX;
}


/* Set stencil unit to replace always with the reference value.
*/
static void
set_stencil_replace(struct intel_context *intel,
GLuint s_mask, GLuint s_clear)
{
struct i830_context *i830 = i830_context(&intel->ctx);

/* ctx->Driver.Enable( ctx, GL_STENCIL_TEST, GL_TRUE )
*/
i830->meta.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_STENCIL_TEST;
i830->meta.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_STENCIL_WRITE;

/* ctx->Driver.StencilMask( ctx, s_mask )
*/
i830->meta.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
i830->meta.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
STENCIL_WRITE_MASK((s_mask &
0xff)));

/* ctx->Driver.StencilOp( ctx, GL_REPLACE, GL_REPLACE, GL_REPLACE )
*/
i830->meta.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_OPS_MASK);
i830->meta.Ctx[I830_CTXREG_STENCILTST] |=
(ENABLE_STENCIL_PARMS |
STENCIL_FAIL_OP(STENCILOP_REPLACE) |
STENCIL_PASS_DEPTH_FAIL_OP(STENCILOP_REPLACE) |
STENCIL_PASS_DEPTH_PASS_OP(STENCILOP_REPLACE));

/* ctx->Driver.StencilFunc( ctx, GL_ALWAYS, s_clear, ~0 )
*/
i830->meta.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
i830->meta.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
STENCIL_TEST_MASK(0xff));

i830->meta.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_REF_VALUE_MASK |
ENABLE_STENCIL_TEST_FUNC_MASK);
i830->meta.Ctx[I830_CTXREG_STENCILTST] |=
(ENABLE_STENCIL_REF_VALUE |
ENABLE_STENCIL_TEST_FUNC |
STENCIL_REF_VALUE((s_clear & 0xff)) |
STENCIL_TEST_FUNC(COMPAREFUNC_ALWAYS));



i830->meta.emitted &= ~I830_UPLOAD_CTX;
}


static void
set_color_mask(struct intel_context *intel, GLboolean state)
{
struct i830_context *i830 = i830_context(&intel->ctx);

const GLuint mask = ((1 << WRITEMASK_RED_SHIFT) |
(1 << WRITEMASK_GREEN_SHIFT) |
(1 << WRITEMASK_BLUE_SHIFT) |
(1 << WRITEMASK_ALPHA_SHIFT));

i830->meta.Ctx[I830_CTXREG_ENABLES_2] &= ~mask;

if (state) {
i830->meta.Ctx[I830_CTXREG_ENABLES_2] |=
(i830->state.Ctx[I830_CTXREG_ENABLES_2] & mask);
}

i830->meta.emitted &= ~I830_UPLOAD_CTX;
}

/* Installs a one-stage passthrough texture blend pipeline. Is there
* more that can be done to turn off texturing?
*/
static void
set_no_texture(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);
static const struct gl_tex_env_combine_state comb = {
GL_NONE, GL_NONE,
{GL_TEXTURE, 0, 0,}, {GL_TEXTURE, 0, 0,},
{GL_SRC_COLOR, 0, 0}, {GL_SRC_ALPHA, 0, 0},
0, 0, 0, 0
};

i830->meta.TexBlendWordsUsed[0] =
i830SetTexEnvCombine(i830, &comb, 0, TEXBLENDARG_TEXEL0,
i830->meta.TexBlend[0], NULL);

i830->meta.TexBlend[0][0] |= TEXOP_LAST_STAGE;
i830->meta.emitted &= ~I830_UPLOAD_TEXBLEND(0);
}

/* Set up a single element blend stage for 'replace' texturing with no
* funny ops.
*/
static void
set_texture_blend_replace(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);
static const struct gl_tex_env_combine_state comb = {
GL_REPLACE, GL_REPLACE,
{GL_TEXTURE, GL_TEXTURE, GL_TEXTURE,}, {GL_TEXTURE, GL_TEXTURE,
GL_TEXTURE,},
{GL_SRC_COLOR, GL_SRC_COLOR, GL_SRC_COLOR}, {GL_SRC_ALPHA, GL_SRC_ALPHA,
GL_SRC_ALPHA},
0, 0, 1, 1
};

i830->meta.TexBlendWordsUsed[0] =
i830SetTexEnvCombine(i830, &comb, 0, TEXBLENDARG_TEXEL0,
i830->meta.TexBlend[0], NULL);

i830->meta.TexBlend[0][0] |= TEXOP_LAST_STAGE;
i830->meta.emitted &= ~I830_UPLOAD_TEXBLEND(0);

/* fprintf(stderr, "%s: TexBlendWordsUsed[0]: %d\n", */
/* __FUNCTION__, i830->meta.TexBlendWordsUsed[0]); */
}



/* Set up an arbitary piece of memory as a rectangular texture
* (including the front or back buffer).
*/
static GLboolean
set_tex_rect_source(struct intel_context *intel,
dri_bo *buffer,
GLuint offset,
GLuint pitch, GLuint height, GLenum format, GLenum type)
{
struct i830_context *i830 = i830_context(&intel->ctx);
GLuint *setup = i830->meta.Tex[0];
GLint numLevels = 1;
GLuint textureFormat;
GLuint cpp;

/* A full implementation of this would do the upload through
* glTexImage2d, and get all the conversion operations at that
* point. We are restricted, but still at least have access to the
* fragment program swizzle.
*/
switch (format) {
case GL_BGRA:
switch (type) {
case GL_UNSIGNED_INT_8_8_8_8_REV:
case GL_UNSIGNED_BYTE:
textureFormat = (MAPSURF_32BIT | MT_32BIT_ARGB8888);
cpp = 4;
break;
default:
return GL_FALSE;
}
break;
case GL_RGBA:
switch (type) {
case GL_UNSIGNED_INT_8_8_8_8_REV:
case GL_UNSIGNED_BYTE:
textureFormat = (MAPSURF_32BIT | MT_32BIT_ABGR8888);
cpp = 4;
break;
default:
return GL_FALSE;
}
break;
case GL_BGR:
switch (type) {
case GL_UNSIGNED_SHORT_5_6_5_REV:
textureFormat = (MAPSURF_16BIT | MT_16BIT_RGB565);
cpp = 2;
break;
default:
return GL_FALSE;
}
break;
case GL_RGB:
switch (type) {
case GL_UNSIGNED_SHORT_5_6_5:
textureFormat = (MAPSURF_16BIT | MT_16BIT_RGB565);
cpp = 2;
break;
default:
return GL_FALSE;
}
break;

default:
return GL_FALSE;
}

i830->meta.tex_buffer[0] = buffer;
i830->meta.tex_offset[0] = offset;

setup[I830_TEXREG_TM0LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_2 |
(LOAD_TEXTURE_MAP0 << 0) | 4);
setup[I830_TEXREG_TM0S1] = (((height - 1) << TM0S1_HEIGHT_SHIFT) |
((pitch - 1) << TM0S1_WIDTH_SHIFT) |
textureFormat);
setup[I830_TEXREG_TM0S2] =
(((((pitch * cpp) / 4) -
1) << TM0S2_PITCH_SHIFT) | TM0S2_CUBE_FACE_ENA_MASK);

setup[I830_TEXREG_TM0S3] =
((((numLevels -
1) *
4) << TM0S3_MIN_MIP_SHIFT) | (FILTER_NEAREST <<
TM0S3_MIN_FILTER_SHIFT) |
(MIPFILTER_NONE << TM0S3_MIP_FILTER_SHIFT) | (FILTER_NEAREST <<
TM0S3_MAG_FILTER_SHIFT));

setup[I830_TEXREG_CUBE] = (_3DSTATE_MAP_CUBE | MAP_UNIT(0));

setup[I830_TEXREG_MCS] = (_3DSTATE_MAP_COORD_SET_CMD |
MAP_UNIT(0) |
ENABLE_TEXCOORD_PARAMS |
TEXCOORDS_ARE_IN_TEXELUNITS |
TEXCOORDTYPE_CARTESIAN |
ENABLE_ADDR_V_CNTL |
TEXCOORD_ADDR_V_MODE(TEXCOORDMODE_WRAP) |
ENABLE_ADDR_U_CNTL |
TEXCOORD_ADDR_U_MODE(TEXCOORDMODE_WRAP));

i830->meta.emitted &= ~I830_UPLOAD_TEX(0);
return GL_TRUE;
}


static void
set_vertex_format(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);
i830->meta.Ctx[I830_CTXREG_VF] = (_3DSTATE_VFT0_CMD |
VFT0_TEX_COUNT(1) |
VFT0_DIFFUSE | VFT0_XYZ);
i830->meta.Ctx[I830_CTXREG_VF2] = (_3DSTATE_VFT1_CMD |
VFT1_TEX0_FMT(TEXCOORDFMT_2D) |
VFT1_TEX1_FMT(TEXCOORDFMT_2D) |
VFT1_TEX2_FMT(TEXCOORDFMT_2D) |
VFT1_TEX3_FMT(TEXCOORDFMT_2D));
i830->meta.emitted &= ~I830_UPLOAD_CTX;
}


static void
meta_import_pixel_state(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);

i830->meta.Ctx[I830_CTXREG_STATE1] = i830->state.Ctx[I830_CTXREG_STATE1];
i830->meta.Ctx[I830_CTXREG_STATE2] = i830->state.Ctx[I830_CTXREG_STATE2];
i830->meta.Ctx[I830_CTXREG_STATE3] = i830->state.Ctx[I830_CTXREG_STATE3];
i830->meta.Ctx[I830_CTXREG_STATE4] = i830->state.Ctx[I830_CTXREG_STATE4];
i830->meta.Ctx[I830_CTXREG_STATE5] = i830->state.Ctx[I830_CTXREG_STATE5];
i830->meta.Ctx[I830_CTXREG_IALPHAB] = i830->state.Ctx[I830_CTXREG_IALPHAB];
i830->meta.Ctx[I830_CTXREG_STENCILTST] =
i830->state.Ctx[I830_CTXREG_STENCILTST];
i830->meta.Ctx[I830_CTXREG_ENABLES_1] =
i830->state.Ctx[I830_CTXREG_ENABLES_1];
i830->meta.Ctx[I830_CTXREG_ENABLES_2] =
i830->state.Ctx[I830_CTXREG_ENABLES_2];
i830->meta.Ctx[I830_CTXREG_AA] = i830->state.Ctx[I830_CTXREG_AA];
i830->meta.Ctx[I830_CTXREG_FOGCOLOR] =
i830->state.Ctx[I830_CTXREG_FOGCOLOR];
i830->meta.Ctx[I830_CTXREG_BLENDCOLOR0] =
i830->state.Ctx[I830_CTXREG_BLENDCOLOR0];
i830->meta.Ctx[I830_CTXREG_BLENDCOLOR1] =
i830->state.Ctx[I830_CTXREG_BLENDCOLOR1];
i830->meta.Ctx[I830_CTXREG_MCSB0] = i830->state.Ctx[I830_CTXREG_MCSB0];
i830->meta.Ctx[I830_CTXREG_MCSB1] = i830->state.Ctx[I830_CTXREG_MCSB1];


i830->meta.Ctx[I830_CTXREG_STATE3] &= ~CULLMODE_MASK;
i830->meta.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
i830->meta.emitted &= ~I830_UPLOAD_CTX;


i830->meta.Buffer[I830_DESTREG_SENABLE] =
i830->state.Buffer[I830_DESTREG_SENABLE];
i830->meta.Buffer[I830_DESTREG_SR1] = i830->state.Buffer[I830_DESTREG_SR1];
i830->meta.Buffer[I830_DESTREG_SR2] = i830->state.Buffer[I830_DESTREG_SR2];
i830->meta.emitted &= ~I830_UPLOAD_BUFFERS;
}



/* Select between front and back draw buffers.
*/
static void
meta_draw_region(struct intel_context *intel,
struct intel_region *color_region,
struct intel_region *depth_region)
{
struct i830_context *i830 = i830_context(&intel->ctx);

i830_state_draw_region(intel, &i830->meta, color_region, depth_region);
}


/* Operations where the 3D engine is decoupled temporarily from the
* current GL state and used for other purposes than simply rendering
* incoming triangles.
*/
static void
install_meta_state(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);
memcpy(&i830->meta, &i830->initial, sizeof(i830->meta));

i830->meta.active = ACTIVE;
i830->meta.emitted = 0;

SET_STATE(i830, meta);
set_vertex_format(intel);
set_no_texture(intel);
}

static void
leave_meta_state(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);
intel_region_release(&i830->meta.draw_region);
intel_region_release(&i830->meta.depth_region);
/* intel_region_release(intel, &i830->meta.tex_region[0]); */
SET_STATE(i830, state);
}



void
i830InitMetaFuncs(struct i830_context *i830)
{
i830->intel.vtbl.install_meta_state = install_meta_state;
i830->intel.vtbl.leave_meta_state = leave_meta_state;
i830->intel.vtbl.meta_no_depth_write = set_no_depth_write;
i830->intel.vtbl.meta_no_stencil_write = set_no_stencil_write;
i830->intel.vtbl.meta_stencil_replace = set_stencil_replace;
i830->intel.vtbl.meta_depth_replace = set_depth_replace;
i830->intel.vtbl.meta_color_mask = set_color_mask;
i830->intel.vtbl.meta_no_texture = set_no_texture;
i830->intel.vtbl.meta_texture_blend_replace = set_texture_blend_replace;
i830->intel.vtbl.meta_tex_rect_source = set_tex_rect_source;
i830->intel.vtbl.meta_draw_region = meta_draw_region;
i830->intel.vtbl.meta_import_pixel_state = meta_import_pixel_state;
}

+ 9
- 30
src/mesa/drivers/dri/i915/i830_vtbl.c Просмотреть файл

@@ -541,10 +541,6 @@ i830_emit_state(struct intel_context *intel)
I915_GEM_DOMAIN_SAMPLER, 0,
state->tex_offset[i]);
}
else if (state == &i830->meta) {
assert(i == 0);
OUT_BATCH(0);
}
else {
OUT_BATCH(state->tex_offset[i]);
}
@@ -579,8 +575,6 @@ i830_destroy_context(struct intel_context *intel)

intel_region_release(&i830->state.draw_region);
intel_region_release(&i830->state.depth_region);
intel_region_release(&i830->meta.draw_region);
intel_region_release(&i830->meta.depth_region);
intel_region_release(&i830->initial.draw_region);
intel_region_release(&i830->initial.depth_region);

@@ -594,24 +588,22 @@ i830_destroy_context(struct intel_context *intel)
_tnl_free_vertices(&intel->ctx);
}


void
i830_state_draw_region(struct intel_context *intel,
struct i830_hw_state *state,
struct intel_region *color_region,
struct intel_region *depth_region)
static void
i830_set_draw_region(struct intel_context *intel,
struct intel_region *color_regions[],
struct intel_region *depth_region,
GLuint num_regions)
{
struct i830_context *i830 = i830_context(&intel->ctx);
GLcontext *ctx = &intel->ctx;
struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[0];
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
GLuint value;
struct i830_hw_state *state = &i830->state;

ASSERT(state == &i830->state || state == &i830->meta);

if (state->draw_region != color_region) {
if (state->draw_region != color_regions[0]) {
intel_region_release(&state->draw_region);
intel_region_reference(&state->draw_region, color_region);
intel_region_reference(&state->draw_region, color_regions[0]);
}
if (state->depth_region != depth_region) {
intel_region_release(&state->depth_region);
@@ -622,7 +614,7 @@ i830_state_draw_region(struct intel_context *intel,
* Set stride/cpp values
*/
i915_set_buf_info_for_region(&state->Buffer[I830_DESTREG_CBUFADDR0],
color_region, BUF_3D_ID_COLOR_BACK);
color_regions[0], BUF_3D_ID_COLOR_BACK);

i915_set_buf_info_for_region(&state->Buffer[I830_DESTREG_DBUFADDR0],
depth_region, BUF_3D_ID_DEPTH);
@@ -672,19 +664,6 @@ i830_state_draw_region(struct intel_context *intel,
state->Buffer[I830_DESTREG_DRAWRECT5] = 0;

I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);


}


static void
i830_set_draw_region(struct intel_context *intel,
struct intel_region *color_regions[],
struct intel_region *depth_region,
GLuint num_regions)
{
struct i830_context *i830 = i830_context(&intel->ctx);
i830_state_draw_region(intel, &i830->state, color_regions[0], depth_region);
}

/* This isn't really handled at the moment.

+ 0
- 1
src/mesa/drivers/dri/i915/i915_context.c Просмотреть файл

@@ -111,7 +111,6 @@ i915CreateContext(const __GLcontextModes * mesaVis,
_mesa_printf("\ntexmem-0-3 branch\n\n");

i915InitVtbl(i915);
i915InitMetaFuncs(i915);

i915InitDriverFunctions(&functions);


+ 1
- 7
src/mesa/drivers/dri/i915/i915_context.h Просмотреть файл

@@ -259,7 +259,7 @@ struct i915_context

struct i915_fragment_program *current_program;

struct i915_hw_state meta, initial, state, *current;
struct i915_hw_state initial, state, *current;
};


@@ -345,12 +345,6 @@ extern void i915_update_provoking_vertex(GLcontext *ctx);
extern void i915UpdateTextureState(struct intel_context *intel);
extern void i915InitTextureFuncs(struct dd_function_table *functions);

/*======================================================================
* i915_metaops.c
*/
void i915InitMetaFuncs(struct i915_context *i915);


/*======================================================================
* i915_fragprog.c
*/

+ 0
- 507
src/mesa/drivers/dri/i915/i915_metaops.c Просмотреть файл

@@ -1,507 +0,0 @@
/**************************************************************************
*
* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
**************************************************************************/

#include "main/glheader.h"
#include "main/enums.h"
#include "main/mtypes.h"
#include "main/macros.h"
#include "utils.h"

#include "intel_screen.h"
#include "intel_batchbuffer.h"
#include "intel_regions.h"

#include "i915_context.h"
#include "i915_reg.h"

/* We touch almost everything:
*/
#define ACTIVE (I915_UPLOAD_INVARIENT | \
I915_UPLOAD_CTX | \
I915_UPLOAD_BUFFERS | \
I915_UPLOAD_STIPPLE | \
I915_UPLOAD_PROGRAM | \
I915_UPLOAD_FOG | \
I915_UPLOAD_TEX(0))

#define SET_STATE( i915, STATE ) \
do { \
i915->current->emitted &= ~ACTIVE; \
i915->current = &i915->STATE; \
i915->current->emitted &= ~ACTIVE; \
} while (0)


static void
meta_no_stencil_write(struct intel_context *intel)
{
struct i915_context *i915 = i915_context(&intel->ctx);

/* ctx->Driver.Enable( ctx, GL_STENCIL_TEST, GL_FALSE )
*/
i915->meta.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_TEST_ENABLE |
S5_STENCIL_WRITE_ENABLE);

i915->meta.emitted &= ~I915_UPLOAD_CTX;
}

static void
meta_no_depth_write(struct intel_context *intel)
{
struct i915_context *i915 = i915_context(&intel->ctx);

/* ctx->Driver.Enable( ctx, GL_DEPTH_TEST, GL_FALSE )
*/
i915->meta.Ctx[I915_CTXREG_LIS6] &= ~(S6_DEPTH_TEST_ENABLE |
S6_DEPTH_WRITE_ENABLE);

i915->meta.emitted &= ~I915_UPLOAD_CTX;
}

static void
meta_depth_replace(struct intel_context *intel)
{
struct i915_context *i915 = i915_context(&intel->ctx);

/* ctx->Driver.Enable( ctx, GL_DEPTH_TEST, GL_TRUE )
* ctx->Driver.DepthMask( ctx, GL_TRUE )
*/
i915->meta.Ctx[I915_CTXREG_LIS6] |= (S6_DEPTH_TEST_ENABLE |
S6_DEPTH_WRITE_ENABLE);

/* ctx->Driver.DepthFunc( ctx, GL_ALWAYS )
*/
i915->meta.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_FUNC_MASK;
i915->meta.Ctx[I915_CTXREG_LIS6] |=
COMPAREFUNC_ALWAYS << S6_DEPTH_TEST_FUNC_SHIFT;

i915->meta.emitted &= ~I915_UPLOAD_CTX;
}


/* Set stencil unit to replace always with the reference value.
*/
static void
meta_stencil_replace(struct intel_context *intel,
GLuint s_mask, GLuint s_clear)
{
struct i915_context *i915 = i915_context(&intel->ctx);
GLuint op = STENCILOP_REPLACE;
GLuint func = COMPAREFUNC_ALWAYS;

/* ctx->Driver.Enable( ctx, GL_STENCIL_TEST, GL_TRUE )
*/
i915->meta.Ctx[I915_CTXREG_LIS5] |= (S5_STENCIL_TEST_ENABLE |
S5_STENCIL_WRITE_ENABLE);

/* ctx->Driver.StencilMask( ctx, s_mask )
*/
i915->meta.Ctx[I915_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;

i915->meta.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
STENCIL_WRITE_MASK(s_mask));

/* ctx->Driver.StencilOp( ctx, GL_REPLACE, GL_REPLACE, GL_REPLACE )
*/
i915->meta.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_FAIL_MASK |
S5_STENCIL_PASS_Z_FAIL_MASK |
S5_STENCIL_PASS_Z_PASS_MASK);

i915->meta.Ctx[I915_CTXREG_LIS5] |= ((op << S5_STENCIL_FAIL_SHIFT) |
(op << S5_STENCIL_PASS_Z_FAIL_SHIFT) |
(op << S5_STENCIL_PASS_Z_PASS_SHIFT));


/* ctx->Driver.StencilFunc( ctx, GL_ALWAYS, s_ref, ~0 )
*/
i915->meta.Ctx[I915_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
i915->meta.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
STENCIL_TEST_MASK(0xff));

i915->meta.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_REF_MASK |
S5_STENCIL_TEST_FUNC_MASK);

i915->meta.Ctx[I915_CTXREG_LIS5] |= ((s_clear << S5_STENCIL_REF_SHIFT) |
(func << S5_STENCIL_TEST_FUNC_SHIFT));


i915->meta.emitted &= ~I915_UPLOAD_CTX;
}


static void
meta_color_mask(struct intel_context *intel, GLboolean state)
{
struct i915_context *i915 = i915_context(&intel->ctx);
const GLuint mask = (S5_WRITEDISABLE_RED |
S5_WRITEDISABLE_GREEN |
S5_WRITEDISABLE_BLUE | S5_WRITEDISABLE_ALPHA);

/* Copy colormask state from "regular" hw context.
*/
if (state) {
i915->meta.Ctx[I915_CTXREG_LIS5] &= ~mask;
i915->meta.Ctx[I915_CTXREG_LIS5] |=
(i915->state.Ctx[I915_CTXREG_LIS5] & mask);
}
else
i915->meta.Ctx[I915_CTXREG_LIS5] |= mask;

i915->meta.emitted &= ~I915_UPLOAD_CTX;
}



static void
meta_import_pixel_state(struct intel_context *intel)
{
struct i915_context *i915 = i915_context(&intel->ctx);
memcpy(i915->meta.Fog, i915->state.Fog, I915_FOG_SETUP_SIZE * 4);

i915->meta.Ctx[I915_CTXREG_LIS5] = i915->state.Ctx[I915_CTXREG_LIS5];
i915->meta.Ctx[I915_CTXREG_LIS6] = i915->state.Ctx[I915_CTXREG_LIS6];
i915->meta.Ctx[I915_CTXREG_STATE4] = i915->state.Ctx[I915_CTXREG_STATE4];
i915->meta.Ctx[I915_CTXREG_BLENDCOLOR1] =
i915->state.Ctx[I915_CTXREG_BLENDCOLOR1];
i915->meta.Ctx[I915_CTXREG_IAB] = i915->state.Ctx[I915_CTXREG_IAB];

i915->meta.Buffer[I915_DESTREG_SENABLE] =
i915->state.Buffer[I915_DESTREG_SENABLE];
i915->meta.Buffer[I915_DESTREG_SR1] = i915->state.Buffer[I915_DESTREG_SR1];
i915->meta.Buffer[I915_DESTREG_SR2] = i915->state.Buffer[I915_DESTREG_SR2];

i915->meta.emitted &= ~I915_UPLOAD_FOG;
i915->meta.emitted &= ~I915_UPLOAD_BUFFERS;
i915->meta.emitted &= ~I915_UPLOAD_CTX;
}




#define REG( type, nr ) (((type)<<5)|(nr))

#define REG_R(x) REG(REG_TYPE_R, x)
#define REG_T(x) REG(REG_TYPE_T, x)
#define REG_CONST(x) REG(REG_TYPE_CONST, x)
#define REG_S(x) REG(REG_TYPE_S, x)
#define REG_OC REG(REG_TYPE_OC, 0)
#define REG_OD REG(REG_TYPE_OD, 0)
#define REG_U(x) REG(REG_TYPE_U, x)

#define REG_T_DIFFUSE REG(REG_TYPE_T, T_DIFFUSE)
#define REG_T_SPECULAR REG(REG_TYPE_T, T_SPECULAR)
#define REG_T_FOG_W REG(REG_TYPE_T, T_FOG_W)
#define REG_T_TEX(x) REG(REG_TYPE_T, x)


#define A0_DEST_REG( reg ) ( (reg) << A0_DEST_NR_SHIFT )
#define A0_SRC0_REG( reg ) ( (reg) << A0_SRC0_NR_SHIFT )
#define A1_SRC1_REG( reg ) ( (reg) << A1_SRC1_NR_SHIFT )
#define A1_SRC2_REG( reg ) ( (reg) << A1_SRC2_NR_SHIFT )
#define A2_SRC2_REG( reg ) ( (reg) << A2_SRC2_NR_SHIFT )
#define D0_DECL_REG( reg ) ( (reg) << D0_NR_SHIFT )
#define T0_DEST_REG( reg ) ( (reg) << T0_DEST_NR_SHIFT )

#define T0_SAMPLER( unit ) ((unit)<<T0_SAMPLER_NR_SHIFT)

#define T1_ADDRESS_REG( type, nr ) (((type)<<T1_ADDRESS_REG_TYPE_SHIFT)| \
((nr)<<T1_ADDRESS_REG_NR_SHIFT))


#define A1_SRC0_XYZW ((SRC_X << A1_SRC0_CHANNEL_X_SHIFT) | \
(SRC_Y << A1_SRC0_CHANNEL_Y_SHIFT) | \
(SRC_Z << A1_SRC0_CHANNEL_Z_SHIFT) | \
(SRC_W << A1_SRC0_CHANNEL_W_SHIFT))

#define A1_SRC1_XY ((SRC_X << A1_SRC1_CHANNEL_X_SHIFT) | \
(SRC_Y << A1_SRC1_CHANNEL_Y_SHIFT))

#define A2_SRC1_ZW ((SRC_Z << A2_SRC1_CHANNEL_Z_SHIFT) | \
(SRC_W << A2_SRC1_CHANNEL_W_SHIFT))

#define A2_SRC2_XYZW ((SRC_X << A2_SRC2_CHANNEL_X_SHIFT) | \
(SRC_Y << A2_SRC2_CHANNEL_Y_SHIFT) | \
(SRC_Z << A2_SRC2_CHANNEL_Z_SHIFT) | \
(SRC_W << A2_SRC2_CHANNEL_W_SHIFT))





static void
meta_no_texture(struct intel_context *intel)
{
struct i915_context *i915 = i915_context(&intel->ctx);

static const GLuint prog[] = {
_3DSTATE_PIXEL_SHADER_PROGRAM,

/* Declare incoming diffuse color:
*/
(D0_DCL | D0_DECL_REG(REG_T_DIFFUSE) | D0_CHANNEL_ALL),
D1_MBZ,
D2_MBZ,

/* output-color = mov(t_diffuse)
*/
(A0_MOV |
A0_DEST_REG(REG_OC) |
A0_DEST_CHANNEL_ALL | A0_SRC0_REG(REG_T_DIFFUSE)),
(A1_SRC0_XYZW),
0,
};


memcpy(i915->meta.Program, prog, sizeof(prog));
i915->meta.ProgramSize = sizeof(prog) / sizeof(*prog);
i915->meta.Program[0] |= i915->meta.ProgramSize - 2;
i915->meta.emitted &= ~I915_UPLOAD_PROGRAM;
}

static void
meta_texture_blend_replace(struct intel_context *intel)
{
struct i915_context *i915 = i915_context(&intel->ctx);

static const GLuint prog[] = {
_3DSTATE_PIXEL_SHADER_PROGRAM,

/* Declare the sampler:
*/
(D0_DCL | D0_DECL_REG(REG_S(0)) | D0_SAMPLE_TYPE_2D | D0_CHANNEL_NONE),
D1_MBZ,
D2_MBZ,

/* Declare the interpolated texture coordinate:
*/
(D0_DCL | D0_DECL_REG(REG_T_TEX(0)) | D0_CHANNEL_ALL),
D1_MBZ,
D2_MBZ,

/* output-color = texld(sample0, texcoord0)
*/
(T0_TEXLD | T0_DEST_REG(REG_OC) | T0_SAMPLER(0)),
T1_ADDRESS_REG(REG_TYPE_T, 0),
T2_MBZ
};

memcpy(i915->meta.Program, prog, sizeof(prog));
i915->meta.ProgramSize = sizeof(prog) / sizeof(*prog);
i915->meta.Program[0] |= i915->meta.ProgramSize - 2;
i915->meta.emitted &= ~I915_UPLOAD_PROGRAM;
}





/* Set up an arbitary piece of memory as a rectangular texture
* (including the front or back buffer).
*/
static GLboolean
meta_tex_rect_source(struct intel_context *intel,
dri_bo *buffer,
GLuint offset,
GLuint pitch, GLuint height, GLenum format, GLenum type)
{
struct i915_context *i915 = i915_context(&intel->ctx);
GLuint unit = 0;
GLint numLevels = 1;
GLuint *state = i915->meta.Tex[0];
GLuint textureFormat;
GLuint cpp;

/* A full implementation of this would do the upload through
* glTexImage2d, and get all the conversion operations at that
* point. We are restricted, but still at least have access to the
* fragment program swizzle.
*/
switch (format) {
case GL_BGRA:
switch (type) {
case GL_UNSIGNED_INT_8_8_8_8_REV:
case GL_UNSIGNED_BYTE:
textureFormat = (MAPSURF_32BIT | MT_32BIT_ARGB8888);
cpp = 4;
break;
default:
return GL_FALSE;
}
break;
case GL_RGBA:
switch (type) {
case GL_UNSIGNED_INT_8_8_8_8_REV:
case GL_UNSIGNED_BYTE:
textureFormat = (MAPSURF_32BIT | MT_32BIT_ABGR8888);
cpp = 4;
break;
default:
return GL_FALSE;
}
break;
case GL_BGR:
switch (type) {
case GL_UNSIGNED_SHORT_5_6_5_REV:
textureFormat = (MAPSURF_16BIT | MT_16BIT_RGB565);
cpp = 2;
break;
default:
return GL_FALSE;
}
break;
case GL_RGB:
switch (type) {
case GL_UNSIGNED_SHORT_5_6_5:
textureFormat = (MAPSURF_16BIT | MT_16BIT_RGB565);
cpp = 2;
break;
default:
return GL_FALSE;
}
break;

default:
return GL_FALSE;
}


if ((pitch * cpp) & 3) {
_mesa_printf("%s: texture is not dword pitch\n", __FUNCTION__);
return GL_FALSE;
}

/* intel_region_release(&i915->meta.tex_region[0]); */
/* intel_region_reference(&i915->meta.tex_region[0], region); */
i915->meta.tex_buffer[0] = buffer;
i915->meta.tex_offset[0] = offset;

state[I915_TEXREG_MS3] = (((height - 1) << MS3_HEIGHT_SHIFT) |
((pitch - 1) << MS3_WIDTH_SHIFT) |
textureFormat | MS3_USE_FENCE_REGS);

state[I915_TEXREG_MS4] = (((((pitch * cpp) / 4) - 1) << MS4_PITCH_SHIFT) |
MS4_CUBE_FACE_ENA_MASK |
((((numLevels - 1) * 4)) << MS4_MAX_LOD_SHIFT));

state[I915_TEXREG_SS2] = ((FILTER_NEAREST << SS2_MIN_FILTER_SHIFT) |
(MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT) |
(FILTER_NEAREST << SS2_MAG_FILTER_SHIFT));

state[I915_TEXREG_SS3] = ((TEXCOORDMODE_WRAP << SS3_TCX_ADDR_MODE_SHIFT) |
(TEXCOORDMODE_WRAP << SS3_TCY_ADDR_MODE_SHIFT) |
(TEXCOORDMODE_WRAP << SS3_TCZ_ADDR_MODE_SHIFT) |
(unit << SS3_TEXTUREMAP_INDEX_SHIFT));

state[I915_TEXREG_SS4] = 0;

i915->meta.emitted &= ~I915_UPLOAD_TEX(0);
return GL_TRUE;
}


/**
* Set the color and depth drawing region for meta ops.
*/
static void
meta_draw_region(struct intel_context *intel,
struct intel_region *color_region,
struct intel_region *depth_region)
{
struct i915_context *i915 = i915_context(&intel->ctx);
i915_state_draw_region(intel, &i915->meta, color_region, depth_region);
}


static void
set_vertex_format(struct intel_context *intel)
{
struct i915_context *i915 = i915_context(&intel->ctx);

i915->meta.Ctx[I915_CTXREG_LIS2] =
(S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D) |
S2_TEXCOORD_FMT(1, TEXCOORDFMT_NOT_PRESENT) |
S2_TEXCOORD_FMT(2, TEXCOORDFMT_NOT_PRESENT) |
S2_TEXCOORD_FMT(3, TEXCOORDFMT_NOT_PRESENT) |
S2_TEXCOORD_FMT(4, TEXCOORDFMT_NOT_PRESENT) |
S2_TEXCOORD_FMT(5, TEXCOORDFMT_NOT_PRESENT) |
S2_TEXCOORD_FMT(6, TEXCOORDFMT_NOT_PRESENT) |
S2_TEXCOORD_FMT(7, TEXCOORDFMT_NOT_PRESENT));

i915->meta.Ctx[I915_CTXREG_LIS4] &= ~S4_VFMT_MASK;

i915->meta.Ctx[I915_CTXREG_LIS4] |= (S4_VFMT_COLOR | S4_VFMT_XYZ);

i915->meta.emitted &= ~I915_UPLOAD_CTX;
}



/* Operations where the 3D engine is decoupled temporarily from the
* current GL state and used for other purposes than simply rendering
* incoming triangles.
*/
static void
install_meta_state(struct intel_context *intel)
{
struct i915_context *i915 = i915_context(&intel->ctx);
memcpy(&i915->meta, &i915->initial, sizeof(i915->meta));
i915->meta.active = ACTIVE;
i915->meta.emitted = 0;

SET_STATE(i915, meta);
set_vertex_format(intel);
meta_no_texture(intel);
}

static void
leave_meta_state(struct intel_context *intel)
{
struct i915_context *i915 = i915_context(&intel->ctx);
intel_region_release(&i915->meta.draw_region);
intel_region_release(&i915->meta.depth_region);
/* intel_region_release(&i915->meta.tex_region[0]); */
SET_STATE(i915, state);
}



void
i915InitMetaFuncs(struct i915_context *i915)
{
i915->intel.vtbl.install_meta_state = install_meta_state;
i915->intel.vtbl.leave_meta_state = leave_meta_state;
i915->intel.vtbl.meta_no_depth_write = meta_no_depth_write;
i915->intel.vtbl.meta_no_stencil_write = meta_no_stencil_write;
i915->intel.vtbl.meta_stencil_replace = meta_stencil_replace;
i915->intel.vtbl.meta_depth_replace = meta_depth_replace;
i915->intel.vtbl.meta_color_mask = meta_color_mask;
i915->intel.vtbl.meta_no_texture = meta_no_texture;
i915->intel.vtbl.meta_texture_blend_replace = meta_texture_blend_replace;
i915->intel.vtbl.meta_tex_rect_source = meta_tex_rect_source;
i915->intel.vtbl.meta_draw_region = meta_draw_region;
i915->intel.vtbl.meta_import_pixel_state = meta_import_pixel_state;
}

+ 9
- 33
src/mesa/drivers/dri/i915/i915_vtbl.c Просмотреть файл

@@ -440,10 +440,6 @@ i915_emit_state(struct intel_context *intel)
I915_GEM_DOMAIN_SAMPLER, 0,
state->tex_offset[i]);
}
else if (state == &i915->meta) {
assert(i == 0);
OUT_BATCH(0);
}
else {
OUT_BATCH(state->tex_offset[i]);
}
@@ -497,8 +493,6 @@ i915_destroy_context(struct intel_context *intel)

intel_region_release(&i915->state.draw_region);
intel_region_release(&i915->state.depth_region);
intel_region_release(&i915->meta.draw_region);
intel_region_release(&i915->meta.depth_region);
intel_region_release(&i915->initial.draw_region);
intel_region_release(&i915->initial.depth_region);

@@ -530,29 +524,22 @@ i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
}
}

/**
* Set the drawing regions for the color and depth/stencil buffers.
* This involves setting the pitch, cpp and buffer ID/location.
* Also set pixel format for color and Z rendering
* Used for setting both regular and meta state.
*/
void
i915_state_draw_region(struct intel_context *intel,
struct i915_hw_state *state,
struct intel_region *color_region,
struct intel_region *depth_region)
static void
i915_set_draw_region(struct intel_context *intel,
struct intel_region *color_regions[],
struct intel_region *depth_region,
GLuint num_regions)
{
struct i915_context *i915 = i915_context(&intel->ctx);
GLcontext *ctx = &intel->ctx;
struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[0];
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
GLuint value;
struct i915_hw_state *state = &i915->state;

ASSERT(state == &i915->state || state == &i915->meta);

if (state->draw_region != color_region) {
if (state->draw_region != color_regions[0]) {
intel_region_release(&state->draw_region);
intel_region_reference(&state->draw_region, color_region);
intel_region_reference(&state->draw_region, color_regions[0]);
}
if (state->depth_region != depth_region) {
intel_region_release(&state->depth_region);
@@ -563,7 +550,7 @@ i915_state_draw_region(struct intel_context *intel,
* Set stride/cpp values
*/
i915_set_buf_info_for_region(&state->Buffer[I915_DESTREG_CBUFADDR0],
color_region, BUF_3D_ID_COLOR_BACK);
color_regions[0], BUF_3D_ID_COLOR_BACK);

i915_set_buf_info_for_region(&state->Buffer[I915_DESTREG_DBUFADDR0],
depth_region, BUF_3D_ID_DEPTH);
@@ -624,17 +611,6 @@ i915_state_draw_region(struct intel_context *intel,
}


static void
i915_set_draw_region(struct intel_context *intel,
struct intel_region *color_regions[],
struct intel_region *depth_region,
GLuint num_regions)
{
struct i915_context *i915 = i915_context(&intel->ctx);
i915_state_draw_region(intel, &i915->state, color_regions[0], depth_region);
}



static void
i915_new_batch(struct intel_context *intel)

+ 0
- 34
src/mesa/drivers/dri/intel/intel_context.h Просмотреть файл

@@ -124,40 +124,6 @@ struct intel_context
void (*invalidate_state) (struct intel_context *intel,
GLuint new_state);


/* Metaops:
*/
void (*install_meta_state) (struct intel_context * intel);
void (*leave_meta_state) (struct intel_context * intel);

void (*meta_draw_region) (struct intel_context * intel,
struct intel_region * draw_region,
struct intel_region * depth_region);

void (*meta_color_mask) (struct intel_context * intel, GLboolean);

void (*meta_stencil_replace) (struct intel_context * intel,
GLuint mask, GLuint clear);

void (*meta_depth_replace) (struct intel_context * intel);

void (*meta_texture_blend_replace) (struct intel_context * intel);

void (*meta_no_stencil_write) (struct intel_context * intel);
void (*meta_no_depth_write) (struct intel_context * intel);
void (*meta_no_texture) (struct intel_context * intel);

void (*meta_import_pixel_state) (struct intel_context * intel);
void (*meta_frame_buffer_texture) (struct intel_context *intel,
GLint xoff, GLint yoff);

GLboolean(*meta_tex_rect_source) (struct intel_context * intel,
dri_bo * buffer,
GLuint offset,
GLuint pitch,
GLuint height,
GLenum format, GLenum type);

void (*assert_not_dirty) (struct intel_context *intel);

void (*debug_batch)(struct intel_context *intel);

+ 0
- 102
src/mesa/drivers/dri/intel/intel_pixel_read.c Просмотреть файл

@@ -64,99 +64,6 @@
* any case.
*/


static GLboolean
do_texture_readpixels(GLcontext * ctx,
GLint x, GLint y, GLsizei width, GLsizei height,
GLenum format, GLenum type,
const struct gl_pixelstore_attrib *pack,
struct intel_region *dest_region)
{
#if 0
struct intel_context *intel = intel_context(ctx);
intelScreenPrivate *screen = intel->intelScreen;
GLint pitch = pack->RowLength ? pack->RowLength : width;
__DRIdrawable *dPriv = intel->driDrawable;
int textureFormat;
GLenum glTextureFormat;
int destFormat, depthFormat, destPitch;
drm_clip_rect_t tmp;

if (INTEL_DEBUG & DEBUG_PIXEL)
fprintf(stderr, "%s\n", __FUNCTION__);


if (ctx->_ImageTransferState ||
pack->SwapBytes || pack->LsbFirst || !pack->Invert) {
if (INTEL_DEBUG & DEBUG_PIXEL)
fprintf(stderr, "%s: check_color failed\n", __FUNCTION__);
return GL_FALSE;
}

intel->vtbl.meta_texrect_source(intel, intel_readbuf_region(intel));

if (!intel->vtbl.meta_render_dest(intel, dest_region, type, format)) {
if (INTEL_DEBUG & DEBUG_PIXEL)
fprintf(stderr, "%s: couldn't set dest %s/%s\n",
__FUNCTION__,
_mesa_lookup_enum_by_nr(type),
_mesa_lookup_enum_by_nr(format));
return GL_FALSE;
}

if (intel->driDrawable->numClipRects) {
intel->vtbl.install_meta_state(intel);
intel->vtbl.meta_no_depth_write(intel);
intel->vtbl.meta_no_stencil_write(intel);

if (!driClipRectToFramebuffer(ctx->ReadBuffer, &x, &y, &width, &height)) {
SET_STATE(i830, state);
if (INTEL_DEBUG & DEBUG_PIXEL)
fprintf(stderr, "%s: cliprect failed\n", __FUNCTION__);
return GL_TRUE;
}

y = dPriv->h - y - height;
x += dPriv->x;
y += dPriv->y;


/* Set the frontbuffer up as a large rectangular texture.
*/
intel->vtbl.meta_tex_rect_source(intel, src_region, textureFormat);


intel->vtbl.meta_texture_blend_replace(i830, glTextureFormat);


/* Set the 3d engine to draw into the destination region:
*/

intel->vtbl.meta_draw_region(intel, dest_region);
intel->vtbl.meta_draw_format(intel, destFormat, depthFormat); /* ?? */


/* Draw a single quad, no cliprects:
*/
intel->vtbl.meta_disable_cliprects(intel);

intel->vtbl.draw_quad(intel,
0, width, 0, height,
0x00ff00ff, x, x + width, y, y + height);

intel->vtbl.leave_meta_state(intel);
}

intel_region_wait_fence(ctx, dest_region); /* required by GL */
return GL_TRUE;
#endif

return GL_FALSE;
}




static GLboolean
do_blit_readpixels(GLcontext * ctx,
GLint x, GLint y, GLsizei width, GLsizei height,
@@ -270,15 +177,6 @@ intelReadPixels(GLcontext * ctx,
(ctx, x, y, width, height, format, type, pack, pixels))
return;

#ifdef I915
if (do_texture_readpixels
(ctx, x, y, width, height, format, type, pack, pixels))
return;
#else
(void)do_blit_readpixels;
(void)do_texture_readpixels;
#endif

if (INTEL_DEBUG & DEBUG_PIXEL)
_mesa_printf("%s: fallback to swrast\n", __FUNCTION__);


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