ac/radeonsi: add tcs load outputs support

The code to load outputs is essentially the same as load inputs
so we make the interface more generic to maximise code sharing.

We will make use of the new support in the following patch.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

src/amd/common/ac_nir_to_llvm.c

@@ -2850,7 +2850,8 @@ load_tcs_input(struct ac_shader_abi *abi,
 	       unsigned component,
 	       unsigned num_components,
 	       bool is_patch,
-	       bool is_compact)
+	       bool is_compact,
+	       bool load_input)
 {
 	struct nir_to_llvm_context *ctx = nir_to_llvm_context_from_abi(abi);
 	LLVMValueRef dw_addr, stride;
@@ -2999,7 +3000,8 @@ load_tes_input(struct ac_shader_abi *abi,
 	       unsigned component,
 	       unsigned num_components,
 	       bool is_patch,
-	       bool is_compact)
+	       bool is_compact,
+	       bool load_input)
 {
 	struct nir_to_llvm_context *ctx = nir_to_llvm_context_from_abi(abi);
 	LLVMValueRef buf_addr;
@@ -3149,11 +3151,11 @@ static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
 					 false, NULL, is_patch ? NULL : &vertex_index,
 					 &const_index, &indir_index);
 
-			result = ctx->abi->load_tess_inputs(ctx->abi, vertex_index, indir_index,
-							    const_index, location, driver_location,
-							    instr->variables[0]->var->data.location_frac,
-							    instr->num_components,
-							    is_patch, is_compact);
+			result = ctx->abi->load_tess_varyings(ctx->abi, vertex_index, indir_index,
+							      const_index, location, driver_location,
+							      instr->variables[0]->var->data.location_frac,
+							      instr->num_components,
+							      is_patch, is_compact, true);
 			return LLVMBuildBitCast(ctx->ac.builder, result, get_def_type(ctx, &instr->dest.ssa), "");
 		}
 
@@ -6742,12 +6744,12 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
 		} else if (shaders[i]->info.stage == MESA_SHADER_TESS_CTRL) {
 			ctx.tcs_outputs_read = shaders[i]->info.outputs_read;
 			ctx.tcs_patch_outputs_read = shaders[i]->info.patch_outputs_read;
-			ctx.abi.load_tess_inputs = load_tcs_input;
+			ctx.abi.load_tess_varyings = load_tcs_input;
 			ctx.abi.load_patch_vertices_in = load_patch_vertices_in;
 			ctx.abi.store_tcs_outputs = store_tcs_output;
 		} else if (shaders[i]->info.stage == MESA_SHADER_TESS_EVAL) {
 			ctx.tes_primitive_mode = shaders[i]->info.tess.primitive_mode;
-			ctx.abi.load_tess_inputs = load_tes_input;
+			ctx.abi.load_tess_varyings = load_tes_input;
 			ctx.abi.load_tess_coord = load_tess_coord;
 			ctx.abi.load_patch_vertices_in = load_patch_vertices_in;
 		} else if (shaders[i]->info.stage == MESA_SHADER_VERTEX) {

src/amd/common/ac_shader_abi.h

@@ -76,16 +76,17 @@ struct ac_shader_abi {
 				    unsigned const_index,
 				    LLVMTypeRef type);
 
-	LLVMValueRef (*load_tess_inputs)(struct ac_shader_abi *abi,
-					 LLVMValueRef vertex_index,
-					 LLVMValueRef param_index,
-					 unsigned const_index,
-					 unsigned location,
-					 unsigned driver_location,
-					 unsigned component,
-					 unsigned num_components,
-					 bool is_patch,
-					 bool is_compact);
+	LLVMValueRef (*load_tess_varyings)(struct ac_shader_abi *abi,
+					   LLVMValueRef vertex_index,
+					   LLVMValueRef param_index,
+					   unsigned const_index,
+					   unsigned location,
+					   unsigned driver_location,
+					   unsigned component,
+					   unsigned num_components,
+					   bool is_patch,
+					   bool is_compact,
+					   bool load_inputs);
 
 	void (*store_tcs_outputs)(struct ac_shader_abi *abi,
 				  LLVMValueRef vertex_index,

src/gallium/drivers/radeonsi/si_shader.c

@@ -1212,16 +1212,17 @@ static LLVMValueRef fetch_input_tcs(
 	return lds_load(bld_base, tgsi2llvmtype(bld_base, type), swizzle, dw_addr);
 }
 
-static LLVMValueRef si_nir_load_input_tcs(struct ac_shader_abi *abi,
-					  LLVMValueRef vertex_index,
-					  LLVMValueRef param_index,
-					  unsigned const_index,
-					  unsigned location,
-					  unsigned driver_location,
-					  unsigned component,
-					  unsigned num_components,
-					  bool is_patch,
-					  bool is_compact)
+static LLVMValueRef si_nir_load_tcs_varyings(struct ac_shader_abi *abi,
+					     LLVMValueRef vertex_index,
+					     LLVMValueRef param_index,
+					     unsigned const_index,
+					     unsigned location,
+					     unsigned driver_location,
+					     unsigned component,
+					     unsigned num_components,
+					     bool is_patch,
+					     bool is_compact,
+					     bool load_input)
 {
 	struct si_shader_context *ctx = si_shader_context_from_abi(abi);
 	struct tgsi_shader_info *info = &ctx->shader->selector->info;
@@ -1230,8 +1231,18 @@ static LLVMValueRef si_nir_load_input_tcs(struct ac_shader_abi *abi,
 
 	driver_location = driver_location / 4;
 
-	stride = get_tcs_in_vertex_dw_stride(ctx);
-	dw_addr = get_tcs_in_current_patch_offset(ctx);
+	if (load_input) {
+		stride = get_tcs_in_vertex_dw_stride(ctx);
+		dw_addr = get_tcs_in_current_patch_offset(ctx);
+	} else {
+		if (is_patch) {
+			stride = NULL;
+			dw_addr = get_tcs_out_current_patch_data_offset(ctx);
+		} else {
+			stride = get_tcs_out_vertex_dw_stride(ctx);
+			dw_addr = get_tcs_out_current_patch_offset(ctx);
+		}
+	}
 
 	if (param_index) {
 		/* Add the constant index to the indirect index */
@@ -1302,7 +1313,8 @@ LLVMValueRef si_nir_load_input_tes(struct ac_shader_abi *abi,
 				   unsigned component,
 				   unsigned num_components,
 				   bool is_patch,
-				   bool is_compact)
+				   bool is_compact,
+				   bool load_input)
 {
 	struct si_shader_context *ctx = si_shader_context_from_abi(abi);
 	struct tgsi_shader_info *info = &ctx->shader->selector->info;
@@ -5987,7 +5999,7 @@ static bool si_compile_tgsi_main(struct si_shader_context *ctx,
 		break;
 	case PIPE_SHADER_TESS_CTRL:
 		bld_base->emit_fetch_funcs[TGSI_FILE_INPUT] = fetch_input_tcs;
-		ctx->abi.load_tess_inputs = si_nir_load_input_tcs;
+		ctx->abi.load_tess_varyings = si_nir_load_tcs_varyings;
 		bld_base->emit_fetch_funcs[TGSI_FILE_OUTPUT] = fetch_output_tcs;
 		bld_base->emit_store = store_output_tcs;
 		ctx->abi.store_tcs_outputs = si_nir_store_output_tcs;
@@ -5997,7 +6009,7 @@ static bool si_compile_tgsi_main(struct si_shader_context *ctx,
 		break;
 	case PIPE_SHADER_TESS_EVAL:
 		bld_base->emit_fetch_funcs[TGSI_FILE_INPUT] = fetch_input_tes;
-		ctx->abi.load_tess_inputs = si_nir_load_input_tes;
+		ctx->abi.load_tess_varyings = si_nir_load_input_tes;
 		ctx->abi.load_tess_coord = si_load_tess_coord;
 		ctx->abi.load_tess_level = si_load_tess_level;
 		ctx->abi.load_patch_vertices_in = si_load_patch_vertices_in;

src/gallium/drivers/radeonsi/si_shader_internal.h

@@ -283,7 +283,8 @@ LLVMValueRef si_nir_load_input_tes(struct ac_shader_abi *abi,
 				   unsigned component,
 				   unsigned num_components,
 				   bool is_patch,
-				   bool is_compact);
+				   bool is_compact,
+				   bool load_input);
 
 LLVMValueRef si_llvm_load_input_gs(struct ac_shader_abi *abi,
 				   unsigned input_index,