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ac/radeonsi: add tcs load outputs support

The code to load outputs is essentially the same as load inputs
so we make the interface more generic to maximise code sharing.

We will make use of the new support in the following patch.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
tags/18.0-branchpoint
Timothy Arceri 7 年前
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9622b445c8

+ 11
- 9
src/amd/common/ac_nir_to_llvm.c 查看文件

unsigned component, unsigned component,
unsigned num_components, unsigned num_components,
bool is_patch, bool is_patch,
bool is_compact)
bool is_compact,
bool load_input)
{ {
struct nir_to_llvm_context *ctx = nir_to_llvm_context_from_abi(abi); struct nir_to_llvm_context *ctx = nir_to_llvm_context_from_abi(abi);
LLVMValueRef dw_addr, stride; LLVMValueRef dw_addr, stride;
unsigned component, unsigned component,
unsigned num_components, unsigned num_components,
bool is_patch, bool is_patch,
bool is_compact)
bool is_compact,
bool load_input)
{ {
struct nir_to_llvm_context *ctx = nir_to_llvm_context_from_abi(abi); struct nir_to_llvm_context *ctx = nir_to_llvm_context_from_abi(abi);
LLVMValueRef buf_addr; LLVMValueRef buf_addr;
false, NULL, is_patch ? NULL : &vertex_index, false, NULL, is_patch ? NULL : &vertex_index,
&const_index, &indir_index); &const_index, &indir_index);


result = ctx->abi->load_tess_inputs(ctx->abi, vertex_index, indir_index,
const_index, location, driver_location,
instr->variables[0]->var->data.location_frac,
instr->num_components,
is_patch, is_compact);
result = ctx->abi->load_tess_varyings(ctx->abi, vertex_index, indir_index,
const_index, location, driver_location,
instr->variables[0]->var->data.location_frac,
instr->num_components,
is_patch, is_compact, true);
return LLVMBuildBitCast(ctx->ac.builder, result, get_def_type(ctx, &instr->dest.ssa), ""); return LLVMBuildBitCast(ctx->ac.builder, result, get_def_type(ctx, &instr->dest.ssa), "");
} }


} else if (shaders[i]->info.stage == MESA_SHADER_TESS_CTRL) { } else if (shaders[i]->info.stage == MESA_SHADER_TESS_CTRL) {
ctx.tcs_outputs_read = shaders[i]->info.outputs_read; ctx.tcs_outputs_read = shaders[i]->info.outputs_read;
ctx.tcs_patch_outputs_read = shaders[i]->info.patch_outputs_read; ctx.tcs_patch_outputs_read = shaders[i]->info.patch_outputs_read;
ctx.abi.load_tess_inputs = load_tcs_input;
ctx.abi.load_tess_varyings = load_tcs_input;
ctx.abi.load_patch_vertices_in = load_patch_vertices_in; ctx.abi.load_patch_vertices_in = load_patch_vertices_in;
ctx.abi.store_tcs_outputs = store_tcs_output; ctx.abi.store_tcs_outputs = store_tcs_output;
} else if (shaders[i]->info.stage == MESA_SHADER_TESS_EVAL) { } else if (shaders[i]->info.stage == MESA_SHADER_TESS_EVAL) {
ctx.tes_primitive_mode = shaders[i]->info.tess.primitive_mode; ctx.tes_primitive_mode = shaders[i]->info.tess.primitive_mode;
ctx.abi.load_tess_inputs = load_tes_input;
ctx.abi.load_tess_varyings = load_tes_input;
ctx.abi.load_tess_coord = load_tess_coord; ctx.abi.load_tess_coord = load_tess_coord;
ctx.abi.load_patch_vertices_in = load_patch_vertices_in; ctx.abi.load_patch_vertices_in = load_patch_vertices_in;
} else if (shaders[i]->info.stage == MESA_SHADER_VERTEX) { } else if (shaders[i]->info.stage == MESA_SHADER_VERTEX) {

+ 11
- 10
src/amd/common/ac_shader_abi.h 查看文件

unsigned const_index, unsigned const_index,
LLVMTypeRef type); LLVMTypeRef type);


LLVMValueRef (*load_tess_inputs)(struct ac_shader_abi *abi,
LLVMValueRef vertex_index,
LLVMValueRef param_index,
unsigned const_index,
unsigned location,
unsigned driver_location,
unsigned component,
unsigned num_components,
bool is_patch,
bool is_compact);
LLVMValueRef (*load_tess_varyings)(struct ac_shader_abi *abi,
LLVMValueRef vertex_index,
LLVMValueRef param_index,
unsigned const_index,
unsigned location,
unsigned driver_location,
unsigned component,
unsigned num_components,
bool is_patch,
bool is_compact,
bool load_inputs);


void (*store_tcs_outputs)(struct ac_shader_abi *abi, void (*store_tcs_outputs)(struct ac_shader_abi *abi,
LLVMValueRef vertex_index, LLVMValueRef vertex_index,

+ 27
- 15
src/gallium/drivers/radeonsi/si_shader.c 查看文件

return lds_load(bld_base, tgsi2llvmtype(bld_base, type), swizzle, dw_addr); return lds_load(bld_base, tgsi2llvmtype(bld_base, type), swizzle, dw_addr);
} }


static LLVMValueRef si_nir_load_input_tcs(struct ac_shader_abi *abi,
LLVMValueRef vertex_index,
LLVMValueRef param_index,
unsigned const_index,
unsigned location,
unsigned driver_location,
unsigned component,
unsigned num_components,
bool is_patch,
bool is_compact)
static LLVMValueRef si_nir_load_tcs_varyings(struct ac_shader_abi *abi,
LLVMValueRef vertex_index,
LLVMValueRef param_index,
unsigned const_index,
unsigned location,
unsigned driver_location,
unsigned component,
unsigned num_components,
bool is_patch,
bool is_compact,
bool load_input)
{ {
struct si_shader_context *ctx = si_shader_context_from_abi(abi); struct si_shader_context *ctx = si_shader_context_from_abi(abi);
struct tgsi_shader_info *info = &ctx->shader->selector->info; struct tgsi_shader_info *info = &ctx->shader->selector->info;


driver_location = driver_location / 4; driver_location = driver_location / 4;


stride = get_tcs_in_vertex_dw_stride(ctx);
dw_addr = get_tcs_in_current_patch_offset(ctx);
if (load_input) {
stride = get_tcs_in_vertex_dw_stride(ctx);
dw_addr = get_tcs_in_current_patch_offset(ctx);
} else {
if (is_patch) {
stride = NULL;
dw_addr = get_tcs_out_current_patch_data_offset(ctx);
} else {
stride = get_tcs_out_vertex_dw_stride(ctx);
dw_addr = get_tcs_out_current_patch_offset(ctx);
}
}


if (param_index) { if (param_index) {
/* Add the constant index to the indirect index */ /* Add the constant index to the indirect index */
unsigned component, unsigned component,
unsigned num_components, unsigned num_components,
bool is_patch, bool is_patch,
bool is_compact)
bool is_compact,
bool load_input)
{ {
struct si_shader_context *ctx = si_shader_context_from_abi(abi); struct si_shader_context *ctx = si_shader_context_from_abi(abi);
struct tgsi_shader_info *info = &ctx->shader->selector->info; struct tgsi_shader_info *info = &ctx->shader->selector->info;
break; break;
case PIPE_SHADER_TESS_CTRL: case PIPE_SHADER_TESS_CTRL:
bld_base->emit_fetch_funcs[TGSI_FILE_INPUT] = fetch_input_tcs; bld_base->emit_fetch_funcs[TGSI_FILE_INPUT] = fetch_input_tcs;
ctx->abi.load_tess_inputs = si_nir_load_input_tcs;
ctx->abi.load_tess_varyings = si_nir_load_tcs_varyings;
bld_base->emit_fetch_funcs[TGSI_FILE_OUTPUT] = fetch_output_tcs; bld_base->emit_fetch_funcs[TGSI_FILE_OUTPUT] = fetch_output_tcs;
bld_base->emit_store = store_output_tcs; bld_base->emit_store = store_output_tcs;
ctx->abi.store_tcs_outputs = si_nir_store_output_tcs; ctx->abi.store_tcs_outputs = si_nir_store_output_tcs;
break; break;
case PIPE_SHADER_TESS_EVAL: case PIPE_SHADER_TESS_EVAL:
bld_base->emit_fetch_funcs[TGSI_FILE_INPUT] = fetch_input_tes; bld_base->emit_fetch_funcs[TGSI_FILE_INPUT] = fetch_input_tes;
ctx->abi.load_tess_inputs = si_nir_load_input_tes;
ctx->abi.load_tess_varyings = si_nir_load_input_tes;
ctx->abi.load_tess_coord = si_load_tess_coord; ctx->abi.load_tess_coord = si_load_tess_coord;
ctx->abi.load_tess_level = si_load_tess_level; ctx->abi.load_tess_level = si_load_tess_level;
ctx->abi.load_patch_vertices_in = si_load_patch_vertices_in; ctx->abi.load_patch_vertices_in = si_load_patch_vertices_in;

+ 2
- 1
src/gallium/drivers/radeonsi/si_shader_internal.h 查看文件

unsigned component, unsigned component,
unsigned num_components, unsigned num_components,
bool is_patch, bool is_patch,
bool is_compact);
bool is_compact,
bool load_input);


LLVMValueRef si_llvm_load_input_gs(struct ac_shader_abi *abi, LLVMValueRef si_llvm_load_input_gs(struct ac_shader_abi *abi,
unsigned input_index, unsigned input_index,

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