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@@ -71,6 +71,9 @@ struct ir3_context { |
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/* For vertex shaders, keep track of the system values sources */ |
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struct ir3_instruction *vertex_id, *basevertex, *instance_id; |
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/* For fragment shaders: */ |
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struct ir3_instruction *samp_id, *samp_mask_in; |
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/* Compute shader inputs: */ |
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struct ir3_instruction *local_invocation_id, *work_group_id; |
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@@ -2207,6 +2210,23 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr) |
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} |
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dst[0] = ctx->instance_id; |
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break; |
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case nir_intrinsic_load_sample_id: |
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if (!ctx->samp_id) { |
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ctx->samp_id = create_input(b, 0); |
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ctx->samp_id->regs[0]->flags |= IR3_REG_HALF; |
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add_sysval_input(ctx, SYSTEM_VALUE_SAMPLE_ID, |
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ctx->samp_id); |
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} |
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dst[0] = ir3_COV(b, ctx->samp_id, TYPE_U16, TYPE_U32); |
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break; |
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case nir_intrinsic_load_sample_mask_in: |
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if (!ctx->samp_mask_in) { |
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ctx->samp_mask_in = create_input(b, 0); |
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add_sysval_input(ctx, SYSTEM_VALUE_SAMPLE_MASK_IN, |
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ctx->samp_mask_in); |
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} |
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dst[0] = ctx->samp_mask_in; |
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break; |
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case nir_intrinsic_load_user_clip_plane: |
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idx = nir_intrinsic_ucp_id(intr); |
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for (int i = 0; i < intr->num_components; i++) { |
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@@ -3149,6 +3169,7 @@ max_drvloc(struct exec_list *vars) |
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} |
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static const unsigned max_sysvals[SHADER_MAX] = { |
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[SHADER_FRAGMENT] = 8, |
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[SHADER_VERTEX] = 16, |
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[SHADER_COMPUTE] = 16, // TODO how many do we actually need? |
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}; |