Signed-off-by: Rob Clark <robdclark@gmail.com>tags/18.2-branchpoint
@@ -8,17 +8,19 @@ http://github.com/freedreno/envytools/ | |||
git clone https://github.com/freedreno/envytools.git | |||
The rules-ng-ng source files this header was generated from are: | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 431 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 37162 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 13612 bytes, from 2017-12-19 18:19:46) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 34499 bytes, from 2018-01-03 15:58:51) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 112086 bytes, from 2017-12-19 18:19:46) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 146261 bytes, from 2018-01-03 15:58:51) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2017-05-17 13:21:27) | |||
Copyright (C) 2013-2017 by the following authors: | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 501 bytes, from 2018-01-31 18:26:32) | |||
- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2018-01-08 14:56:24) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 36805 bytes, from 2018-05-20 19:03:35) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 13612 bytes, from 2018-06-01 15:43:47) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 34755 bytes, from 2018-06-01 15:43:47) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2018-01-10 16:21:40) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 112086 bytes, from 2018-01-08 14:56:24) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 146903 bytes, from 2018-06-01 15:44:19) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a6xx.xml ( 44551 bytes, from 2018-06-01 15:43:47) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a6xx_gmu.xml ( 10431 bytes, from 2018-03-16 17:55:10) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2018-01-08 14:56:24) | |||
Copyright (C) 2013-2018 by the following authors: | |||
- Rob Clark <robdclark@gmail.com> (robclark) | |||
- Ilia Mirkin <imirkin@alum.mit.edu> (imirkin) | |||
@@ -8,17 +8,19 @@ http://github.com/freedreno/envytools/ | |||
git clone https://github.com/freedreno/envytools.git | |||
The rules-ng-ng source files this header was generated from are: | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 431 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 37162 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 13612 bytes, from 2017-12-19 18:19:46) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 34499 bytes, from 2018-01-03 15:58:51) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 112086 bytes, from 2017-12-19 18:19:46) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 146261 bytes, from 2018-01-03 15:58:51) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2017-05-17 13:21:27) | |||
Copyright (C) 2013-2017 by the following authors: | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 501 bytes, from 2018-01-31 18:26:32) | |||
- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2018-01-08 14:56:24) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 36805 bytes, from 2018-05-20 19:03:35) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 13612 bytes, from 2018-06-01 15:43:47) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 34755 bytes, from 2018-06-01 15:43:47) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2018-01-10 16:21:40) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 112086 bytes, from 2018-01-08 14:56:24) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 146903 bytes, from 2018-06-01 15:44:19) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a6xx.xml ( 44551 bytes, from 2018-06-01 15:43:47) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a6xx_gmu.xml ( 10431 bytes, from 2018-03-16 17:55:10) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2018-01-08 14:56:24) | |||
Copyright (C) 2013-2018 by the following authors: | |||
- Rob Clark <robdclark@gmail.com> (robclark) | |||
- Ilia Mirkin <imirkin@alum.mit.edu> (imirkin) | |||
@@ -8,17 +8,19 @@ http://github.com/freedreno/envytools/ | |||
git clone https://github.com/freedreno/envytools.git | |||
The rules-ng-ng source files this header was generated from are: | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 431 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 37162 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 13612 bytes, from 2017-12-19 18:19:46) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 34499 bytes, from 2018-01-03 15:58:51) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 112086 bytes, from 2017-12-19 18:19:46) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 146261 bytes, from 2018-01-03 15:58:51) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2017-05-17 13:21:27) | |||
Copyright (C) 2013-2017 by the following authors: | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 501 bytes, from 2018-01-31 18:26:32) | |||
- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2018-01-08 14:56:24) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 36805 bytes, from 2018-05-20 19:03:35) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 13612 bytes, from 2018-06-01 15:43:47) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 34755 bytes, from 2018-06-01 15:43:47) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2018-01-10 16:21:40) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 112086 bytes, from 2018-01-08 14:56:24) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 146903 bytes, from 2018-06-01 15:44:19) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a6xx.xml ( 44551 bytes, from 2018-06-01 15:43:47) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a6xx_gmu.xml ( 10431 bytes, from 2018-03-16 17:55:10) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2018-01-08 14:56:24) | |||
Copyright (C) 2013-2018 by the following authors: | |||
- Rob Clark <robdclark@gmail.com> (robclark) | |||
- Ilia Mirkin <imirkin@alum.mit.edu> (imirkin) | |||
@@ -8,15 +8,17 @@ http://github.com/freedreno/envytools/ | |||
git clone https://github.com/freedreno/envytools.git | |||
The rules-ng-ng source files this header was generated from are: | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 431 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 37162 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 13612 bytes, from 2017-12-19 18:19:46) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 34499 bytes, from 2018-01-03 15:58:51) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 112086 bytes, from 2017-12-19 18:19:46) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 146261 bytes, from 2018-01-03 15:58:51) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 501 bytes, from 2018-01-31 18:26:32) | |||
- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2018-01-08 14:56:24) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 36805 bytes, from 2018-05-20 19:03:35) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 13612 bytes, from 2018-06-01 15:43:47) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 34755 bytes, from 2018-06-01 15:43:47) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2018-01-10 16:21:40) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 112086 bytes, from 2018-01-08 14:56:24) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 146903 bytes, from 2018-06-01 15:44:19) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a6xx.xml ( 44551 bytes, from 2018-06-01 15:43:47) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a6xx_gmu.xml ( 10431 bytes, from 2018-03-16 17:55:10) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2018-01-08 14:56:24) | |||
Copyright (C) 2013-2018 by the following authors: | |||
- Rob Clark <robdclark@gmail.com> (robclark) | |||
@@ -2381,11 +2383,11 @@ static inline uint32_t A5XX_VSC_RESOLVE_CNTL_Y(uint32_t val) | |||
#define REG_A5XX_VBIF_PERF_CNT_CLR0 0x000030c8 | |||
#define REG_A5XX_VBIF_PERF_CNT_CLR1 0x000030c8 | |||
#define REG_A5XX_VBIF_PERF_CNT_CLR1 0x000030c9 | |||
#define REG_A5XX_VBIF_PERF_CNT_CLR2 0x000030c8 | |||
#define REG_A5XX_VBIF_PERF_CNT_CLR2 0x000030ca | |||
#define REG_A5XX_VBIF_PERF_CNT_CLR3 0x000030c8 | |||
#define REG_A5XX_VBIF_PERF_CNT_CLR3 0x000030cb | |||
#define REG_A5XX_VBIF_PERF_CNT_SEL0 0x000030d0 | |||
@@ -3000,7 +3002,9 @@ static inline uint32_t A5XX_RB_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val | |||
#define A5XX_RB_RENDER_CONTROL0_WCOORD 0x00000200 | |||
#define REG_A5XX_RB_RENDER_CONTROL1 0x0000e145 | |||
#define A5XX_RB_RENDER_CONTROL1_SAMPLEMASK 0x00000001 | |||
#define A5XX_RB_RENDER_CONTROL1_FACENESS 0x00000002 | |||
#define A5XX_RB_RENDER_CONTROL1_SAMPLEID 0x00000004 | |||
#define REG_A5XX_RB_FS_OUTPUT_CNTL 0x0000e146 | |||
#define A5XX_RB_FS_OUTPUT_CNTL_MRT__MASK 0x0000000f | |||
@@ -4228,7 +4232,33 @@ static inline uint32_t A5XX_SP_CS_CTRL_REG0_BRANCHSTACK(uint32_t val) | |||
#define REG_A5XX_SP_CS_OBJ_START_HI 0x0000e5f4 | |||
#define REG_A5XX_UNKNOWN_E600 0x0000e600 | |||
#define REG_A5XX_SP_HS_CTRL_REG0 0x0000e600 | |||
#define A5XX_SP_HS_CTRL_REG0_THREADSIZE__MASK 0x00000008 | |||
#define A5XX_SP_HS_CTRL_REG0_THREADSIZE__SHIFT 3 | |||
static inline uint32_t A5XX_SP_HS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val) | |||
{ | |||
return ((val) << A5XX_SP_HS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_HS_CTRL_REG0_THREADSIZE__MASK; | |||
} | |||
#define A5XX_SP_HS_CTRL_REG0_HALFREGFOOTPRINT__MASK 0x000003f0 | |||
#define A5XX_SP_HS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT 4 | |||
static inline uint32_t A5XX_SP_HS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val) | |||
{ | |||
return ((val) << A5XX_SP_HS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_HS_CTRL_REG0_HALFREGFOOTPRINT__MASK; | |||
} | |||
#define A5XX_SP_HS_CTRL_REG0_FULLREGFOOTPRINT__MASK 0x0000fc00 | |||
#define A5XX_SP_HS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT 10 | |||
static inline uint32_t A5XX_SP_HS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) | |||
{ | |||
return ((val) << A5XX_SP_HS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_HS_CTRL_REG0_FULLREGFOOTPRINT__MASK; | |||
} | |||
#define A5XX_SP_HS_CTRL_REG0_VARYING 0x00010000 | |||
#define A5XX_SP_HS_CTRL_REG0_PIXLODENABLE 0x00100000 | |||
#define A5XX_SP_HS_CTRL_REG0_BRANCHSTACK__MASK 0xfe000000 | |||
#define A5XX_SP_HS_CTRL_REG0_BRANCHSTACK__SHIFT 25 | |||
static inline uint32_t A5XX_SP_HS_CTRL_REG0_BRANCHSTACK(uint32_t val) | |||
{ | |||
return ((val) << A5XX_SP_HS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_HS_CTRL_REG0_BRANCHSTACK__MASK; | |||
} | |||
#define REG_A5XX_UNKNOWN_E602 0x0000e602 | |||
@@ -4236,13 +4266,67 @@ static inline uint32_t A5XX_SP_CS_CTRL_REG0_BRANCHSTACK(uint32_t val) | |||
#define REG_A5XX_SP_HS_OBJ_START_HI 0x0000e604 | |||
#define REG_A5XX_SP_DS_CTRL_REG0 0x0000e610 | |||
#define A5XX_SP_DS_CTRL_REG0_THREADSIZE__MASK 0x00000008 | |||
#define A5XX_SP_DS_CTRL_REG0_THREADSIZE__SHIFT 3 | |||
static inline uint32_t A5XX_SP_DS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val) | |||
{ | |||
return ((val) << A5XX_SP_DS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_DS_CTRL_REG0_THREADSIZE__MASK; | |||
} | |||
#define A5XX_SP_DS_CTRL_REG0_HALFREGFOOTPRINT__MASK 0x000003f0 | |||
#define A5XX_SP_DS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT 4 | |||
static inline uint32_t A5XX_SP_DS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val) | |||
{ | |||
return ((val) << A5XX_SP_DS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_DS_CTRL_REG0_HALFREGFOOTPRINT__MASK; | |||
} | |||
#define A5XX_SP_DS_CTRL_REG0_FULLREGFOOTPRINT__MASK 0x0000fc00 | |||
#define A5XX_SP_DS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT 10 | |||
static inline uint32_t A5XX_SP_DS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) | |||
{ | |||
return ((val) << A5XX_SP_DS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_DS_CTRL_REG0_FULLREGFOOTPRINT__MASK; | |||
} | |||
#define A5XX_SP_DS_CTRL_REG0_VARYING 0x00010000 | |||
#define A5XX_SP_DS_CTRL_REG0_PIXLODENABLE 0x00100000 | |||
#define A5XX_SP_DS_CTRL_REG0_BRANCHSTACK__MASK 0xfe000000 | |||
#define A5XX_SP_DS_CTRL_REG0_BRANCHSTACK__SHIFT 25 | |||
static inline uint32_t A5XX_SP_DS_CTRL_REG0_BRANCHSTACK(uint32_t val) | |||
{ | |||
return ((val) << A5XX_SP_DS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_DS_CTRL_REG0_BRANCHSTACK__MASK; | |||
} | |||
#define REG_A5XX_UNKNOWN_E62B 0x0000e62b | |||
#define REG_A5XX_SP_DS_OBJ_START_LO 0x0000e62c | |||
#define REG_A5XX_SP_DS_OBJ_START_HI 0x0000e62d | |||
#define REG_A5XX_UNKNOWN_E640 0x0000e640 | |||
#define REG_A5XX_SP_GS_CTRL_REG0 0x0000e640 | |||
#define A5XX_SP_GS_CTRL_REG0_THREADSIZE__MASK 0x00000008 | |||
#define A5XX_SP_GS_CTRL_REG0_THREADSIZE__SHIFT 3 | |||
static inline uint32_t A5XX_SP_GS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val) | |||
{ | |||
return ((val) << A5XX_SP_GS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_GS_CTRL_REG0_THREADSIZE__MASK; | |||
} | |||
#define A5XX_SP_GS_CTRL_REG0_HALFREGFOOTPRINT__MASK 0x000003f0 | |||
#define A5XX_SP_GS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT 4 | |||
static inline uint32_t A5XX_SP_GS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val) | |||
{ | |||
return ((val) << A5XX_SP_GS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_GS_CTRL_REG0_HALFREGFOOTPRINT__MASK; | |||
} | |||
#define A5XX_SP_GS_CTRL_REG0_FULLREGFOOTPRINT__MASK 0x0000fc00 | |||
#define A5XX_SP_GS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT 10 | |||
static inline uint32_t A5XX_SP_GS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) | |||
{ | |||
return ((val) << A5XX_SP_GS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_GS_CTRL_REG0_FULLREGFOOTPRINT__MASK; | |||
} | |||
#define A5XX_SP_GS_CTRL_REG0_VARYING 0x00010000 | |||
#define A5XX_SP_GS_CTRL_REG0_PIXLODENABLE 0x00100000 | |||
#define A5XX_SP_GS_CTRL_REG0_BRANCHSTACK__MASK 0xfe000000 | |||
#define A5XX_SP_GS_CTRL_REG0_BRANCHSTACK__SHIFT 25 | |||
static inline uint32_t A5XX_SP_GS_CTRL_REG0_BRANCHSTACK(uint32_t val) | |||
{ | |||
return ((val) << A5XX_SP_GS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_GS_CTRL_REG0_BRANCHSTACK__MASK; | |||
} | |||
#define REG_A5XX_UNKNOWN_E65B 0x0000e65b | |||
@@ -4362,6 +4446,18 @@ static inline uint32_t A5XX_HLSQ_CONTROL_2_REG_FACEREGID(uint32_t val) | |||
{ | |||
return ((val) << A5XX_HLSQ_CONTROL_2_REG_FACEREGID__SHIFT) & A5XX_HLSQ_CONTROL_2_REG_FACEREGID__MASK; | |||
} | |||
#define A5XX_HLSQ_CONTROL_2_REG_SAMPLEID__MASK 0x0000ff00 | |||
#define A5XX_HLSQ_CONTROL_2_REG_SAMPLEID__SHIFT 8 | |||
static inline uint32_t A5XX_HLSQ_CONTROL_2_REG_SAMPLEID(uint32_t val) | |||
{ | |||
return ((val) << A5XX_HLSQ_CONTROL_2_REG_SAMPLEID__SHIFT) & A5XX_HLSQ_CONTROL_2_REG_SAMPLEID__MASK; | |||
} | |||
#define A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK__MASK 0x00ff0000 | |||
#define A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK__SHIFT 16 | |||
static inline uint32_t A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK(uint32_t val) | |||
{ | |||
return ((val) << A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK__SHIFT) & A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK__MASK; | |||
} | |||
#define REG_A5XX_HLSQ_CONTROL_3_REG 0x0000e787 | |||
#define A5XX_HLSQ_CONTROL_3_REG_FRAGCOORDXYREGID__MASK 0x000000ff | |||
@@ -4564,34 +4660,52 @@ static inline uint32_t A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEZ(uint32_t val) | |||
} | |||
#define REG_A5XX_HLSQ_CS_NDRANGE_1 0x0000e7b1 | |||
#define A5XX_HLSQ_CS_NDRANGE_1_SIZE_X__MASK 0xffffffff | |||
#define A5XX_HLSQ_CS_NDRANGE_1_SIZE_X__SHIFT 0 | |||
static inline uint32_t A5XX_HLSQ_CS_NDRANGE_1_SIZE_X(uint32_t val) | |||
#define A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X__MASK 0xffffffff | |||
#define A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X__SHIFT 0 | |||
static inline uint32_t A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X(uint32_t val) | |||
{ | |||
return ((val) << A5XX_HLSQ_CS_NDRANGE_1_SIZE_X__SHIFT) & A5XX_HLSQ_CS_NDRANGE_1_SIZE_X__MASK; | |||
return ((val) << A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X__SHIFT) & A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X__MASK; | |||
} | |||
#define REG_A5XX_HLSQ_CS_NDRANGE_2 0x0000e7b2 | |||
#define A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X__MASK 0xffffffff | |||
#define A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X__SHIFT 0 | |||
static inline uint32_t A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X(uint32_t val) | |||
{ | |||
return ((val) << A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X__SHIFT) & A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X__MASK; | |||
} | |||
#define REG_A5XX_HLSQ_CS_NDRANGE_3 0x0000e7b3 | |||
#define A5XX_HLSQ_CS_NDRANGE_3_SIZE_Y__MASK 0xffffffff | |||
#define A5XX_HLSQ_CS_NDRANGE_3_SIZE_Y__SHIFT 0 | |||
static inline uint32_t A5XX_HLSQ_CS_NDRANGE_3_SIZE_Y(uint32_t val) | |||
#define A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y__MASK 0xffffffff | |||
#define A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y__SHIFT 0 | |||
static inline uint32_t A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y(uint32_t val) | |||
{ | |||
return ((val) << A5XX_HLSQ_CS_NDRANGE_3_SIZE_Y__SHIFT) & A5XX_HLSQ_CS_NDRANGE_3_SIZE_Y__MASK; | |||
return ((val) << A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y__SHIFT) & A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y__MASK; | |||
} | |||
#define REG_A5XX_HLSQ_CS_NDRANGE_4 0x0000e7b4 | |||
#define A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y__MASK 0xffffffff | |||
#define A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y__SHIFT 0 | |||
static inline uint32_t A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y(uint32_t val) | |||
{ | |||
return ((val) << A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y__SHIFT) & A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y__MASK; | |||
} | |||
#define REG_A5XX_HLSQ_CS_NDRANGE_5 0x0000e7b5 | |||
#define A5XX_HLSQ_CS_NDRANGE_5_SIZE_Z__MASK 0xffffffff | |||
#define A5XX_HLSQ_CS_NDRANGE_5_SIZE_Z__SHIFT 0 | |||
static inline uint32_t A5XX_HLSQ_CS_NDRANGE_5_SIZE_Z(uint32_t val) | |||
#define A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z__MASK 0xffffffff | |||
#define A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z__SHIFT 0 | |||
static inline uint32_t A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z(uint32_t val) | |||
{ | |||
return ((val) << A5XX_HLSQ_CS_NDRANGE_5_SIZE_Z__SHIFT) & A5XX_HLSQ_CS_NDRANGE_5_SIZE_Z__MASK; | |||
return ((val) << A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z__SHIFT) & A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z__MASK; | |||
} | |||
#define REG_A5XX_HLSQ_CS_NDRANGE_6 0x0000e7b6 | |||
#define A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z__MASK 0xffffffff | |||
#define A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z__SHIFT 0 | |||
static inline uint32_t A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z(uint32_t val) | |||
{ | |||
return ((val) << A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z__SHIFT) & A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z__MASK; | |||
} | |||
#define REG_A5XX_HLSQ_CS_CNTL_0 0x0000e7b7 | |||
#define A5XX_HLSQ_CS_CNTL_0_WGIDCONSTID__MASK 0x000000ff |
@@ -206,12 +206,12 @@ fd5_launch_grid(struct fd_context *ctx, const struct pipe_grid_info *info) | |||
A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEX(local_size[0] - 1) | | |||
A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEY(local_size[1] - 1) | | |||
A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEZ(local_size[2] - 1)); | |||
OUT_RING(ring, A5XX_HLSQ_CS_NDRANGE_1_SIZE_X(local_size[0] * num_groups[0])); | |||
OUT_RING(ring, 0); /* HLSQ_CS_NDRANGE_2 */ | |||
OUT_RING(ring, A5XX_HLSQ_CS_NDRANGE_3_SIZE_Y(local_size[1] * num_groups[1])); | |||
OUT_RING(ring, 0); /* HLSQ_CS_NDRANGE_4 */ | |||
OUT_RING(ring, A5XX_HLSQ_CS_NDRANGE_5_SIZE_Z(local_size[2] * num_groups[2])); | |||
OUT_RING(ring, 0); /* HLSQ_CS_NDRANGE_6 */ | |||
OUT_RING(ring, A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X(local_size[0] * num_groups[0])); | |||
OUT_RING(ring, 0); /* HLSQ_CS_NDRANGE_2_GLOBALOFF_X */ | |||
OUT_RING(ring, A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y(local_size[1] * num_groups[1])); | |||
OUT_RING(ring, 0); /* HLSQ_CS_NDRANGE_4_GLOBALOFF_Y */ | |||
OUT_RING(ring, A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z(local_size[2] * num_groups[2])); | |||
OUT_RING(ring, 0); /* HLSQ_CS_NDRANGE_6_GLOBALOFF_Z */ | |||
OUT_PKT4(ring, REG_A5XX_HLSQ_CS_KERNEL_GROUP_X, 3); | |||
OUT_RING(ring, 1); /* HLSQ_CS_KERNEL_GROUP_X */ |
@@ -1018,10 +1018,10 @@ t7 opcode: CP_WAIT_FOR_IDLE (26) (1 dwords) | |||
OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5DB, 1); | |||
OUT_RING(ring, 0x00000000); | |||
OUT_PKT4(ring, REG_A5XX_UNKNOWN_E600, 1); | |||
OUT_PKT4(ring, REG_A5XX_SP_HS_CTRL_REG0, 1); | |||
OUT_RING(ring, 0x00000000); | |||
OUT_PKT4(ring, REG_A5XX_UNKNOWN_E640, 1); | |||
OUT_PKT4(ring, REG_A5XX_SP_GS_CTRL_REG0, 1); | |||
OUT_RING(ring, 0x00000000); | |||
OUT_PKT4(ring, REG_A5XX_TPL1_VS_TEX_COUNT, 4); |
@@ -8,17 +8,19 @@ http://github.com/freedreno/envytools/ | |||
git clone https://github.com/freedreno/envytools.git | |||
The rules-ng-ng source files this header was generated from are: | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 431 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 37162 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 13612 bytes, from 2017-12-19 18:19:46) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 34499 bytes, from 2018-01-03 15:58:51) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 112086 bytes, from 2017-12-19 18:19:46) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 146261 bytes, from 2018-01-03 15:58:51) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2017-05-17 13:21:27) | |||
Copyright (C) 2013-2017 by the following authors: | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 501 bytes, from 2018-01-31 18:26:32) | |||
- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2018-01-08 14:56:24) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 36805 bytes, from 2018-05-20 19:03:35) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 13612 bytes, from 2018-06-01 15:43:47) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 34755 bytes, from 2018-06-01 15:43:47) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2018-01-10 16:21:40) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 112086 bytes, from 2018-01-08 14:56:24) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 146903 bytes, from 2018-06-01 15:44:19) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a6xx.xml ( 44551 bytes, from 2018-06-01 15:43:47) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a6xx_gmu.xml ( 10431 bytes, from 2018-03-16 17:55:10) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2018-01-08 14:56:24) | |||
Copyright (C) 2013-2018 by the following authors: | |||
- Rob Clark <robdclark@gmail.com> (robclark) | |||
- Ilia Mirkin <imirkin@alum.mit.edu> (imirkin) | |||
@@ -8,15 +8,17 @@ http://github.com/freedreno/envytools/ | |||
git clone https://github.com/freedreno/envytools.git | |||
The rules-ng-ng source files this header was generated from are: | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 431 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 37162 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 13612 bytes, from 2017-12-19 18:19:46) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 34499 bytes, from 2018-01-03 15:58:51) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 112086 bytes, from 2017-12-19 18:19:46) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 146261 bytes, from 2018-01-03 15:58:51) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2017-05-17 13:21:27) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml ( 501 bytes, from 2018-01-31 18:26:32) | |||
- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2018-01-08 14:56:24) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml ( 36805 bytes, from 2018-05-20 19:03:35) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 13612 bytes, from 2018-06-01 15:43:47) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 34755 bytes, from 2018-06-01 15:43:47) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2018-01-10 16:21:40) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml ( 112086 bytes, from 2018-01-08 14:56:24) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 146903 bytes, from 2018-06-01 15:44:19) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a6xx.xml ( 44551 bytes, from 2018-06-01 15:43:47) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/a6xx_gmu.xml ( 10431 bytes, from 2018-03-16 17:55:10) | |||
- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2018-01-08 14:56:24) | |||
Copyright (C) 2013-2018 by the following authors: | |||
- Rob Clark <robdclark@gmail.com> (robclark) | |||
@@ -203,6 +205,8 @@ enum adreno_pm4_type3_packets { | |||
CP_EXEC_CS = 51, | |||
CP_PERFCOUNTER_ACTION = 80, | |||
CP_SMMU_TABLE_UPDATE = 83, | |||
CP_SET_MARKER = 101, | |||
CP_SET_PSEUDO_REG = 86, | |||
CP_CONTEXT_REG_BUNCH = 92, | |||
CP_YIELD_ENABLE = 28, | |||
CP_SKIP_IB2_ENABLE_GLOBAL = 29, |