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intel_screen.h 4.9KB

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  1. /*
  2. * Copyright 2003 VMware, Inc.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial portions
  15. * of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  18. * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  21. * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  22. * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  23. * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. */
  25. #ifndef _INTEL_INIT_H_
  26. #define _INTEL_INIT_H_
  27. #include <stdbool.h>
  28. #include <sys/time.h>
  29. #include <GL/internal/dri_interface.h>
  30. #include "isl/isl.h"
  31. #include "dri_util.h"
  32. #include "brw_bufmgr.h"
  33. #include "dev/gen_device_info.h"
  34. #include "drm-uapi/i915_drm.h"
  35. #include "util/xmlconfig.h"
  36. #include "isl/isl.h"
  37. #ifdef __cplusplus
  38. extern "C" {
  39. #endif
  40. struct intel_screen
  41. {
  42. int deviceID;
  43. struct gen_device_info devinfo;
  44. __DRIscreen *driScrnPriv;
  45. uint64_t max_gtt_map_object_size;
  46. /** Bytes of aperture usage beyond which execbuf is likely to fail. */
  47. uint64_t aperture_threshold;
  48. bool no_hw;
  49. bool hw_has_swizzling;
  50. bool has_exec_fence; /**< I915_PARAM_HAS_EXEC_FENCE */
  51. int hw_has_timestamp;
  52. struct isl_device isl_dev;
  53. /**
  54. * Does the kernel support context reset notifications?
  55. */
  56. bool has_context_reset_notification;
  57. /**
  58. * Does the kernel support features such as pipelined register access to
  59. * specific registers?
  60. */
  61. unsigned kernel_features;
  62. #define KERNEL_ALLOWS_SOL_OFFSET_WRITES (1<<0)
  63. #define KERNEL_ALLOWS_PREDICATE_WRITES (1<<1)
  64. #define KERNEL_ALLOWS_MI_MATH_AND_LRR (1<<2)
  65. #define KERNEL_ALLOWS_HSW_SCRATCH1_AND_ROW_CHICKEN3 (1<<3)
  66. #define KERNEL_ALLOWS_COMPUTE_DISPATCH (1<<4)
  67. #define KERNEL_ALLOWS_EXEC_CAPTURE (1<<5)
  68. #define KERNEL_ALLOWS_EXEC_BATCH_FIRST (1<<6)
  69. #define KERNEL_ALLOWS_CONTEXT_ISOLATION (1<<7)
  70. struct brw_bufmgr *bufmgr;
  71. /**
  72. * A unique ID for shader programs.
  73. */
  74. unsigned program_id;
  75. int winsys_msaa_samples_override;
  76. struct brw_compiler *compiler;
  77. /**
  78. * Configuration cache with default values for all contexts
  79. */
  80. driOptionCache optionCache;
  81. /**
  82. * Version of the command parser reported by the
  83. * I915_PARAM_CMD_PARSER_VERSION parameter
  84. */
  85. int cmd_parser_version;
  86. /**
  87. * Number of subslices reported by the I915_PARAM_SUBSLICE_TOTAL parameter
  88. */
  89. int subslice_total;
  90. /**
  91. * Number of EUs reported by the I915_PARAM_EU_TOTAL parameter
  92. */
  93. int eu_total;
  94. bool mesa_format_supports_texture[MESA_FORMAT_COUNT];
  95. bool mesa_format_supports_render[MESA_FORMAT_COUNT];
  96. enum isl_format mesa_to_isl_render_format[MESA_FORMAT_COUNT];
  97. struct disk_cache *disk_cache;
  98. };
  99. extern void intelDestroyContext(__DRIcontext * driContextPriv);
  100. extern GLboolean intelUnbindContext(__DRIcontext * driContextPriv);
  101. PUBLIC const __DRIextension **__driDriverGetExtensions_i965(void);
  102. extern const __DRI2fenceExtension intelFenceExtension;
  103. extern GLboolean
  104. intelMakeCurrent(__DRIcontext * driContextPriv,
  105. __DRIdrawable * driDrawPriv,
  106. __DRIdrawable * driReadPriv);
  107. double get_time(void);
  108. const int*
  109. intel_supported_msaa_modes(const struct intel_screen *screen);
  110. int
  111. intel_device_get_revision(int fd);
  112. static inline bool
  113. can_do_pipelined_register_writes(const struct intel_screen *screen)
  114. {
  115. return screen->kernel_features & KERNEL_ALLOWS_SOL_OFFSET_WRITES;
  116. }
  117. static inline bool
  118. can_do_hsw_l3_atomics(const struct intel_screen *screen)
  119. {
  120. return screen->kernel_features & KERNEL_ALLOWS_HSW_SCRATCH1_AND_ROW_CHICKEN3;
  121. }
  122. static inline bool
  123. can_do_mi_math_and_lrr(const struct intel_screen *screen)
  124. {
  125. return screen->kernel_features & KERNEL_ALLOWS_MI_MATH_AND_LRR;
  126. }
  127. static inline bool
  128. can_do_compute_dispatch(const struct intel_screen *screen)
  129. {
  130. return screen->kernel_features & KERNEL_ALLOWS_COMPUTE_DISPATCH;
  131. }
  132. static inline bool
  133. can_do_predicate_writes(const struct intel_screen *screen)
  134. {
  135. return screen->kernel_features & KERNEL_ALLOWS_PREDICATE_WRITES;
  136. }
  137. static inline bool
  138. can_do_exec_capture(const struct intel_screen *screen)
  139. {
  140. return screen->kernel_features & KERNEL_ALLOWS_EXEC_CAPTURE;
  141. }
  142. #ifdef __cplusplus
  143. }
  144. #endif
  145. #endif