Clone of mesa.
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intel_be_device.c 6.2KB

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  1. /*
  2. * Authors: Keith Whitwell <keithw-at-tungstengraphics-dot-com>
  3. * Jakob Bornecrantz <jakob-at-tungstengraphics-dot-com>
  4. */
  5. #include "intel_be_device.h"
  6. #include "ws_dri_bufmgr.h"
  7. #include "ws_dri_bufpool.h"
  8. #include "ws_dri_fencemgr.h"
  9. #include "pipe/p_winsys.h"
  10. #include "pipe/p_defines.h"
  11. #include "pipe/p_state.h"
  12. #include "pipe/p_util.h"
  13. #include "pipe/p_inlines.h"
  14. /* Turn a pipe winsys into an intel/pipe winsys:
  15. */
  16. static INLINE struct intel_be_device *
  17. intel_be_device( struct pipe_winsys *winsys )
  18. {
  19. return (struct intel_be_device *)winsys;
  20. }
  21. /*
  22. * Buffer functions.
  23. *
  24. * Most callbacks map direcly onto dri_bufmgr operations:
  25. */
  26. static void *intel_be_buffer_map(struct pipe_winsys *winsys,
  27. struct pipe_buffer *buf,
  28. unsigned flags )
  29. {
  30. unsigned drm_flags = 0;
  31. if (flags & PIPE_BUFFER_USAGE_CPU_WRITE)
  32. drm_flags |= DRM_BO_FLAG_WRITE;
  33. if (flags & PIPE_BUFFER_USAGE_CPU_READ)
  34. drm_flags |= DRM_BO_FLAG_READ;
  35. return driBOMap( dri_bo(buf), drm_flags, 0 );
  36. }
  37. static void intel_be_buffer_unmap(struct pipe_winsys *winsys,
  38. struct pipe_buffer *buf)
  39. {
  40. driBOUnmap( dri_bo(buf) );
  41. }
  42. static void
  43. intel_be_buffer_destroy(struct pipe_winsys *winsys,
  44. struct pipe_buffer *buf)
  45. {
  46. driBOUnReference( dri_bo(buf) );
  47. FREE(buf);
  48. }
  49. static struct pipe_buffer *
  50. intel_be_buffer_create(struct pipe_winsys *winsys,
  51. unsigned alignment,
  52. unsigned usage,
  53. unsigned size )
  54. {
  55. struct intel_be_buffer *buffer = CALLOC_STRUCT( intel_be_buffer );
  56. struct intel_be_device *iws = intel_be_device(winsys);
  57. unsigned flags = 0;
  58. struct _DriBufferPool *pool;
  59. buffer->base.refcount = 1;
  60. buffer->base.alignment = alignment;
  61. buffer->base.usage = usage;
  62. buffer->base.size = size;
  63. if (usage & (PIPE_BUFFER_USAGE_VERTEX | PIPE_BUFFER_USAGE_CONSTANT)) {
  64. flags |= DRM_BO_FLAG_MEM_LOCAL | DRM_BO_FLAG_CACHED;
  65. pool = iws->mallocPool;
  66. } else if (usage & PIPE_BUFFER_USAGE_CUSTOM) {
  67. /* For vertex buffers */
  68. flags |= DRM_BO_FLAG_MEM_VRAM | DRM_BO_FLAG_MEM_TT;
  69. pool = iws->vertexPool;
  70. } else {
  71. flags |= DRM_BO_FLAG_MEM_VRAM | DRM_BO_FLAG_MEM_TT;
  72. pool = iws->regionPool;
  73. }
  74. if (usage & PIPE_BUFFER_USAGE_GPU_READ)
  75. flags |= DRM_BO_FLAG_READ;
  76. if (usage & PIPE_BUFFER_USAGE_GPU_WRITE)
  77. flags |= DRM_BO_FLAG_WRITE;
  78. /* drm complains if we don't set any read/write flags.
  79. */
  80. if ((flags & (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE)) == 0)
  81. flags |= DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE;
  82. buffer->pool = pool;
  83. driGenBuffers( buffer->pool,
  84. "pipe buffer", 1, &buffer->driBO, alignment, flags, 0 );
  85. driBOData( buffer->driBO, size, NULL, buffer->pool, 0 );
  86. return &buffer->base;
  87. }
  88. static struct pipe_buffer *
  89. intel_be_user_buffer_create(struct pipe_winsys *winsys, void *ptr, unsigned bytes)
  90. {
  91. struct intel_be_buffer *buffer = CALLOC_STRUCT( intel_be_buffer );
  92. struct intel_be_device *iws = intel_be_device(winsys);
  93. driGenUserBuffer( iws->regionPool,
  94. "pipe user buffer", &buffer->driBO, ptr, bytes );
  95. buffer->base.refcount = 1;
  96. return &buffer->base;
  97. }
  98. /*
  99. * Surface functions.
  100. *
  101. * Deprecated!
  102. */
  103. static struct pipe_surface *
  104. intel_i915_surface_alloc(struct pipe_winsys *winsys)
  105. {
  106. assert((size_t)"intel_i915_surface_alloc is deprecated" & 0);
  107. return NULL;
  108. }
  109. static int
  110. intel_i915_surface_alloc_storage(struct pipe_winsys *winsys,
  111. struct pipe_surface *surf,
  112. unsigned width, unsigned height,
  113. enum pipe_format format,
  114. unsigned flags,
  115. unsigned tex_usage)
  116. {
  117. assert((size_t)"intel_i915_surface_alloc_storage is deprecated" & 0);
  118. return -1;
  119. }
  120. static void
  121. intel_i915_surface_release(struct pipe_winsys *winsys, struct pipe_surface **s)
  122. {
  123. assert((size_t)"intel_i915_surface_release is deprecated" & 0);
  124. }
  125. /*
  126. * Fence functions
  127. */
  128. static void
  129. intel_be_fence_reference( struct pipe_winsys *sws,
  130. struct pipe_fence_handle **ptr,
  131. struct pipe_fence_handle *fence )
  132. {
  133. if (*ptr)
  134. driFenceUnReference((struct _DriFenceObject **)ptr);
  135. if (fence)
  136. *ptr = (struct pipe_fence_handle *)driFenceReference((struct _DriFenceObject *)fence);
  137. }
  138. static int
  139. intel_be_fence_signalled( struct pipe_winsys *sws,
  140. struct pipe_fence_handle *fence,
  141. unsigned flag )
  142. {
  143. return driFenceSignaled((struct _DriFenceObject *)fence, flag);
  144. }
  145. static int
  146. intel_be_fence_finish( struct pipe_winsys *sws,
  147. struct pipe_fence_handle *fence,
  148. unsigned flag )
  149. {
  150. return driFenceFinish((struct _DriFenceObject *)fence, flag, 0);
  151. }
  152. /*
  153. * Misc functions
  154. */
  155. boolean
  156. intel_be_init_device(struct intel_be_device *dev, int fd)
  157. {
  158. dev->fd = fd;
  159. dev->max_batch_size = 16 * 4096;
  160. dev->max_vertex_size = 128 * 4096;
  161. dev->base.buffer_create = intel_be_buffer_create;
  162. dev->base.user_buffer_create = intel_be_user_buffer_create;
  163. dev->base.buffer_map = intel_be_buffer_map;
  164. dev->base.buffer_unmap = intel_be_buffer_unmap;
  165. dev->base.buffer_destroy = intel_be_buffer_destroy;
  166. dev->base.surface_alloc = intel_i915_surface_alloc;
  167. dev->base.surface_alloc_storage = intel_i915_surface_alloc_storage;
  168. dev->base.surface_release = intel_i915_surface_release;
  169. dev->base.fence_reference = intel_be_fence_reference;
  170. dev->base.fence_signalled = intel_be_fence_signalled;
  171. dev->base.fence_finish = intel_be_fence_finish;
  172. #if 0 /* Set by the winsys */
  173. dev->base.flush_frontbuffer = intel_flush_frontbuffer;
  174. dev->base.get_name = intel_get_name;
  175. #endif
  176. dev->fMan = driInitFreeSlabManager(10, 10);
  177. dev->fenceMgr = driFenceMgrTTMInit(dev->fd);
  178. dev->mallocPool = driMallocPoolInit();
  179. dev->staticPool = driDRMPoolInit(dev->fd);
  180. dev->regionPool = driDRMPoolInit(dev->fd);
  181. dev->vertexPool = driSlabPoolInit(dev->fd,
  182. DRM_BO_FLAG_READ |
  183. DRM_BO_FLAG_WRITE |
  184. DRM_BO_FLAG_MEM_TT,
  185. DRM_BO_FLAG_READ |
  186. DRM_BO_FLAG_WRITE |
  187. DRM_BO_FLAG_MEM_TT,
  188. dev->max_vertex_size,
  189. 1, 120, dev->max_vertex_size * 4, 0,
  190. dev->fMan);
  191. dev->batchPool = driSlabPoolInit(dev->fd,
  192. DRM_BO_FLAG_EXE |
  193. DRM_BO_FLAG_MEM_TT,
  194. DRM_BO_FLAG_EXE |
  195. DRM_BO_FLAG_MEM_TT,
  196. dev->max_batch_size,
  197. 1, 40, dev->max_batch_size * 16, 0,
  198. dev->fMan);
  199. return true;
  200. }
  201. void
  202. intel_be_destroy_device(struct intel_be_device *dev)
  203. {
  204. driPoolTakeDown(dev->mallocPool);
  205. driPoolTakeDown(dev->staticPool);
  206. driPoolTakeDown(dev->regionPool);
  207. driPoolTakeDown(dev->vertexPool);
  208. driPoolTakeDown(dev->batchPool);
  209. /** TODO takedown fenceMgr and fMan */
  210. }