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r600_priv.h 6.8KB

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  1. /*
  2. * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * on the rights to use, copy, modify, merge, publish, distribute, sub
  8. * license, and/or sell copies of the Software, and to permit persons to whom
  9. * the Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Jerome Glisse
  25. */
  26. #ifndef R600_PRIV_H
  27. #define R600_PRIV_H
  28. #include <errno.h>
  29. #include <stdint.h>
  30. #include <stdlib.h>
  31. #include <assert.h>
  32. #include <util/u_double_list.h>
  33. #include <util/u_inlines.h>
  34. #include <os/os_thread.h>
  35. #include "r600.h"
  36. struct r600_bomgr;
  37. struct r600_bo;
  38. struct radeon {
  39. int fd;
  40. int refcount;
  41. unsigned device;
  42. unsigned family;
  43. enum chip_class chip_class;
  44. struct r600_tiling_info tiling_info;
  45. struct r600_bomgr *bomgr;
  46. unsigned fence;
  47. unsigned *cfence;
  48. struct r600_bo *fence_bo;
  49. unsigned clock_crystal_freq;
  50. unsigned num_backends;
  51. unsigned minor_version;
  52. };
  53. struct r600_reg {
  54. unsigned opcode;
  55. unsigned offset_base;
  56. unsigned offset;
  57. unsigned need_bo;
  58. unsigned flush_flags;
  59. unsigned flush_mask;
  60. };
  61. struct radeon_bo {
  62. struct pipe_reference reference;
  63. unsigned handle;
  64. unsigned size;
  65. unsigned alignment;
  66. int map_count;
  67. void *data;
  68. struct list_head fencedlist;
  69. unsigned fence;
  70. struct r600_context *ctx;
  71. boolean shared;
  72. struct r600_reloc *reloc;
  73. unsigned reloc_id;
  74. unsigned last_flush;
  75. };
  76. struct r600_bo {
  77. struct pipe_reference reference;
  78. unsigned size;
  79. unsigned tiling_flags;
  80. unsigned kernel_pitch;
  81. unsigned domains;
  82. struct radeon_bo *bo;
  83. unsigned fence;
  84. /* manager data */
  85. struct list_head list;
  86. unsigned manager_id;
  87. unsigned alignment;
  88. unsigned offset;
  89. int64_t start;
  90. int64_t end;
  91. };
  92. struct r600_bomgr {
  93. struct radeon *radeon;
  94. unsigned usecs;
  95. pipe_mutex mutex;
  96. struct list_head delayed;
  97. unsigned num_delayed;
  98. };
  99. /*
  100. * r600_drm.c
  101. */
  102. struct radeon *r600_new(int fd, unsigned device);
  103. void r600_delete(struct radeon *r600);
  104. /*
  105. * radeon_pciid.c
  106. */
  107. unsigned radeon_family_from_device(unsigned device);
  108. /*
  109. * radeon_bo.c
  110. */
  111. struct radeon_bo *radeon_bo(struct radeon *radeon, unsigned handle,
  112. unsigned size, unsigned alignment);
  113. void radeon_bo_reference(struct radeon *radeon, struct radeon_bo **dst,
  114. struct radeon_bo *src);
  115. int radeon_bo_wait(struct radeon *radeon, struct radeon_bo *bo);
  116. int radeon_bo_busy(struct radeon *radeon, struct radeon_bo *bo, uint32_t *domain);
  117. int radeon_bo_fencelist(struct radeon *radeon, struct radeon_bo **bolist, uint32_t num_bo);
  118. int radeon_bo_get_tiling_flags(struct radeon *radeon,
  119. struct radeon_bo *bo,
  120. uint32_t *tiling_flags,
  121. uint32_t *pitch);
  122. int radeon_bo_get_name(struct radeon *radeon,
  123. struct radeon_bo *bo,
  124. uint32_t *name);
  125. /*
  126. * r600_hw_context.c
  127. */
  128. int r600_context_init_fence(struct r600_context *ctx);
  129. void r600_context_bo_reloc(struct r600_context *ctx, u32 *pm4, struct r600_bo *rbo);
  130. void r600_context_bo_flush(struct r600_context *ctx, unsigned flush_flags,
  131. unsigned flush_mask, struct r600_bo *rbo);
  132. struct r600_bo *r600_context_reg_bo(struct r600_context *ctx, unsigned offset);
  133. int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, unsigned nreg);
  134. /*
  135. * r600_bo.c
  136. */
  137. void r600_bo_destroy(struct radeon *radeon, struct r600_bo *bo);
  138. /*
  139. * r600_bomgr.c
  140. */
  141. struct r600_bomgr *r600_bomgr_create(struct radeon *radeon, unsigned usecs);
  142. void r600_bomgr_destroy(struct r600_bomgr *mgr);
  143. bool r600_bomgr_bo_destroy(struct r600_bomgr *mgr, struct r600_bo *bo);
  144. void r600_bomgr_bo_init(struct r600_bomgr *mgr, struct r600_bo *bo);
  145. struct r600_bo *r600_bomgr_bo_create(struct r600_bomgr *mgr,
  146. unsigned size,
  147. unsigned alignment,
  148. unsigned cfence);
  149. /*
  150. * helpers
  151. */
  152. #define CTX_RANGE_ID(ctx, offset) (((offset) >> (ctx)->hash_shift) & 255)
  153. #define CTX_BLOCK_ID(ctx, offset) ((offset) & ((1 << (ctx)->hash_shift) - 1))
  154. static void inline r600_context_reg(struct r600_context *ctx,
  155. unsigned offset, unsigned value,
  156. unsigned mask)
  157. {
  158. struct r600_range *range;
  159. struct r600_block *block;
  160. unsigned id;
  161. range = &ctx->range[CTX_RANGE_ID(ctx, offset)];
  162. block = range->blocks[CTX_BLOCK_ID(ctx, offset)];
  163. id = (offset - block->start_offset) >> 2;
  164. block->reg[id] &= ~mask;
  165. block->reg[id] |= value;
  166. if (!(block->status & R600_BLOCK_STATUS_DIRTY)) {
  167. ctx->pm4_dirty_cdwords += block->pm4_ndwords;
  168. block->status |= R600_BLOCK_STATUS_ENABLED;
  169. block->status |= R600_BLOCK_STATUS_DIRTY;
  170. LIST_ADDTAIL(&block->list,&ctx->dirty);
  171. }
  172. }
  173. static inline void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *block)
  174. {
  175. int id;
  176. for (int j = 0; j < block->nreg; j++) {
  177. if (block->pm4_bo_index[j]) {
  178. /* find relocation */
  179. id = block->pm4_bo_index[j];
  180. r600_context_bo_reloc(ctx,
  181. &block->pm4[block->reloc[id].bo_pm4_index],
  182. block->reloc[id].bo);
  183. r600_context_bo_flush(ctx,
  184. block->reloc[id].flush_flags,
  185. block->reloc[id].flush_mask,
  186. block->reloc[id].bo);
  187. }
  188. }
  189. memcpy(&ctx->pm4[ctx->pm4_cdwords], block->pm4, block->pm4_ndwords * 4);
  190. ctx->pm4_cdwords += block->pm4_ndwords;
  191. block->status ^= R600_BLOCK_STATUS_DIRTY;
  192. LIST_DELINIT(&block->list);
  193. }
  194. /*
  195. * radeon_bo.c
  196. */
  197. static inline int radeon_bo_map(struct radeon *radeon, struct radeon_bo *bo)
  198. {
  199. bo->map_count++;
  200. return 0;
  201. }
  202. static inline void radeon_bo_unmap(struct radeon *radeon, struct radeon_bo *bo)
  203. {
  204. bo->map_count--;
  205. assert(bo->map_count >= 0);
  206. }
  207. /*
  208. * r600_bo
  209. */
  210. static inline struct radeon_bo *r600_bo_get_bo(struct r600_bo *bo)
  211. {
  212. return bo->bo;
  213. }
  214. static unsigned inline r600_bo_get_handle(struct r600_bo *bo)
  215. {
  216. return bo->bo->handle;
  217. }
  218. static unsigned inline r600_bo_get_size(struct r600_bo *bo)
  219. {
  220. return bo->size;
  221. }
  222. /*
  223. * fence
  224. */
  225. static inline bool fence_is_after(unsigned fence, unsigned ofence)
  226. {
  227. /* handle wrap around */
  228. if (fence < 0x80000000 && ofence > 0x80000000)
  229. return TRUE;
  230. if (fence > ofence)
  231. return TRUE;
  232. return FALSE;
  233. }
  234. #endif