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AMDILNodes.td 19KB

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  1. //===- AMDILNodes.td - AMD IL nodes ------------===//
  2. //
  3. // The LLVM Compiler Infrastructure
  4. //
  5. // This file is distributed under the University of Illinois Open Source
  6. // License. See LICENSE.TXT for details.
  7. //
  8. //==-----------------------------------------------------------------------===//
  9. //===----------------------------------------------------------------------===//
  10. // Conversion DAG Nodes
  11. //===----------------------------------------------------------------------===//
  12. // Double to Single conversion
  13. def IL_d2f : SDNode<"AMDILISD::DP_TO_FP" , SDTIL_DPToFPOp>;
  14. def IL_inttoany: SDNode<"AMDILISD::INTTOANY", SDTIL_IntToAny>;
  15. //===----------------------------------------------------------------------===//
  16. // Flow Control DAG Nodes
  17. //===----------------------------------------------------------------------===//
  18. def IL_brcond : SDNode<"AMDILISD::BRANCH_COND", SDTIL_BRCond, [SDNPHasChain]>;
  19. //===----------------------------------------------------------------------===//
  20. // Comparison DAG Nodes
  21. //===----------------------------------------------------------------------===//
  22. def IL_cmp : SDNode<"AMDILISD::CMP", SDTIL_Cmp>;
  23. //===----------------------------------------------------------------------===//
  24. // Call/Return DAG Nodes
  25. //===----------------------------------------------------------------------===//
  26. def IL_callseq_start : SDNode<"ISD::CALLSEQ_START", SDTIL_CallSeqStart,
  27. [SDNPHasChain, SDNPOutGlue]>;
  28. def IL_callseq_end : SDNode<"ISD::CALLSEQ_END", SDTIL_CallSeqEnd,
  29. [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>;
  30. def IL_call : SDNode<"AMDILISD::CALL", SDTIL_Call,
  31. [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>;
  32. def IL_retflag : SDNode<"AMDILISD::RET_FLAG", SDTNone,
  33. [SDNPHasChain, SDNPOptInGlue]>;
  34. //===----------------------------------------------------------------------===//
  35. // Arithmetic DAG Nodes
  36. //===----------------------------------------------------------------------===//
  37. // Address modification nodes
  38. def IL_addaddrri : SDNode<"AMDILISD::ADDADDR", SDTIL_AddAddrri,
  39. [SDNPCommutative, SDNPAssociative]>;
  40. def IL_addaddrir : SDNode<"AMDILISD::ADDADDR", SDTIL_AddAddrir,
  41. [SDNPCommutative, SDNPAssociative]>;
  42. //===--------------------------------------------------------------------===//
  43. // Instructions
  44. //===--------------------------------------------------------------------===//
  45. // Floating point math functions
  46. def IL_cmov_logical : SDNode<"AMDILISD::CMOVLOG", SDTIL_GenTernaryOp>;
  47. def IL_add : SDNode<"AMDILISD::ADD" , SDTIL_GenBinaryOp>;
  48. def IL_cmov : SDNode<"AMDILISD::CMOV" , SDTIL_GenBinaryOp>;
  49. def IL_or : SDNode<"AMDILISD::OR" ,SDTIL_GenBinaryOp>;
  50. def IL_and : SDNode<"AMDILISD::AND" ,SDTIL_GenBinaryOp>;
  51. def IL_xor : SDNode<"AMDILISD::XOR", SDTIL_GenBinaryOp>;
  52. def IL_not : SDNode<"AMDILISD::NOT", SDTIL_GenUnaryOp>;
  53. def IL_div_inf : SDNode<"AMDILISD::DIV_INF", SDTIL_GenBinaryOp>;
  54. def IL_mad : SDNode<"AMDILISD::MAD", SDTIL_GenTernaryOp>;
  55. //===----------------------------------------------------------------------===//
  56. // Integer functions
  57. //===----------------------------------------------------------------------===//
  58. def IL_inegate : SDNode<"AMDILISD::INEGATE" , SDTIntUnaryOp>;
  59. def IL_umul : SDNode<"AMDILISD::UMUL" , SDTIntBinOp,
  60. [SDNPCommutative, SDNPAssociative]>;
  61. def IL_mov : SDNode<"AMDILISD::MOVE", SDTIL_GenUnaryOp>;
  62. def IL_phimov : SDNode<"AMDILISD::PHIMOVE", SDTIL_GenUnaryOp>;
  63. def IL_bitconv : SDNode<"AMDILISD::BITCONV", SDTIL_GenBitConv>;
  64. def IL_ffb_hi : SDNode<"AMDILISD::IFFB_HI", SDTIL_GenUnaryOp>;
  65. def IL_ffb_lo : SDNode<"AMDILISD::IFFB_LO", SDTIL_GenUnaryOp>;
  66. def IL_smax : SDNode<"AMDILISD::SMAX", SDTIL_GenBinaryOp>;
  67. //===----------------------------------------------------------------------===//
  68. // Double functions
  69. //===----------------------------------------------------------------------===//
  70. def IL_dcreate : SDNode<"AMDILISD::DCREATE" , SDTIL_DCreate>;
  71. def IL_dcomphi : SDNode<"AMDILISD::DCOMPHI" , SDTIL_DComp>;
  72. def IL_dcomplo : SDNode<"AMDILISD::DCOMPLO" , SDTIL_DComp>;
  73. def IL_dcreate2 : SDNode<"AMDILISD::DCREATE2" , SDTIL_DCreate2>;
  74. def IL_dcomphi2 : SDNode<"AMDILISD::DCOMPHI2" , SDTIL_DComp2>;
  75. def IL_dcomplo2 : SDNode<"AMDILISD::DCOMPLO2" , SDTIL_DComp2>;
  76. //===----------------------------------------------------------------------===//
  77. // Long functions
  78. //===----------------------------------------------------------------------===//
  79. def IL_lcreate : SDNode<"AMDILISD::LCREATE" , SDTIL_LCreate>;
  80. def IL_lcreate2 : SDNode<"AMDILISD::LCREATE2" , SDTIL_LCreate2>;
  81. def IL_lcomphi : SDNode<"AMDILISD::LCOMPHI" , SDTIL_LComp>;
  82. def IL_lcomphi2 : SDNode<"AMDILISD::LCOMPHI2" , SDTIL_LComp2>;
  83. def IL_lcomplo : SDNode<"AMDILISD::LCOMPLO" , SDTIL_LComp>;
  84. def IL_lcomplo2 : SDNode<"AMDILISD::LCOMPLO2" , SDTIL_LComp2>;
  85. //===----------------------------------------------------------------------===//
  86. // Vector functions
  87. //===----------------------------------------------------------------------===//
  88. def IL_vbuild : SDNode<"AMDILISD::VBUILD", SDTIL_GenVecBuild,
  89. []>;
  90. def IL_vextract : SDNode<"AMDILISD::VEXTRACT", SDTIL_GenVecExtract,
  91. []>;
  92. def IL_vinsert : SDNode<"AMDILISD::VINSERT", SDTIL_GenVecInsert,
  93. []>;
  94. def IL_vconcat : SDNode<"AMDILISD::VCONCAT", SDTIL_GenVecConcat,
  95. []>;
  96. //===----------------------------------------------------------------------===//
  97. // AMDIL Image Custom SDNodes
  98. //===----------------------------------------------------------------------===//
  99. def image2d_read : SDNode<"AMDILISD::IMAGE2D_READ", SDTIL_ImageRead,
  100. [SDNPHasChain, SDNPMayLoad]>;
  101. def image2d_write : SDNode<"AMDILISD::IMAGE2D_WRITE", SDTIL_ImageWrite,
  102. [SDNPHasChain, SDNPMayStore]>;
  103. def image2d_info0 : SDNode<"AMDILISD::IMAGE2D_INFO0", SDTIL_ImageInfo, []>;
  104. def image2d_info1 : SDNode<"AMDILISD::IMAGE2D_INFO1", SDTIL_ImageInfo, []>;
  105. def image3d_read : SDNode<"AMDILISD::IMAGE3D_READ", SDTIL_ImageRead,
  106. [SDNPHasChain, SDNPMayLoad]>;
  107. def image3d_write : SDNode<"AMDILISD::IMAGE3D_WRITE", SDTIL_ImageWrite3D,
  108. [SDNPHasChain, SDNPMayStore]>;
  109. def image3d_info0 : SDNode<"AMDILISD::IMAGE3D_INFO0", SDTIL_ImageInfo, []>;
  110. def image3d_info1 : SDNode<"AMDILISD::IMAGE3D_INFO1", SDTIL_ImageInfo, []>;
  111. //===----------------------------------------------------------------------===//
  112. // AMDIL Atomic Custom SDNodes
  113. //===----------------------------------------------------------------------===//
  114. //===-------------- 32 bit global atomics with return values --------------===//
  115. def atom_g_add : SDNode<"AMDILISD::ATOM_G_ADD", SDTIL_BinAtom,
  116. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  117. def atom_g_and : SDNode<"AMDILISD::ATOM_G_AND", SDTIL_BinAtom,
  118. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  119. def atom_g_cmpxchg : SDNode<"AMDILISD::ATOM_G_CMPXCHG", SDTIL_TriAtom,
  120. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  121. def atom_g_dec : SDNode<"AMDILISD::ATOM_G_DEC", SDTIL_BinAtom,
  122. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  123. def atom_g_inc : SDNode<"AMDILISD::ATOM_G_INC", SDTIL_BinAtom,
  124. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  125. def atom_g_max : SDNode<"AMDILISD::ATOM_G_MAX", SDTIL_BinAtom,
  126. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  127. def atom_g_umax : SDNode<"AMDILISD::ATOM_G_UMAX", SDTIL_BinAtom,
  128. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  129. def atom_g_min : SDNode<"AMDILISD::ATOM_G_MIN", SDTIL_BinAtom,
  130. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  131. def atom_g_umin : SDNode<"AMDILISD::ATOM_G_UMIN", SDTIL_BinAtom,
  132. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  133. def atom_g_or : SDNode<"AMDILISD::ATOM_G_OR", SDTIL_BinAtom,
  134. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  135. def atom_g_sub : SDNode<"AMDILISD::ATOM_G_SUB", SDTIL_BinAtom,
  136. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  137. def atom_g_rsub : SDNode<"AMDILISD::ATOM_G_RSUB", SDTIL_BinAtom,
  138. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  139. def atom_g_xchg : SDNode<"AMDILISD::ATOM_G_XCHG", SDTIL_BinAtom,
  140. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  141. def atom_g_xor : SDNode<"AMDILISD::ATOM_G_XOR", SDTIL_BinAtom,
  142. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  143. //===------------- 32 bit global atomics without return values ------------===//
  144. def atom_g_add_noret : SDNode<"AMDILISD::ATOM_G_ADD_NORET", SDTIL_BinAtom,
  145. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  146. def atom_g_and_noret : SDNode<"AMDILISD::ATOM_G_AND_NORET", SDTIL_BinAtom,
  147. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  148. def atom_g_cmpxchg_noret : SDNode<"AMDILISD::ATOM_G_CMPXCHG_NORET",
  149. SDTIL_TriAtom, [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  150. def atom_g_cmp_noret : SDNode<"AMDILISD::ATOM_G_CMPXCHG_NORET",
  151. SDTIL_TriAtom, [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  152. def atom_g_dec_noret : SDNode<"AMDILISD::ATOM_G_DEC_NORET", SDTIL_BinAtom,
  153. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  154. def atom_g_inc_noret : SDNode<"AMDILISD::ATOM_G_INC_NORET", SDTIL_BinAtom,
  155. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  156. def atom_g_max_noret : SDNode<"AMDILISD::ATOM_G_MAX_NORET", SDTIL_BinAtom,
  157. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  158. def atom_g_umax_noret: SDNode<"AMDILISD::ATOM_G_UMAX_NORET",
  159. SDTIL_BinAtom, [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  160. def atom_g_min_noret : SDNode<"AMDILISD::ATOM_G_MIN_NORET", SDTIL_BinAtom,
  161. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  162. def atom_g_umin_noret: SDNode<"AMDILISD::ATOM_G_UMIN_NORET",
  163. SDTIL_BinAtom, [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  164. def atom_g_or_noret : SDNode<"AMDILISD::ATOM_G_OR_NORET", SDTIL_BinAtom,
  165. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  166. def atom_g_sub_noret : SDNode<"AMDILISD::ATOM_G_SUB_NORET", SDTIL_BinAtom,
  167. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  168. def atom_g_rsub_noret : SDNode<"AMDILISD::ATOM_G_RSUB_NORET", SDTIL_BinAtom,
  169. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  170. def atom_g_xchg_noret: SDNode<"AMDILISD::ATOM_G_XCHG_NORET",
  171. SDTIL_BinAtom, [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  172. def atom_g_xor_noret : SDNode<"AMDILISD::ATOM_G_XOR_NORET", SDTIL_BinAtom,
  173. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  174. //===--------------- 32 bit local atomics with return values --------------===//
  175. def atom_l_add : SDNode<"AMDILISD::ATOM_L_ADD", SDTIL_BinAtom,
  176. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  177. def atom_l_and : SDNode<"AMDILISD::ATOM_L_AND", SDTIL_BinAtom,
  178. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  179. def atom_l_cmpxchg : SDNode<"AMDILISD::ATOM_L_CMPXCHG", SDTIL_TriAtom,
  180. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  181. def atom_l_dec : SDNode<"AMDILISD::ATOM_L_DEC", SDTIL_BinAtom,
  182. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  183. def atom_l_inc : SDNode<"AMDILISD::ATOM_L_INC", SDTIL_BinAtom,
  184. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  185. def atom_l_max : SDNode<"AMDILISD::ATOM_L_MAX", SDTIL_BinAtom,
  186. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  187. def atom_l_umax : SDNode<"AMDILISD::ATOM_L_UMAX", SDTIL_BinAtom,
  188. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  189. def atom_l_min : SDNode<"AMDILISD::ATOM_L_MIN", SDTIL_BinAtom,
  190. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  191. def atom_l_umin : SDNode<"AMDILISD::ATOM_L_UMIN", SDTIL_BinAtom,
  192. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  193. def atom_l_or : SDNode<"AMDILISD::ATOM_L_OR", SDTIL_BinAtom,
  194. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  195. def atom_l_mskor : SDNode<"AMDILISD::ATOM_L_MSKOR", SDTIL_TriAtom,
  196. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  197. def atom_l_sub : SDNode<"AMDILISD::ATOM_L_SUB", SDTIL_BinAtom,
  198. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  199. def atom_l_rsub : SDNode<"AMDILISD::ATOM_L_RSUB", SDTIL_BinAtom,
  200. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  201. def atom_l_xchg : SDNode<"AMDILISD::ATOM_L_XCHG", SDTIL_BinAtom,
  202. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  203. def atom_l_xor : SDNode<"AMDILISD::ATOM_L_XOR", SDTIL_BinAtom,
  204. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  205. //===-------------- 32 bit local atomics without return values ------------===//
  206. def atom_l_add_noret : SDNode<"AMDILISD::ATOM_L_ADD_NORET", SDTIL_BinAtom,
  207. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  208. def atom_l_and_noret : SDNode<"AMDILISD::ATOM_L_AND_NORET", SDTIL_BinAtom,
  209. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  210. def atom_l_cmpxchg_noret : SDNode<"AMDILISD::ATOM_L_CMPXCHG_NORET",
  211. SDTIL_TriAtom, [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  212. def atom_l_dec_noret : SDNode<"AMDILISD::ATOM_L_DEC_NORET", SDTIL_BinAtom,
  213. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  214. def atom_l_inc_noret : SDNode<"AMDILISD::ATOM_L_INC_NORET", SDTIL_BinAtom,
  215. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  216. def atom_l_max_noret : SDNode<"AMDILISD::ATOM_L_MAX_NORET", SDTIL_BinAtom,
  217. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  218. def atom_l_umax_noret: SDNode<"AMDILISD::ATOM_L_UMAX_NORET",
  219. SDTIL_BinAtom, [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  220. def atom_l_min_noret : SDNode<"AMDILISD::ATOM_L_MIN_NORET", SDTIL_BinAtom,
  221. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  222. def atom_l_umin_noret: SDNode<"AMDILISD::ATOM_L_UMIN_NORET",
  223. SDTIL_BinAtom, [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  224. def atom_l_or_noret : SDNode<"AMDILISD::ATOM_L_OR_NORET", SDTIL_BinAtom,
  225. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  226. def atom_l_mskor_noret : SDNode<"AMDILISD::ATOM_L_MSKOR_NORET",
  227. SDTIL_TriAtom, [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  228. def atom_l_sub_noret : SDNode<"AMDILISD::ATOM_L_SUB_NORET", SDTIL_BinAtom,
  229. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  230. def atom_l_rsub_noret : SDNode<"AMDILISD::ATOM_L_RSUB_NORET",
  231. SDTIL_BinAtom, [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  232. def atom_l_xchg_noret: SDNode<"AMDILISD::ATOM_L_XCHG_NORET",
  233. SDTIL_BinAtom, [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  234. def atom_l_xor_noret : SDNode<"AMDILISD::ATOM_L_XOR_NORET", SDTIL_BinAtom,
  235. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  236. //===--------------- 32 bit local atomics with return values --------------===//
  237. def atom_r_add : SDNode<"AMDILISD::ATOM_R_ADD", SDTIL_BinAtom,
  238. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  239. def atom_r_and : SDNode<"AMDILISD::ATOM_R_AND", SDTIL_BinAtom,
  240. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  241. def atom_r_cmpxchg : SDNode<"AMDILISD::ATOM_R_CMPXCHG", SDTIL_TriAtom,
  242. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  243. def atom_r_dec : SDNode<"AMDILISD::ATOM_R_DEC", SDTIL_BinAtom,
  244. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  245. def atom_r_inc : SDNode<"AMDILISD::ATOM_R_INC", SDTIL_BinAtom,
  246. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  247. def atom_r_max : SDNode<"AMDILISD::ATOM_R_MAX", SDTIL_BinAtom,
  248. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  249. def atom_r_umax : SDNode<"AMDILISD::ATOM_R_UMAX", SDTIL_BinAtom,
  250. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  251. def atom_r_min : SDNode<"AMDILISD::ATOM_R_MIN", SDTIL_BinAtom,
  252. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  253. def atom_r_umin : SDNode<"AMDILISD::ATOM_R_UMIN", SDTIL_BinAtom,
  254. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  255. def atom_r_or : SDNode<"AMDILISD::ATOM_R_OR", SDTIL_BinAtom,
  256. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  257. def atom_r_mskor : SDNode<"AMDILISD::ATOM_R_MSKOR", SDTIL_TriAtom,
  258. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  259. def atom_r_sub : SDNode<"AMDILISD::ATOM_R_SUB", SDTIL_BinAtom,
  260. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  261. def atom_r_rsub : SDNode<"AMDILISD::ATOM_R_RSUB", SDTIL_BinAtom,
  262. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  263. def atom_r_xchg : SDNode<"AMDILISD::ATOM_R_XCHG", SDTIL_BinAtom,
  264. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  265. def atom_r_xor : SDNode<"AMDILISD::ATOM_R_XOR", SDTIL_BinAtom,
  266. [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  267. //===-------------- 32 bit local atomics without return values ------------===//
  268. def atom_r_add_noret : SDNode<"AMDILISD::ATOM_R_ADD_NORET", SDTIL_BinAtom,
  269. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  270. def atom_r_and_noret : SDNode<"AMDILISD::ATOM_R_AND_NORET", SDTIL_BinAtom,
  271. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  272. def atom_r_cmpxchg_noret : SDNode<"AMDILISD::ATOM_R_CMPXCHG_NORET",
  273. SDTIL_TriAtom, [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  274. def atom_r_dec_noret : SDNode<"AMDILISD::ATOM_R_DEC_NORET", SDTIL_BinAtom,
  275. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  276. def atom_r_inc_noret : SDNode<"AMDILISD::ATOM_R_INC_NORET", SDTIL_BinAtom,
  277. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  278. def atom_r_max_noret : SDNode<"AMDILISD::ATOM_R_MAX_NORET", SDTIL_BinAtom,
  279. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  280. def atom_r_umax_noret: SDNode<"AMDILISD::ATOM_R_UMAX_NORET",
  281. SDTIL_BinAtom, [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  282. def atom_r_min_noret : SDNode<"AMDILISD::ATOM_R_MIN_NORET", SDTIL_BinAtom,
  283. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  284. def atom_r_umin_noret: SDNode<"AMDILISD::ATOM_R_UMIN_NORET",
  285. SDTIL_BinAtom, [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  286. def atom_r_or_noret : SDNode<"AMDILISD::ATOM_R_OR_NORET", SDTIL_BinAtom,
  287. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  288. def atom_r_mskor_noret : SDNode<"AMDILISD::ATOM_R_MSKOR_NORET", SDTIL_TriAtom,
  289. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  290. def atom_r_sub_noret : SDNode<"AMDILISD::ATOM_R_SUB_NORET", SDTIL_BinAtom,
  291. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  292. def atom_r_rsub_noret : SDNode<"AMDILISD::ATOM_R_RSUB_NORET", SDTIL_BinAtom,
  293. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  294. def atom_r_xchg_noret: SDNode<"AMDILISD::ATOM_R_XCHG_NORET",
  295. SDTIL_BinAtom, [SDNPHasChain, SDNPMayLoad, SDNPMayStore, SDNPMemOperand]>;
  296. def atom_r_xor_noret : SDNode<"AMDILISD::ATOM_R_XOR_NORET", SDTIL_BinAtom,
  297. [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
  298. //===--------------- 32 bit atomic counter instructions -------------------===//
  299. def append_alloc : SDNode<"AMDILISD::APPEND_ALLOC", SDTIL_Append,
  300. [SDNPHasChain, SDNPMayLoad, SDNPMayStore]>;
  301. def append_consume : SDNode<"AMDILISD::APPEND_CONSUME", SDTIL_Append,
  302. [SDNPHasChain, SDNPMayLoad, SDNPMayStore]>;
  303. def append_alloc_noret : SDNode<"AMDILISD::APPEND_ALLOC_NORET", SDTIL_Append,
  304. [SDNPHasChain, SDNPMayStore]>;
  305. def append_consume_noret : SDNode<"AMDILISD::APPEND_CONSUME_NORET",
  306. SDTIL_Append, [SDNPHasChain, SDNPMayStore]>;