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radv: don't enable tc compat for d32s8 + 4/8 samples (v1.1)

This seems to be broken, at least the cts tests fail.

This fixes:
dEQP-VK.renderpass.suballocation.multisample.d32_sfloat_s8_uint.samples_4
dEQP-VK.renderpass.suballocation.multisample.d32_sfloat_s8_uint.samples_8

2 samples seems to pass fine, amdvlk doesn't appear to enable TC for
possibly some other reasons here.

This is most likely a hack.

v1.1: add a bit of explaination text. (Samuel)
Fixes: ad3d98da9 (radv: enable tc compatible htile for d32s8 also.)
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
tags/18.1-branchpoint
Dave Airlie 7 years ago
parent
commit
f4c534ef68
1 changed files with 2 additions and 1 deletions
  1. 2
    1
      src/amd/vulkan/radv_image.c

+ 2
- 1
src/amd/vulkan/radv_image.c View File

pCreateInfo->mipLevels <= 1 && pCreateInfo->mipLevels <= 1 &&
device->physical_device->rad_info.chip_class >= VI && device->physical_device->rad_info.chip_class >= VI &&
((pCreateInfo->format == VK_FORMAT_D32_SFLOAT || ((pCreateInfo->format == VK_FORMAT_D32_SFLOAT ||
pCreateInfo->format == VK_FORMAT_D32_SFLOAT_S8_UINT) ||
/* for some reason TC compat with 4/8 samples breaks some cts tests - disable for now */
(pCreateInfo->samples < 4 && pCreateInfo->format == VK_FORMAT_D32_SFLOAT_S8_UINT)) ||
(device->physical_device->rad_info.chip_class >= GFX9 && (device->physical_device->rad_info.chip_class >= GFX9 &&
pCreateInfo->format == VK_FORMAT_D16_UNORM))) pCreateInfo->format == VK_FORMAT_D16_UNORM)))
surface->flags |= RADEON_SURF_TC_COMPATIBLE_HTILE; surface->flags |= RADEON_SURF_TC_COMPATIBLE_HTILE;

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