i965/vec4: Define helper functions to convert a register to a variable index.

Reviewed-by: Matt Turner <mattst88@gmail.com>

src/mesa/drivers/dri/i965/brw_vec4_cse.cpp

@@ -22,6 +22,7 @@
  */
 
 #include "brw_vec4.h"
+#include "brw_vec4_live_variables.h"
 #include "brw_cfg.h"
 
 using namespace brw;

src/mesa/drivers/dri/i965/brw_vec4_dead_code_eliminate.cpp

@@ -81,8 +81,7 @@ vec4_visitor::dead_code_eliminate()
             bool result_live[4] = { false };
 
             for (int c = 0; c < 4; c++) {
-               int var = inst->dst.reg * 4 + c;
-               result_live[c] = BITSET_TEST(live, var);
+               result_live[c] = BITSET_TEST(live, var_from_reg(alloc, inst->dst, c));
             }
 
             /* If the instruction can't do writemasking, then it's all or
@@ -125,8 +124,7 @@ vec4_visitor::dead_code_eliminate()
          if (inst->dst.file == GRF && !inst->predicate) {
             for (int c = 0; c < 4; c++) {
                if (inst->dst.writemask & (1 << c)) {
-                  int var = inst->dst.reg * 4 + c;
-                  BITSET_CLEAR(live, var);
+                  BITSET_CLEAR(live, var_from_reg(alloc, inst->dst, c));
                }
             }
          }
@@ -138,10 +136,7 @@ vec4_visitor::dead_code_eliminate()
          for (int i = 0; i < 3; i++) {
             if (inst->src[i].file == GRF) {
                for (int c = 0; c < 4; c++) {
-                  int swiz = BRW_GET_SWZ(inst->src[i].swizzle, c);
-                  int var = inst->src[i].reg * 4 + swiz;
-
-                  BITSET_SET(live, var);
+                  BITSET_SET(live, var_from_reg(alloc, inst->src[i], c));
                }
             }
          }

src/mesa/drivers/dri/i965/brw_vec4_live_variables.cpp

@@ -76,12 +76,10 @@ vec4_live_variables::setup_def_use()
 	 /* Set use[] for this instruction */
 	 for (unsigned int i = 0; i < 3; i++) {
 	    if (inst->src[i].file == GRF) {
-	       int reg = inst->src[i].reg;
-
-               for (int j = 0; j < 4; j++) {
-                  int c = BRW_GET_SWZ(inst->src[i].swizzle, j);
-                  if (!BITSET_TEST(bd->def, reg * 4 + c))
-                     BITSET_SET(bd->use, reg * 4 + c);
+               for (int c = 0; c < 4; c++) {
+                  const unsigned v = var_from_reg(alloc, inst->src[i], c);
+                  if (!BITSET_TEST(bd->def, v))
+                     BITSET_SET(bd->use, v);
                }
 	    }
 	 }
@@ -100,9 +98,9 @@ vec4_live_variables::setup_def_use()
 	     !inst->predicate) {
             for (int c = 0; c < 4; c++) {
                if (inst->dst.writemask & (1 << c)) {
-                  int reg = inst->dst.reg;
-                  if (!BITSET_TEST(bd->use, reg * 4 + c))
-                     BITSET_SET(bd->def, reg * 4 + c);
+                  const unsigned v = var_from_reg(alloc, inst->dst, c);
+                  if (!BITSET_TEST(bd->use, v))
+                     BITSET_SET(bd->def, v);
                }
             }
          }
@@ -250,24 +248,20 @@ vec4_visitor::calculate_live_intervals()
    foreach_block_and_inst(block, vec4_instruction, inst, cfg) {
       for (unsigned int i = 0; i < 3; i++) {
 	 if (inst->src[i].file == GRF) {
-	    int reg = inst->src[i].reg;
-
-            for (int j = 0; j < 4; j++) {
-               int c = BRW_GET_SWZ(inst->src[i].swizzle, j);
-
-               start[reg * 4 + c] = MIN2(start[reg * 4 + c], ip);
-               end[reg * 4 + c] = ip;
+            for (int c = 0; c < 4; c++) {
+               const unsigned v = var_from_reg(alloc, inst->src[i], c);
+               start[v] = MIN2(start[v], ip);
+               end[v] = ip;
             }
 	 }
       }
 
       if (inst->dst.file == GRF) {
-         int reg = inst->dst.reg;
-
          for (int c = 0; c < 4; c++) {
             if (inst->dst.writemask & (1 << c)) {
-               start[reg * 4 + c] = MIN2(start[reg * 4 + c], ip);
-               end[reg * 4 + c] = ip;
+               const unsigned v = var_from_reg(alloc, inst->dst, c);
+               start[v] = MIN2(start[v], ip);
+               end[v] = ip;
             }
          }
       }

src/mesa/drivers/dri/i965/brw_vec4_live_variables.h

@@ -78,4 +78,20 @@ protected:
    void *mem_ctx;
 };
 
+inline unsigned
+var_from_reg(const simple_allocator &alloc, const src_reg &reg,
+             unsigned c = 0)
+{
+   assert(reg.file == GRF && reg.reg < alloc.count && c < 4);
+   return 4 * reg.reg + BRW_GET_SWZ(reg.swizzle, c);
+}
+
+inline unsigned
+var_from_reg(const simple_allocator &alloc, const dst_reg &reg,
+             unsigned c = 0)
+{
+   assert(reg.file == GRF && reg.reg < alloc.count && c < 4);
+   return 4 * reg.reg + c;
+}
+
 } /* namespace brw */