gallium: Remove every double semi-colon

Signed-off-by: Jakob Sinclair <sinclair.jakob@openmailbox.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>

src/gallium/drivers/freedreno/a3xx/fd3_emit.c

@@ -217,7 +217,7 @@ emit_textures(struct fd_context *ctx, struct fd_ringbuffer *ring,
 				j = 1;
 			} else {
 				unsigned start = fd_sampler_first_level(&view->base);
-				unsigned end   = fd_sampler_last_level(&view->base);;
+				unsigned end   = fd_sampler_last_level(&view->base);
 
 				for (j = 0; j < (end - start + 1); j++) {
 					struct fd_resource_slice *slice =

src/gallium/drivers/ilo/ilo_resource.c

@@ -473,7 +473,7 @@ tex_init_image(struct ilo_texture *tex,
    struct ilo_screen *is = ilo_screen(tex->base.screen);
    const struct pipe_resource *templ = &tex->base;
    struct ilo_image *img = &tex->image;
-   struct intel_bo *imported_bo = NULL;;
+   struct intel_bo *imported_bo = NULL;
    struct ilo_image_info info;
 
    tex->image_format = resource_get_image_format(templ,

src/gallium/drivers/ilo/shader/ilo_shader_gs.c

@@ -1375,7 +1375,7 @@ ilo_shader_compile_gs(const struct ilo_shader_state *state,
    toy_tgsi_cleanup(&gcc.tgsi);
    toy_compiler_cleanup(&gcc.tc);
 
-   return gcc.shader;;
+   return gcc.shader;
 }
 
 static bool

src/gallium/drivers/nouveau/codegen/nv50_ir_ssa.cpp

@@ -169,7 +169,7 @@ void DominatorTree::build()
    do {
       p = 0;
       for (v = 1; v < count; ++v) {
-         nw = &BasicBlock::get(vert[DOM(v)])->dom;;
+         nw = &BasicBlock::get(vert[DOM(v)])->dom;
          nv = &BasicBlock::get(vert[v])->dom;
          if (nw->getGraph() && !nv->getGraph()) {
             ++p;

src/gallium/drivers/nouveau/nv30/nv30_vbo.c

@@ -445,7 +445,7 @@ nv30_draw_elements_inline_u32_short(struct nouveau_pushbuf *push,
 
    count >>= 1;
    while (count) {
-      unsigned npush = MIN2(count, NV04_PFIFO_MAX_PACKET_LEN);;
+      unsigned npush = MIN2(count, NV04_PFIFO_MAX_PACKET_LEN);
       count -= npush;
 
       BEGIN_NI04(push, NV30_3D(VB_ELEMENT_U16), npush);

src/gallium/drivers/r600/r600_state_common.c

@@ -1125,7 +1125,7 @@ static void r600_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask
 
 static void r600_update_driver_const_buffers(struct r600_context *rctx)
 {
-	int sh, size;;
+	int sh, size;
 	void *ptr;
 	struct pipe_constant_buffer cb;
 	for (sh = 0; sh < PIPE_SHADER_TYPES; sh++) {

src/gallium/drivers/swr/rasterizer/core/format_types.h

@@ -1061,13 +1061,13 @@ struct ComponentTraits
         switch (comp)
         {
         case 0:
-            return TypeTraits<X, NumBitsX>::convertSrgb(in);;
+            return TypeTraits<X, NumBitsX>::convertSrgb(in);
         case 1:
-            return TypeTraits<Y, NumBitsY>::convertSrgb(in);;
+            return TypeTraits<Y, NumBitsY>::convertSrgb(in);
         case 2:
-            return TypeTraits<Z, NumBitsZ>::convertSrgb(in);;
+            return TypeTraits<Z, NumBitsZ>::convertSrgb(in);
         case 3:
-            return TypeTraits<W, NumBitsW>::convertSrgb(in);;
+            return TypeTraits<W, NumBitsW>::convertSrgb(in);
         }
         SWR_ASSERT(0);
         return TypeTraits<X, NumBitsX>::convertSrgb(in);

src/gallium/drivers/swr/rasterizer/memory/StoreTile.cpp

@@ -753,7 +753,7 @@ struct OptStoreRasterTile< TilingTraits<SWR_TILE_NONE, 8>, SrcFormat, DstFormat
                 ConvertPixelsSOAtoAOS<SrcFormat, DstFormat>::Convert(pSrc, ppRows);
 
                 ppRows[0] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2;
-                ppRows[1] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2;;
+                ppRows[1] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2;
                 pSrc += SRC_BYTES_PER_PIXEL * KNOB_SIMD_WIDTH;
             }
 
@@ -806,7 +806,7 @@ struct OptStoreRasterTile< TilingTraits<SWR_TILE_NONE, 16>, SrcFormat, DstFormat
                 ConvertPixelsSOAtoAOS<SrcFormat, DstFormat>::Convert(pSrc, ppRows);
 
                 ppRows[0] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2;
-                ppRows[1] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2;;
+                ppRows[1] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2;
                 pSrc += SRC_BYTES_PER_PIXEL * KNOB_SIMD_WIDTH;
             }
 
@@ -859,7 +859,7 @@ struct OptStoreRasterTile< TilingTraits<SWR_TILE_NONE, 32>, SrcFormat, DstFormat
                 ConvertPixelsSOAtoAOS<SrcFormat, DstFormat>::Convert(pSrc, ppRows);
 
                 ppRows[0] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2;
-                ppRows[1] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2;;
+                ppRows[1] += KNOB_SIMD_WIDTH * DST_BYTES_PER_PIXEL / 2;
                 pSrc += SRC_BYTES_PER_PIXEL * KNOB_SIMD_WIDTH;
             }
 

src/gallium/winsys/amdgpu/drm/addrlib/core/addrobject.cpp

@@ -115,7 +115,7 @@ VOID* AddrObject::ClientAlloc(
 VOID* AddrObject::AddrMalloc(
     size_t objSize) const   ///< [in] Size to allocate
 {
-    return ClientAlloc(objSize, &m_client);;
+    return ClientAlloc(objSize, &m_client);
 }
 
 /**

src/gallium/winsys/amdgpu/drm/addrlib/r800/egbaddrlib.cpp

@@ -3374,7 +3374,7 @@ UINT_64 EgBasedAddrLib::ComputeFmaskAddrFromCoordMicroTiled(
     //
     if (!resolved)
     {
-        effectiveSamples = ComputeFmaskNumPlanesFromNumSamples(numSamples);;
+        effectiveSamples = ComputeFmaskNumPlanesFromNumSamples(numSamples);
         effectiveBpp = numSamples;
 
         //