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@@ -1585,6 +1585,7 @@ radv_flush_constants(struct radv_cmd_buffer *cmd_buffer, |
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? cmd_buffer->state.compute_pipeline |
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: cmd_buffer->state.pipeline; |
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struct radv_pipeline_layout *layout = pipeline->layout; |
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struct radv_shader_variant *shader, *prev_shader; |
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unsigned offset; |
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void *ptr; |
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uint64_t va; |
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@@ -1609,10 +1610,16 @@ radv_flush_constants(struct radv_cmd_buffer *cmd_buffer, |
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MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, |
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cmd_buffer->cs, MESA_SHADER_STAGES * 4); |
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prev_shader = NULL; |
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radv_foreach_stage(stage, stages) { |
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if (pipeline->shaders[stage]) { |
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shader = radv_get_shader(pipeline, stage); |
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/* Avoid redundantly emitting the address for merged stages. */ |
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if (shader && shader != prev_shader) { |
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radv_emit_userdata_address(cmd_buffer, pipeline, stage, |
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AC_UD_PUSH_CONSTANTS, va); |
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prev_shader = shader; |
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} |
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} |
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