| @@ -325,9 +325,29 @@ void r300_emit_vertex_format_state(struct r300_context* r300) | |||
| END_CS; | |||
| } | |||
| void r300_emit_vertex_shader(struct r300_context* r300, | |||
| struct r300_vertex_shader* vs) | |||
| { | |||
| CS_LOCALS(r300); | |||
| int i; | |||
| BEGIN_CS(1 + (vs->instruction_count * 4)); | |||
| OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, vs->instruction_count * 4); | |||
| for (i = 0; i < vs->instruction_count; i++) { | |||
| OUT_CS(vs->instructions[i].inst0); | |||
| OUT_CS(vs->instructions[i].inst1); | |||
| OUT_CS(vs->instructions[i].inst2); | |||
| OUT_CS(vs->instructions[i].inst3); | |||
| } | |||
| END_CS; | |||
| } | |||
| void r300_emit_viewport_state(struct r300_context* r300, | |||
| struct r300_viewport_state* viewport) | |||
| { | |||
| /* XXX has_tcl */ | |||
| return; | |||
| CS_LOCALS(r300); | |||
| @@ -64,6 +64,9 @@ void r300_emit_texture(struct r300_context* r300, | |||
| void r300_emit_vertex_format_state(struct r300_context* r300); | |||
| void r300_emit_vertex_shader(struct r300_context* r300, | |||
| struct r300_vertex_shader* vs); | |||
| void r300_emit_viewport_state(struct r300_context* r300, | |||
| struct r300_viewport_state* viewport); | |||
| @@ -156,33 +156,5 @@ void r300_emit_invariant_state(struct r300_context* r300) | |||
| OUT_CS(R300_US_OUT_FMT_UNUSED); | |||
| OUT_CS(R300_US_OUT_FMT_UNUSED); | |||
| OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0); | |||
| /* XXX these magic numbers should be explained when | |||
| * this becomes a cached state object */ | |||
| if (caps->has_tcl) { | |||
| OUT_CS_REG(R300_VAP_CNTL, 0xA | | |||
| (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | | |||
| (0xB << R300_VF_MAX_VTX_NUM_SHIFT) | | |||
| (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); | |||
| OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000); | |||
| OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000); | |||
| OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001); | |||
| /* XXX translate these back into normal instructions */ | |||
| OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); | |||
| OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); | |||
| OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 8); | |||
| OUT_CS(0x00F00203); | |||
| OUT_CS(0x00D10001); | |||
| OUT_CS(0x01248001); | |||
| OUT_CS(0x00000000); | |||
| OUT_CS(0x00F02203); | |||
| OUT_CS(0x00D10021); | |||
| OUT_CS(0x01248021); | |||
| OUT_CS(0x00000000); | |||
| } else { | |||
| OUT_CS_REG(R300_VAP_CNTL, 0xA | | |||
| (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | | |||
| (0x5 << R300_VF_MAX_VTX_NUM_SHIFT) | | |||
| (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); | |||
| } | |||
| END_CS; | |||
| } | |||
| @@ -66,6 +66,18 @@ struct r300_vs_asm { | |||
| unsigned imm_count; | |||
| }; | |||
| static struct r300_vertex_shader r300_passthrough_vertex_shader = { | |||
| .instruction_count = 2, | |||
| .instructions[0].inst0 = 0xF00203, | |||
| .instructions[0].inst1 = 0xD10001, | |||
| .instructions[0].inst2 = 0x1248001, | |||
| .instructions[0].inst3 = 0x0, | |||
| .instructions[1].inst0 = 0xF00203, | |||
| .instructions[1].inst1 = 0xD10021, | |||
| .instructions[1].inst2 = 0x1248021, | |||
| .instructions[1].inst3 = 0x0, | |||
| }; | |||
| void r300_translate_vertex_shader(struct r300_context* r300, | |||
| struct r300_vertex_shader* vs); | |||
| @@ -39,6 +39,27 @@ static void r300_surface_setup(struct pipe_context* pipe, | |||
| r300_emit_dsa_state(r300, &dsa_clear_state); | |||
| r300_emit_rs_state(r300, &rs_clear_state); | |||
| /* XXX these magic numbers should be explained when | |||
| * this becomes a cached state object */ | |||
| if (caps->has_tcl) { | |||
| OUT_CS_REG(R300_VAP_CNTL, 0xA | | |||
| (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | | |||
| (0xB << R300_VF_MAX_VTX_NUM_SHIFT) | | |||
| (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); | |||
| OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000); | |||
| OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000); | |||
| OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001); | |||
| /* XXX translate these back into normal instructions */ | |||
| OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1); | |||
| OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0); | |||
| r300_emit_vertex_shader(r300, &r300_passthrough_vertex_shader); | |||
| } else { | |||
| OUT_CS_REG(R300_VAP_CNTL, 0xA | | |||
| (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) | | |||
| (0x5 << R300_VF_MAX_VTX_NUM_SHIFT) | | |||
| (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT)); | |||
| } | |||
| BEGIN_CS(15); | |||
| /* Pixel scissors. */ | |||
| @@ -32,6 +32,7 @@ | |||
| #include "r300_cs.h" | |||
| #include "r300_emit.h" | |||
| #include "r300_state_shader.h" | |||
| #include "r300_state_tcl.h" | |||
| #include "r300_state_inlines.h" | |||
| const struct r300_blend_state blend_clear_state = { | |||