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radeon/llvm: Remove AMDILLiteralManager.cpp

tags/i965-primitive-restart-v2
Tom Stellard 13 лет назад
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Сommit
d96682169e

+ 0
- 2
src/gallium/drivers/radeon/AMDIL.h Просмотреть файл

@@ -104,8 +104,6 @@ FunctionPass*
createAMDILCFGPreparationPass(TargetMachine &TM AMDIL_OPT_LEVEL_DECL);
FunctionPass*
createAMDILCFGStructurizerPass(TargetMachine &TM AMDIL_OPT_LEVEL_DECL);
FunctionPass*
createAMDILLiteralManager(TargetMachine &TM AMDIL_OPT_LEVEL_DECL);

extern Target TheAMDILTarget;
extern Target TheAMDGPUTarget;

+ 0
- 125
src/gallium/drivers/radeon/AMDILLiteralManager.cpp Просмотреть файл

@@ -1,125 +0,0 @@
//===--- AMDILLiteralManager.cpp - AMDIL Literal Manager Pass --*- C++ -*--===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//==-----------------------------------------------------------------------===//

#define DEBUG_TYPE "literal_manager"

#include "AMDIL.h"

#include "AMDILAlgorithms.tpp"
#include "AMDILMachineFunctionInfo.h"
#include "AMDILSubtarget.h"
#include "AMDILTargetMachine.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Support/Debug.h"
#include "llvm/Target/TargetMachine.h"

using namespace llvm;


// AMDIL Literal Manager traverses through all of the LOADCONST instructions and
// converts them from an immediate value to the literal index. The literal index
// is valid IL, but the immediate values are not. The Immediate values must be
// aggregated and declared for clarity and to reduce the number of literals that
// are used. It is also illegal to declare the same literal twice, so this keeps
// that from occuring.

namespace {
class AMDILLiteralManager : public MachineFunctionPass {
public:
static char ID;
AMDILLiteralManager(TargetMachine &tm AMDIL_OPT_LEVEL_DECL);
virtual const char *getPassName() const;

bool runOnMachineFunction(MachineFunction &MF);
private:
bool trackLiterals(MachineBasicBlock::iterator *bbb);
TargetMachine &TM;
const AMDILSubtarget *mSTM;
AMDILMachineFunctionInfo *mMFI;
int32_t mLitIdx;
bool mChanged;
};
char AMDILLiteralManager::ID = 0;
}

namespace llvm {
FunctionPass *
createAMDILLiteralManager(TargetMachine &tm AMDIL_OPT_LEVEL_DECL) {
return new AMDILLiteralManager(tm AMDIL_OPT_LEVEL_VAR);
}
}

AMDILLiteralManager::AMDILLiteralManager(TargetMachine &tm
AMDIL_OPT_LEVEL_DECL)
: MachineFunctionPass(ID),
TM(tm) {
}

bool AMDILLiteralManager::runOnMachineFunction(MachineFunction &MF) {
mChanged = false;
mMFI = MF.getInfo<AMDILMachineFunctionInfo>();
const AMDILTargetMachine *amdtm =
reinterpret_cast<const AMDILTargetMachine *>(&TM);
mSTM = dynamic_cast<const AMDILSubtarget *>(amdtm->getSubtargetImpl());
safeNestedForEach(MF.begin(), MF.end(), MF.begin()->begin(),
std::bind1st(std::mem_fun(&AMDILLiteralManager::trackLiterals), this));
return mChanged;
}

bool AMDILLiteralManager::trackLiterals(MachineBasicBlock::iterator *bbb) {
MachineInstr *MI = *bbb;
uint32_t Opcode = MI->getOpcode();
switch(Opcode) {
default:
return false;
case AMDIL::LOADCONST_i8:
case AMDIL::LOADCONST_i16:
case AMDIL::LOADCONST_i32:
case AMDIL::LOADCONST_i64:
case AMDIL::LOADCONST_f32:
case AMDIL::LOADCONST_f64:
break;
};
MachineOperand &dstOp = MI->getOperand(0);
MachineOperand &litOp = MI->getOperand(1);
if (!litOp.isImm() && !litOp.isFPImm()) {
return false;
}
if (!dstOp.isReg()) {
return false;
}
// Change the literal to the correct index for each literal that is found.
if (litOp.isImm()) {
int64_t immVal = litOp.getImm();
uint32_t idx = MI->getOpcode() == AMDIL::LOADCONST_i64
? mMFI->addi64Literal(immVal)
: mMFI->addi32Literal(static_cast<int>(immVal), Opcode);
litOp.ChangeToImmediate(idx);
return false;
}

if (litOp.isFPImm()) {
const ConstantFP *fpVal = litOp.getFPImm();
uint32_t idx = MI->getOpcode() == AMDIL::LOADCONST_f64
? mMFI->addf64Literal(fpVal)
: mMFI->addf32Literal(fpVal);
litOp.ChangeToImmediate(idx);
return false;
}

return false;
}

const char* AMDILLiteralManager::getPassName() const {
return "AMDIL Constant Propagation";
}



+ 0
- 1
src/gallium/drivers/radeon/AMDILTargetMachine.cpp Просмотреть файл

@@ -184,7 +184,6 @@ bool AMDILPassConfig::addPreEmitPass()
{
PM.add(createAMDILCFGPreparationPass(*TM));
PM.add(createAMDILCFGStructurizerPass(*TM));
PM.add(createAMDILLiteralManager(*TM));
return true;
}


+ 0
- 1
src/gallium/drivers/radeon/Makefile.sources Просмотреть файл

@@ -29,7 +29,6 @@ CPP_SOURCES := \
AMDILIntrinsicInfo.cpp \
AMDILISelDAGToDAG.cpp \
AMDILISelLowering.cpp \
AMDILLiteralManager.cpp \
AMDILMachineFunctionInfo.cpp \
AMDILMachinePeephole.cpp \
AMDILMCCodeEmitter.cpp \

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