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@@ -77,7 +77,7 @@ nv04_scaled_image_format(enum pipe_format format) |
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} |
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static INLINE unsigned |
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nv04_swizzle_bits(unsigned x, unsigned y) |
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nv04_swizzle_bits_square(unsigned x, unsigned y) |
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{ |
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unsigned u = (x & 0x001) << 0 | |
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(x & 0x002) << 1 | |
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@@ -107,6 +107,15 @@ nv04_swizzle_bits(unsigned x, unsigned y) |
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return v | u; |
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} |
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/* rectangular swizzled textures are linear concatenations of swizzled square tiles */ |
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static INLINE unsigned |
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nv04_swizzle_bits(unsigned x, unsigned y, unsigned w, unsigned h) |
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{ |
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unsigned s = MIN2(w, h); |
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unsigned m = s - 1; |
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return (((x | y) & ~m) * s) | nv04_swizzle_bits_square(x & m, y & m); |
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} |
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static int |
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nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx, |
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struct pipe_surface *dst, int dx, int dy, |
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@@ -159,10 +168,10 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx, |
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sub_w = MIN2(sub_w, w - x); |
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/* Must be 64-byte aligned */ |
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assert(!((dst->offset + nv04_swizzle_bits(dx+x, dy+y) * util_format_get_blocksize(dst->texture->format)) & 63)); |
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assert(!((dst->offset + nv04_swizzle_bits(dx+x, dy+y, w, h) * util_format_get_blocksize(dst->texture->format)) & 63)); |
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BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_OFFSET, 1); |
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OUT_RELOCl(chan, dst_bo, dst->offset + nv04_swizzle_bits(dx+x, dy+y) * util_format_get_blocksize(dst->texture->format), |
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OUT_RELOCl(chan, dst_bo, dst->offset + nv04_swizzle_bits(dx+x, dy+y, w, h) * util_format_get_blocksize(dst->texture->format), |
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NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); |
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BEGIN_RING(chan, sifm, NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION, 9); |