i965: Use has_surface_tile_offset in depth/stencil alignment workaround.

Currently, has_surface_tile_offset is equivalent to gen == 4 && !is_g4x.

We already use it for related checks in brw_wm_surface_state.c, so it
makes sense to use it here too.  It's simpler and more future-proof.

Broadwell also lacks surface tile offsets.  With this patch, I won't
need to update any generation checking; I can simply not set the flag.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

src/mesa/drivers/dri/i965/brw_misc_state.c

@@ -338,7 +338,7 @@ brw_workaround_depthstencil_alignment(struct brw_context *brw,
          rebase_depth = true;
 
       /* We didn't even have intra-tile offsets before g45. */
-      if (brw->gen == 4 && !brw->is_g4x) {
+      if (!brw->has_surface_tile_offset) {
          if (tile_x || tile_y)
             rebase_depth = true;
       }
@@ -397,7 +397,7 @@ brw_workaround_depthstencil_alignment(struct brw_context *brw,
       if (stencil_tile_x & 7 || stencil_tile_y & 7)
          rebase_stencil = true;
 
-      if (brw->gen == 4 && !brw->is_g4x) {
+      if (!brw->has_surface_tile_offset) {
          if (stencil_tile_x || stencil_tile_y)
             rebase_stencil = true;
       }