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ilo: convert generic depth-stencil-alpha pipe state to ilo pipe state

Moving the work to create time reduces the work at emit time.
Saves time overall as create work is only done once.
Fix compiler warning in gen7_pipeline_sol.

[olv: remember pipe_alpha_state instead of pipe_depth_stencil_alpha_state in
      ilo_dsa_state]
tags/mesa-9.2-rc1
Courtney Goeltzenleuchter 12 anni fa
parent
commit
c6983ea035

+ 4
- 4
src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.c Vedi File

@@ -669,7 +669,7 @@ gen6_pipeline_wm(struct ilo_3d_pipeline *p,
const struct ilo_shader *fs = (ilo->fs)? ilo->fs->shader : NULL;
const int num_samplers = ilo->sampler[PIPE_SHADER_FRAGMENT].count;
const bool dual_blend = ilo->blend->dual_blend;
const bool cc_may_kill = (ilo->dsa->state.alpha.enabled ||
const bool cc_may_kill = (ilo->dsa->alpha.enabled ||
ilo->blend->alpha_to_coverage);

if (fs)
@@ -802,7 +802,7 @@ gen6_pipeline_state_cc(struct ilo_3d_pipeline *p,
/* BLEND_STATE */
if (DIRTY(BLEND) || DIRTY(FRAMEBUFFER) || DIRTY(DEPTH_STENCIL_ALPHA)) {
p->state.BLEND_STATE = p->gen6_BLEND_STATE(p->dev,
ilo->blend, &ilo->fb, &ilo->dsa->state.alpha, p->cp);
ilo->blend, &ilo->fb, &ilo->dsa->alpha, p->cp);

session->cc_state_blend_changed = true;
}
@@ -811,7 +811,7 @@ gen6_pipeline_state_cc(struct ilo_3d_pipeline *p,
if (DIRTY(DEPTH_STENCIL_ALPHA) || DIRTY(STENCIL_REF) || DIRTY(BLEND_COLOR)) {
p->state.COLOR_CALC_STATE =
p->gen6_COLOR_CALC_STATE(p->dev, &ilo->stencil_ref,
ilo->dsa->state.alpha.ref_value, &ilo->blend_color, p->cp);
ilo->dsa->alpha.ref_value, &ilo->blend_color, p->cp);

session->cc_state_cc_changed = true;
}
@@ -819,7 +819,7 @@ gen6_pipeline_state_cc(struct ilo_3d_pipeline *p,
/* DEPTH_STENCIL_STATE */
if (DIRTY(DEPTH_STENCIL_ALPHA)) {
p->state.DEPTH_STENCIL_STATE =
p->gen6_DEPTH_STENCIL_STATE(p->dev, &ilo->dsa->state, p->cp);
p->gen6_DEPTH_STENCIL_STATE(p->dev, ilo->dsa, p->cp);

session->cc_state_dsa_changed = true;
}

+ 2
- 2
src/gallium/drivers/ilo/ilo_3d_pipeline_gen7.c Vedi File

@@ -385,7 +385,7 @@ gen7_pipeline_sol(struct ilo_3d_pipeline *p,
sh = ilo->gs->shader;
dirty_sh = DIRTY(GS);
}
else if (ilo->vs) {
else {
so_info = &ilo->vs->info.stream_output;
sh = ilo->vs->shader;
dirty_sh = DIRTY(VS);
@@ -462,7 +462,7 @@ gen7_pipeline_wm(struct ilo_3d_pipeline *p,
if (DIRTY(FS) || DIRTY(BLEND) || DIRTY(DEPTH_STENCIL_ALPHA) ||
DIRTY(RASTERIZER)) {
const struct ilo_shader *fs = (ilo->fs)? ilo->fs->shader : NULL;
const bool cc_may_kill = (ilo->dsa->state.alpha.enabled ||
const bool cc_may_kill = (ilo->dsa->alpha.enabled ||
ilo->blend->alpha_to_coverage);

if (fs)

+ 9
- 1
src/gallium/drivers/ilo/ilo_gpe.h Vedi File

@@ -113,7 +113,10 @@ struct ilo_rasterizer_state {
};

struct ilo_dsa_state {
struct pipe_depth_stencil_alpha_state state;
/* DEPTH_STENCIL_STATE */
uint32_t payload[3];

struct pipe_alpha_state alpha;
};

struct ilo_blend_cso {
@@ -221,6 +224,11 @@ void
ilo_gpe_set_scissor_null(const struct ilo_dev_info *dev,
struct ilo_scissor_state *scissor);

void
ilo_gpe_init_dsa(const struct ilo_dev_info *dev,
const struct pipe_depth_stencil_alpha_state *state,
struct ilo_dsa_state *dsa);

void
ilo_gpe_init_blend(const struct ilo_dev_info *dev,
const struct pipe_blend_state *state,

+ 33
- 12
src/gallium/drivers/ilo/ilo_gpe_gen6.c Vedi File

@@ -3573,22 +3573,23 @@ gen6_emit_BLEND_STATE(const struct ilo_dev_info *dev,
return state_offset;
}

static uint32_t
gen6_emit_DEPTH_STENCIL_STATE(const struct ilo_dev_info *dev,
const struct pipe_depth_stencil_alpha_state *dsa,
struct ilo_cp *cp)
void
ilo_gpe_init_dsa(const struct ilo_dev_info *dev,
const struct pipe_depth_stencil_alpha_state *state,
struct ilo_dsa_state *dsa)
{
const struct pipe_depth_state *depth = &dsa->depth;
const struct pipe_stencil_state *stencil0 = &dsa->stencil[0];
const struct pipe_stencil_state *stencil1 = &dsa->stencil[1];
const int state_align = 64 / 4;
const int state_len = 3;
uint32_t state_offset, *dw;
const struct pipe_depth_state *depth = &state->depth;
const struct pipe_stencil_state *stencil0 = &state->stencil[0];
const struct pipe_stencil_state *stencil1 = &state->stencil[1];
uint32_t *dw;

ILO_GPE_VALID_GEN(dev, 6, 7);

dw = ilo_cp_steal_ptr(cp, "DEPTH_STENCIL_STATE",
state_len, state_align, &state_offset);
/* copy alpha state for later use */
dsa->alpha = state->alpha;

STATIC_ASSERT(Elements(dsa->payload) >= 3);
dw = dsa->payload;

/*
* From the Sandy Bridge PRM, volume 2 part 1, page 359:
@@ -3653,6 +3654,26 @@ gen6_emit_DEPTH_STENCIL_STATE(const struct ilo_dev_info *dev,
dw[2] |= gen6_translate_dsa_func(depth->func) << 27;
else
dw[2] |= BRW_COMPAREFUNCTION_ALWAYS << 27;
}

static uint32_t
gen6_emit_DEPTH_STENCIL_STATE(const struct ilo_dev_info *dev,
const struct ilo_dsa_state *dsa,
struct ilo_cp *cp)
{
const int state_align = 64 / 4;
const int state_len = 3;
uint32_t state_offset, *dw;


ILO_GPE_VALID_GEN(dev, 6, 7);

dw = ilo_cp_steal_ptr(cp, "DEPTH_STENCIL_STATE",
state_len, state_align, &state_offset);

dw[0] = dsa->payload[0];
dw[1] = dsa->payload[1];
dw[2] = dsa->payload[2];

return state_offset;
}

+ 1
- 1
src/gallium/drivers/ilo/ilo_gpe_gen6.h Vedi File

@@ -407,7 +407,7 @@ typedef uint32_t

typedef uint32_t
(*ilo_gpe_gen6_DEPTH_STENCIL_STATE)(const struct ilo_dev_info *dev,
const struct pipe_depth_stencil_alpha_state *dsa,
const struct ilo_dsa_state *dsa,
struct ilo_cp *cp);

typedef uint32_t

+ 2
- 1
src/gallium/drivers/ilo/ilo_state.c Vedi File

@@ -332,12 +332,13 @@ static void *
ilo_create_depth_stencil_alpha_state(struct pipe_context *pipe,
const struct pipe_depth_stencil_alpha_state *state)
{
struct ilo_context *ilo = ilo_context(pipe);
struct ilo_dsa_state *dsa;

dsa = MALLOC_STRUCT(ilo_dsa_state);
assert(dsa);

dsa->state = *state;
ilo_gpe_init_dsa(ilo->dev, state, dsa);

return dsa;
}

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