Browse Source

Reorganized hardware state data structures and state emission. Don't track

which registers changed in all the functions that change the state. Instead
check which registers changed in the end when the hardware state is updated.
Tried to avoid cosmetic (whitespace) changes in this commit.
tags/R300_DRIVER_0
Felix Kuehling 21 years ago
parent
commit
c6338e60ff

+ 128
- 157
src/mesa/drivers/dri/savage/savage_3d_reg.h View File

@@ -47,11 +47,11 @@ typedef union
unsigned int ofs : 28;
}ni;
unsigned int ui;
} Reg_ZPixelOffset;
} savageRegZPixelOffset;

/* This reg exists only on Savage4. */
typedef union
{
/* This reg exists only on Savage4. */
struct
{
unsigned int cmpFunc : 3;
@@ -64,14 +64,14 @@ typedef union
unsigned int reserved : 3;
}ni;
unsigned int ui;
} Reg_StencilCtrl;
} savageRegStencilCtrl;

/**************************
Texture Registers
**************************/
/* The layout of this reg differs between Savage4 and Savage3D. */
typedef union
{
/* The layout of this reg differs between Savage4 and Savage3D. */
struct
{
unsigned int tex0Width : 4;
@@ -87,7 +87,11 @@ typedef union
unsigned int reserved : 1;
unsigned int palSize : 2;
unsigned int newPal : 1;
}s4;
}ni;
unsigned int ui;
} savageRegTexDescr_s4;
typedef union
{
struct
{
unsigned int texWidth : 4;
@@ -100,14 +104,14 @@ typedef union
unsigned int palSize : 2;
unsigned int reserved3 : 10;
unsigned int newPal : 1;
}s3d;
}ni;
unsigned int ui;
} Reg_TexDescr;
} savageRegTexDescr_s3d;

/* The layout of this reg is the same on Savage4 and Savage3D,
but the Savage4 has two of them, Savage3D has only one. */
typedef union
{
/* The layout of this reg is the same on Savage4 and Savage3D,
but the Savage4 has two of them, Savage3D has only one. */
struct
{
unsigned int inSysTex : 1;
@@ -116,35 +120,34 @@ typedef union
unsigned int addr : 29;
}ni;
unsigned int ui;
} Reg_TexAddr;
} savageRegTexAddr;

/* The layout of this reg is the same on Savage4 and Savage3D. */
typedef union
{
/* The layout of this reg is the same on Savage4 and Savage3D,
but the Savage4 has two of them, Savage3D has only one. */
struct
{
unsigned int reserved : 3;
unsigned int addr : 29;
}ni;
unsigned int ui;
} Reg_TexPalAddr;
} savageRegTexPalAddr;

/* The layout of this reg on Savage4 and Savage3D are very similar. */
typedef union
{
/* The layout of this reg on Savage4 and Savage3D are very similar. */
struct
{
unsigned int xprClr0 : 16;
unsigned int xprClr1 : 16; /* this is reserved on Savage3D */
}ni;
unsigned int ui;
} Reg_TexXprClr; /* transparency color in RGB565 format*/
} savageRegTexXprClr; /* transparency color in RGB565 format*/

/* The layout of this reg differs between Savage4 and Savage3D.
* Savage4 has two of them, Savage3D has only one. */
typedef union
{
/* The layout of this reg differs between Savage4 and Savage3D.
* Savage4 has two of them, Savage3D has only one. */
struct
{
unsigned int filterMode : 2;
@@ -163,7 +166,11 @@ typedef union
unsigned int alphaBlendAlphaSel : 2;
unsigned int alphaArg1Invert : 1;
unsigned int alphaArg2Invert : 1;
}s4;
}ni;
unsigned int ui;
} savageRegTexCtrl_s4;
typedef union
{
struct
{
unsigned int filterMode : 2;
@@ -182,13 +189,13 @@ typedef union
unsigned int CCA : 1;
unsigned int texXprEn : 1;
unsigned int reserved2 : 11;
}s3d;
}ni;
unsigned int ui;
} Reg_TexCtrl;
} savageRegTexCtrl_s3d;

/* This reg exists only on Savage4. */
typedef union
{
/* This reg exists only on Savage4. */
struct
{
unsigned int colorArg1Sel : 2;
@@ -215,11 +222,11 @@ typedef union
unsigned int LeftShiftVal : 2;
}ni;
unsigned int ui;
} Reg_TexBlendCtrl;
} savageRegTexBlendCtrl;

/* This reg exists only on Savage4. */
typedef union
{
/* This reg exists only on Savage4. */
struct
{
unsigned int blue : 8;
@@ -228,7 +235,7 @@ typedef union
unsigned int alpha : 8;
}ni;
unsigned int ui;
} Reg_TexBlendColor;
} savageRegTexBlendColor;

/********************************
Tiled Surface Registers
@@ -244,32 +251,32 @@ typedef union
unsigned int bitPerPixel : 1;
}ni;
unsigned int ui;
} Reg_TiledSurface;
} savageRegTiledSurface;

/********************************
Draw/Shading Control Registers
**********************************/

/* This reg exists only on Savage4. */
typedef union
{
/* This reg exists only on Savage4. */
struct
{
unsigned int scissorXStart : 11;
unsigned int DPerfAccelEn : 1;
unsigned int dPerfAccelEn : 1;
unsigned int scissorYStart : 12;
unsigned int alphaRefVal : 8;
}ni;
unsigned int ui;
} Reg_DrawCtrl0;
} savageRegDrawCtrl0;

/* This reg exists only on Savage4. */
typedef union
{
/* This reg exists only on Savage4. */
struct
{
unsigned int scissorXEnd : 11;
unsigned int XYOffsetEn : 1;
unsigned int xyOffsetEn : 1;
unsigned int scissorYEnd : 12;
unsigned int ditherEn : 1;
unsigned int nonNormTexCoord : 1;
@@ -278,15 +285,15 @@ typedef union
unsigned int alphaTestEn : 1;
}ni;
unsigned int ui;
} Reg_DrawCtrl1;
} savageRegDrawCtrl1;

/* This reg exists only on Savage4. */
typedef union
{
/* This reg exists only on Savage4. */
struct
{
unsigned int dstAlphaMode : 3;
unsigned int DstMinusSrc : 1;
unsigned int dstMinusSrc : 1;
unsigned int srcAlphaMode : 3;
unsigned int binaryFinalAlpha : 1;
unsigned int dstAlphaModeHighBit : 1;
@@ -301,15 +308,15 @@ typedef union
unsigned int flushPdZbufWrites : 1;
}ni;
unsigned int ui;
} Reg_DrawLocalCtrl;
} savageRegDrawLocalCtrl;

/* This reg exists only on Savage3D. */
typedef union
{
/* This reg exists only on Savage3D. */
struct
{
unsigned int ditherEn : 1;
unsigned int XYOffsetEn : 1;
unsigned int xyOffsetEn : 1;
unsigned int cullMode : 2;
unsigned int vertexCountReset : 1;
unsigned int flatShadeEn : 1;
@@ -327,7 +334,7 @@ typedef union
unsigned int interpMode : 1;
}ni;
unsigned int ui;
} Reg_DrawCtrl;
} savageRegDrawCtrl;

#define SAVAGETBC_DECAL_S3D 0
#define SAVAGETBC_MODULATE_S3D 1
@@ -338,9 +345,9 @@ typedef union
#define SAVAGETBC_COPY_S3D 6
#define SAVAGETBC_7_S3D 7

/* This reg exists only on Savage3D. */
typedef union
{
/* This reg exists only on Savage3D. */
struct
{
unsigned int scissorXStart : 11;
@@ -349,11 +356,11 @@ typedef union
unsigned int reserved2 : 5;
} ni;
unsigned int ui;
} Reg_ScissorsStart;
} savageRegScissorsStart;

/* This reg exists only on Savage3D. */
typedef union
{
/* This reg exists only on Savage3D. */
struct
{
unsigned int scissorXEnd : 11;
@@ -362,17 +369,17 @@ typedef union
unsigned int reserved2 : 5;
} ni;
unsigned int ui;
} Reg_ScissorsEnd;
} savageRegScissorsEnd;

/********************************
Address Registers
**********************************/

/* I havn't found a Savage3D equivalent of this reg in the Utah-driver.
* But Tim Roberts claims that the Savage3D supports DMA vertex and
* command buffers. */
typedef union
{
/* I havn't found a Savage3D equivalent of this reg in the Utah-driver.
* But Tim Roberts claims that the Savage3D supports DMA vertex and
* command buffers. */
struct
{
unsigned int isSys : 1;
@@ -381,13 +388,13 @@ typedef union
unsigned int addr : 29; /*quad word aligned*/
}ni;
unsigned int ui;
} Reg_VertBufAddr;
} savageRegVertBufAddr;

/* I havn't found a Savage3D equivalent of this reg in the Utah-driver.
* But Tim Roberts claims that the Savage3D supports DMA vertex and
* command buffers. */
typedef union
{
/* I havn't found a Savage3D equivalent of this reg in the Utah-driver.
* But Tim Roberts claims that the Savage3D supports DMA vertex and
* command buffers. */
struct
{
unsigned int isSys : 1;
@@ -396,14 +403,14 @@ typedef union
unsigned int addr : 29; /*4-quad word aligned*/
}ni;
unsigned int ui;
} Reg_DMABufAddr;
} savageRegDMABufAddr;

/********************************
H/W Debug Registers
**********************************/
/* The layout of this reg is the same on Savage4 and Savage3D. */
typedef union
{
/* The layout of this reg is the same on Savage4 and Savage3D. */
struct
{
unsigned int y01 : 1;
@@ -424,15 +431,15 @@ typedef union
unsigned int kickOff : 1;
}ni;
unsigned int ui;
} Reg_Flag;
} savageRegFlag;

/********************************
Z Buffer Registers -- Global
**********************************/

/* The layout of this reg differs between Savage4 and Savage3D. */
typedef union
{
/* The layout of this reg differs between Savage4 and Savage3D. */
struct
{
unsigned int zCmpFunc : 3;
@@ -447,7 +454,11 @@ typedef union
unsigned int reserved4 : 4;
unsigned int floatZEn : 1;
unsigned int wToZEn : 1;
}s4;
}ni;
unsigned int ui;
} savageRegZBufCtrl_s4;
typedef union
{
struct {
unsigned int zCmpFunc : 3;
unsigned int drawUpdateEn : 1;
@@ -457,13 +468,13 @@ typedef union
unsigned int zExpOffset : 8;
unsigned int wrZafterAlphaTst : 1;
unsigned int reserved2 : 15;
}s3d;
GLuint ui;
}Reg_ZBufCtrl;
}ni;
unsigned int ui;
} savageRegZBufCtrl_s3d;

/* The layout of this reg on Savage4 and Savage3D is very similar. */
typedef union
{
/* The layout of this reg on Savage4 and Savage3D are very similar. */
struct
{
/* In the Utah-Driver the offset is defined as 13-bit, 2k-aligned. */
@@ -473,11 +484,11 @@ typedef union
unsigned int zDepthSelect : 1;
}ni;
unsigned int ui;
} Reg_ZBufOffset;
} savageRegZBufOffset;

/* The layout of this reg is the same on Savage4 and Savage3D. */
typedef union
{
/* The layout of this reg is the same on Savage4 and Savage3D. */
struct
{
unsigned int rLow : 6;
@@ -490,14 +501,14 @@ typedef union
unsigned int reserved4 : 2;
}ni;
unsigned int ui;
} Reg_ZWatermarks;
} savageRegZWatermarks;

/********************************
Fog Registers -- Global
**********************************/
/* The layout of this reg is the same on Savage4 and Savage3D. */
typedef union
{
/* The layout of this reg is the same on Savage4 and Savage3D. */
struct
{
unsigned int fogClr : 24;
@@ -508,18 +519,7 @@ typedef union
unsigned int fogEndShift : 2;
}ni;
unsigned int ui;
}Reg_FogCtrl;

typedef struct
{
/* According to the Utah-driver the fog table has 64 entries on
Savage3D. Savage4 uses only 32 entries. */
union
{
unsigned char ucEntry[64];
uint32 ulEntry[16];
}ni;
} Reg_FogTable;
} savageRegFogCtrl;

/*not in spec, but tempo for pp and driver*/
typedef union
@@ -530,15 +530,15 @@ typedef union
unsigned int fogStart : 16;
}ni;
unsigned int ui;
}Reg_FogParam;
} savageRegFogParam;

/**************************************
Destination Buffer Registers -- Global
***************************************/

/* The layout of this reg on Savage4 and Savage3D are very similar. */
typedef union
{
/* The layout of this reg on Savage4 and Savage3D are very similar. */
struct
{
unsigned int dstWidthInTile : 7;
@@ -549,16 +549,16 @@ typedef union
/* antiAliasMode does not exist in the Utah-driver. But it includes the
* high bit of this in the destPixFmt. However, only values 0 and 2
* are used as dstPixFmt, so antiAliasMode is effectively always 0
* in the Utah-driver. In other words, treat as reserved on SavageIX.*/
* in the Utah-driver. In other words, treat as reserved on Savage3D.*/
unsigned int antiAliasMode : 2;
unsigned int dstPixFmt : 1;
}ni;
unsigned int ui;
}Reg_DestCtrl;
} savageRegDestCtrl;

/* The layout of this reg on Savage4 and Savage3D are very similar. */
typedef union
{
/* The layout of this reg on Savage4 and Savage3D are very similar. */
struct
{
unsigned int destReadLow : 6;
@@ -573,85 +573,7 @@ typedef union
unsigned int destFlush : 2;
}ni;
unsigned int ui;
}Reg_DestTexWatermarks;

typedef struct _REGISTERS_
{
union
{
struct
{
unsigned int fDrawLocalCtrlChanged : 1;
unsigned int fTexPalAddrChanged : 1;
unsigned int fTex0CtrlChanged : 1;
unsigned int fTex1CtrlChanged : 1;

unsigned int fTex0AddrChanged : 1;
unsigned int fTex1AddrChanged : 1;
unsigned int fTex0BlendCtrlChanged : 1;
unsigned int fTex1BlendCtrlChanged : 1;

unsigned int fTexXprClrChanged : 1;
unsigned int fTexDescrChanged : 1;
unsigned int fFogTableChanged : 1;
unsigned int fFogCtrlChanged : 1;

unsigned int fStencilCtrlChanged : 1;
unsigned int fZBufCtrlChanged : 1;
unsigned int fZBufOffsetChanged : 1;
unsigned int fDestCtrlChanged : 1;

unsigned int fDrawCtrl0Changed : 1;
unsigned int fDrawCtrl1Changed : 1;
unsigned int fZWatermarksChanged : 1;
unsigned int fDestTexWatermarksChanged : 1;

unsigned int fTexBlendColorChanged : 1;
unsigned int fDrawCtrlChanged : 1;
unsigned int fScissorsStartChanged : 1;
unsigned int fScissorsEndChanged : 1;

unsigned int fScissorsChanged : 1; /* doesn't correspond to
a real register. */

unsigned int fReserved : 7;
}ni;
GLuint uiRegistersChanged;
}changed;

Reg_DrawLocalCtrl DrawLocalCtrl; /* Savage4 only */

Reg_TexPalAddr TexPalAddr;
Reg_TexCtrl TexCtrl[2]; /* Savage3D uses only one */
Reg_TexAddr TexAddr[2]; /* Savage3D uses only one */
Reg_TexBlendCtrl TexBlendCtrl[2]; /* Savage4 only */

Reg_TexXprClr TexXprClr;
Reg_TexDescr TexDescr;

Reg_FogTable FogTable; /* Savage4 uses only 32 entries */

Reg_FogCtrl FogCtrl;

Reg_StencilCtrl StencilCtrl; /* Savage4 only */
Reg_ZBufCtrl ZBufCtrl;
Reg_ZBufOffset ZBufOffset;
Reg_DestCtrl DestCtrl;
Reg_DrawCtrl0 DrawCtrl0; /* Savage4 only */
Reg_DrawCtrl1 DrawCtrl1; /* Savage4 only */
Reg_ZWatermarks ZWatermarks;
Reg_DestTexWatermarks DestTexWatermarks;
Reg_TexBlendColor TexBlendColor; /* Savage4 only */

Reg_DrawCtrl DrawCtrl; /* Savage3D only */
Reg_ScissorsStart ScissorsStart; /* Savage3D only */
Reg_ScissorsEnd ScissorsEnd; /* Savage3D only */
} REGISTERS;

/* All registers that affect textures */
#define SAVAGE_TEXTURE_CHANGED 0x000002FE
/* Engine must be idle when global registers are changed */
#define SAVAGE_GLOBAL_CHANGED 0x00FFFC00
} savageRegDestTexWatermarks;

/* Savage4/Twister/ProSavage register BCI addresses */
#define SAVAGE_DRAWLOCALCTRL_S4 0x1e
@@ -692,6 +614,55 @@ typedef struct _REGISTERS_
#define SAVAGE_ZWATERMARK_S3D 0x37
#define SAVAGE_DESTTEXRWWATERMARK_S3D 0x38

#define SAVAGE_FIRST_REG 0x18
#define SAVAGE_NR_REGS 34
typedef struct savage_registers_s4_t {
unsigned int unused1[6]; /* 0x18-0x1d */
savageRegDrawLocalCtrl drawLocalCtrl; /* 0x1e */
savageRegTexPalAddr texPalAddr; /* 0x1f */
savageRegTexCtrl_s4 texCtrl[2]; /* 0x20, 0x21 */
savageRegTexAddr texAddr[2]; /* 0x22, 0x23 */
savageRegTexBlendCtrl texBlendCtrl[2]; /* 0x24, 0x25 */
savageRegTexXprClr texXprClr; /* 0x26 */
savageRegTexDescr_s4 texDescr; /* 0x27 */
unsigned char fogTable[32]; /* 0x28-0x2f (8dwords) */
savageRegFogCtrl fogCtrl; /* 0x30 */
savageRegStencilCtrl stencilCtrl; /* 0x31 */
savageRegZBufCtrl_s4 zBufCtrl; /* 0x32 */
savageRegZBufOffset zBufOffset; /* 0x33 */
savageRegDestCtrl destCtrl; /* 0x34 */
savageRegDrawCtrl0 drawCtrl0; /* 0x35 */
savageRegDrawCtrl1 drawCtrl1; /* 0x36 */
savageRegZWatermarks zWatermarks; /* 0x37 */
savageRegDestTexWatermarks destTexWatermarks; /* 0x38 */
savageRegTexBlendColor texBlendColor; /* 0x39 */
} savageRegistersS4;
typedef struct savage_registers_s3d_t {
savageRegTexPalAddr texPalAddr; /* 0x18 */
savageRegTexXprClr texXprClr; /* 0x19 */
savageRegTexAddr texAddr; /* 0x1a */
savageRegTexDescr_s3d texDescr; /* 0x1b */
savageRegTexCtrl_s3d texCtrl; /* 0x1c */
unsigned int unused1[3]; /* 0x1d-0x1f */
unsigned char fogTable[64]; /* 0x20-0x2f (16dwords) */
savageRegFogCtrl fogCtrl; /* 0x30 */
savageRegDrawCtrl drawCtrl; /* 0x31 */
savageRegZBufCtrl_s3d zBufCtrl; /* 0x32 */
savageRegZBufOffset zBufOffset; /* 0x33 */
savageRegDestCtrl destCtrl; /* 0x34 */
savageRegScissorsStart scissorsStart; /* 0x35 */
savageRegScissorsEnd scissorsEnd; /* 0x36 */
savageRegZWatermarks zWatermarks; /* 0x37 */
savageRegDestTexWatermarks destTexWatermarks; /* 0x38 */
unsigned int unused2; /* 0x39 */
} savageRegistersS3D;
typedef union savage_registers_t {
savageRegistersS4 s4;
savageRegistersS3D s3d;
unsigned int ui[SAVAGE_NR_REGS];
} savageRegisters;


#define DV_PF_555 (0x1<<8)
#define DV_PF_565 (0x2<<8)
#define DV_PF_8888 (0x4<<8)

+ 2
- 1
src/mesa/drivers/dri/savage/savage_xmesa.c View File

@@ -413,6 +413,7 @@ savageCreateContext( const __GLcontextModes *mesaVis,
imesa->new_state = ~0;
imesa->RenderIndex = ~0;
imesa->dirty = ~0;
imesa->lostContext = GL_TRUE;
imesa->TextureMode = ctx->Texture.Unit[0].EnvMode;
imesa->CurrentTexObj[0] = 0;
imesa->CurrentTexObj[1] = 0;
@@ -714,7 +715,7 @@ void savageGetLock( savageContextPtr imesa, GLuint flags )
SAVAGE_UPLOAD_CLIPRECTS |
SAVAGE_UPLOAD_TEX0 |
SAVAGE_UPLOAD_TEX1);
imesa->Registers.changed.uiRegistersChanged = __HW_ALL_CHANGED;
imesa->lostContext = GL_TRUE;
sarea->ctxOwner = me;
}


+ 3
- 1
src/mesa/drivers/dri/savage/savagecontext.h View File

@@ -134,7 +134,7 @@ struct savage_context_t {
/* Hardware state
*/

REGISTERS Registers;
savageRegisters regs, oldRegs, globalRegMask;

/* Manage our own state */
GLuint new_state;
@@ -151,6 +151,7 @@ struct savage_context_t {
GLuint aperturePitch;
/* Manage hardware state */
GLuint dirty;
GLboolean lostContext;
memHeap_t *texHeap[SAVAGE_NR_TEX_HEAPS];
GLuint bTexEn1;
/* One of the few bits of hardware state that can't be calculated
@@ -227,6 +228,7 @@ struct savage_context_t {
GLuint any_contend; /* throttle me harder */

GLuint scissor;
GLboolean scissorChanged;
drm_clip_rect_t draw_rect;
drm_clip_rect_t scissor_rect;
XF86DRIClipRectRec tmp_boxes[2][SAVAGE_NR_SAREA_CLIPRECTS];

+ 4
- 4
src/mesa/drivers/dri/savage/savageioctl.c View File

@@ -111,8 +111,9 @@ static void savage_BCI_clear(GLcontext *ctx, drm_savage_clear_t *pclear)
if(imesa->IsFullScreen && imesa->NotFirstFrame &&
imesa->savageScreen->chipset >= S3_SAVAGE4)
{
imesa->Registers.ZBufCtrl.s4.autoZEnable = GL_TRUE;
imesa->Registers.ZBufCtrl.s4.frameID = ~imesa->Registers.ZBufCtrl.s4.frameID;
imesa->regs.s4.zBufCtrl.ni.autoZEnable = GL_TRUE;
imesa->regs.s4.zBufCtrl.ni.frameID =
~imesa->regs.s4.zBufCtrl.ni.frameID;
imesa->dirty |= SAVAGE_UPLOAD_CTX;
}
@@ -191,8 +192,7 @@ static void savage_BCI_swap(savageContextPtr imesa)
imesa->drawMap = (char *)imesa->apertureBase[imesa->toggle];
imesa->readMap = (char *)imesa->apertureBase[imesa->toggle];
imesa->Registers.DestCtrl.ni.offset = imesa->savageScreen->backOffset>>11;
imesa->Registers.changed.ni.fDestCtrlChanged = GL_TRUE;
imesa->regs.s4.destCtrl.ni.offset = imesa->savageScreen->backOffset>>11;
imesa->dirty |= SAVAGE_UPLOAD_CTX;
bciptr = SAVAGE_GET_BCI_POINTER(imesa,3);
*(bciptr) = 0x960100B0;

+ 378
- 904
src/mesa/drivers/dri/savage/savagestate.c
File diff suppressed because it is too large
View File


+ 2
- 1
src/mesa/drivers/dri/savage/savagestate.h View File

@@ -33,9 +33,9 @@ extern void savageDDInitState( savageContextPtr imesa );
extern void savageDDInitStateFuncs( GLcontext *ctx );
extern void savageDDRenderStart(GLcontext *ctx);
extern void savageDDRenderEnd(GLcontext *ctx);
extern void savageDDScissor( GLcontext *ctx, GLint x, GLint y,GLsizei w, GLsizei h );

/*frank 2001/11/13 add macro for sarea state copy*/
#if 0
#define SAVAGE_STATE_COPY(ctx) { \
ctx->sarea->setup[0]=ctx->Registers.DrawLocalCtrl.ui; \
ctx->sarea->setup[1]=ctx->Registers.TexPalAddr.ui; \
@@ -67,3 +67,4 @@ ctx->sarea->setup[26]=ctx->Registers.DestTexWatermarks.ui; \
ctx->sarea->setup[27]=ctx->Registers.TexBlendColor.ui; \
}
#endif
#endif

+ 189
- 305
src/mesa/drivers/dri/savage/savagetex.c View File

@@ -1026,21 +1026,13 @@ static void savageUpdateTex0State_s4( GLcontext *ctx )
struct gl_texture_object *tObj;
savageTextureObjectPtr t;
GLuint format;
Reg_TexCtrl TexCtrl;
Reg_TexBlendCtrl TexBlendCtrl;
Reg_TexDescr TexDescr;

/* disable */
if (ctx->Texture.Unit[0]._ReallyEnabled == 0) {
imesa->Registers.TexDescr.s4.tex0En = GL_FALSE;
imesa->Registers.TexBlendCtrl[0].ui = TBC_NoTexMap;
imesa->Registers.TexCtrl[0].ui = 0x20f040;
imesa->Registers.TexAddr[0].ui = 0;
imesa->Registers.changed.ni.fTex0BlendCtrlChanged = GL_TRUE;
imesa->Registers.changed.ni.fTex0AddrChanged = GL_TRUE;
imesa->Registers.changed.ni.fTexDescrChanged = GL_TRUE;
imesa->Registers.changed.ni.fTex0CtrlChanged = GL_TRUE;
imesa->regs.s4.texDescr.ni.tex0En = GL_FALSE;
imesa->regs.s4.texBlendCtrl[0].ui = TBC_NoTexMap;
imesa->regs.s4.texCtrl[0].ui = 0x20f040;
imesa->regs.s4.texAddr[0].ui = 0;
return;
}

@@ -1074,49 +1066,46 @@ static void savageUpdateTex0State_s4( GLcontext *ctx )
if (t->MemBlock)
savageUpdateTexLRU( imesa, t );
TexDescr.ui = imesa->Registers.TexDescr.ui & ~0x01000000;
TexCtrl.ui = imesa->Registers.TexCtrl[0].ui;
TexBlendCtrl.ui = imesa->Registers.TexBlendCtrl[0].ui;

format = tObj->Image[0][tObj->BaseLevel]->Format;

switch (ctx->Texture.Unit[0].EnvMode) {
case GL_REPLACE:
TexCtrl.s4.clrArg1Invert = GL_FALSE;
imesa->regs.s4.texCtrl[0].ni.clrArg1Invert = GL_FALSE;
switch(format)
{
case GL_LUMINANCE:
case GL_RGB:
TexBlendCtrl.ui = TBC_Decal;
imesa->regs.s4.texBlendCtrl[0].ui = TBC_Decal;
break;

case GL_LUMINANCE_ALPHA:
case GL_RGBA:
case GL_INTENSITY:
TexBlendCtrl.ui = TBC_Copy;
imesa->regs.s4.texBlendCtrl[0].ui = TBC_Copy;
break;

case GL_ALPHA:
TexBlendCtrl.ui = TBC_CopyAlpha;
imesa->regs.s4.texBlendCtrl[0].ui = TBC_CopyAlpha;
break;
}
__HWEnvCombineSingleUnitScale(imesa, 0, 0, &TexBlendCtrl);
__HWEnvCombineSingleUnitScale(imesa, 0, 0,
&imesa->regs.s4.texBlendCtrl[0]);
break;

case GL_DECAL:
TexCtrl.s4.clrArg1Invert = GL_FALSE;
imesa->regs.s4.texCtrl[0].ni.clrArg1Invert = GL_FALSE;
switch (format)
{
case GL_RGB:
case GL_LUMINANCE:
TexBlendCtrl.ui = TBC_Decal;
imesa->regs.s4.texBlendCtrl[0].ui = TBC_Decal;
break;

case GL_RGBA:
case GL_INTENSITY:
case GL_LUMINANCE_ALPHA:
TexBlendCtrl.ui = TBC_DecalAlpha;
imesa->regs.s4.texBlendCtrl[0].ui = TBC_DecalAlpha;
break;

/*
@@ -1125,16 +1114,18 @@ static void savageUpdateTex0State_s4( GLcontext *ctx )
*/

case GL_ALPHA:
TexBlendCtrl.ui = TBC_CopyAlpha;
imesa->regs.s4.texBlendCtrl[0].ui = TBC_CopyAlpha;
break;
}
__HWEnvCombineSingleUnitScale(imesa, 0, 0, &TexBlendCtrl);
__HWEnvCombineSingleUnitScale(imesa, 0, 0,
&imesa->regs.s4.texBlendCtrl[0]);
break;

case GL_MODULATE:
TexCtrl.s4.clrArg1Invert = GL_FALSE;
TexBlendCtrl.ui = TBC_ModulAlpha;
__HWEnvCombineSingleUnitScale(imesa, 0, 0, &TexBlendCtrl);
imesa->regs.s4.texCtrl[0].ni.clrArg1Invert = GL_FALSE;
imesa->regs.s4.texBlendCtrl[0].ui = TBC_ModulAlpha;
__HWEnvCombineSingleUnitScale(imesa, 0, 0,
&imesa->regs.s4.texBlendCtrl[0]);
break;

case GL_BLEND:
@@ -1142,85 +1133,69 @@ static void savageUpdateTex0State_s4( GLcontext *ctx )
switch (format)
{
case GL_ALPHA:
TexBlendCtrl.ui = TBC_ModulAlpha;
TexCtrl.s4.clrArg1Invert = GL_FALSE;
imesa->regs.s4.texBlendCtrl[0].ui = TBC_ModulAlpha;
imesa->regs.s4.texCtrl[0].ni.clrArg1Invert = GL_FALSE;
break;

case GL_LUMINANCE:
case GL_RGB:
TexBlendCtrl.ui = TBC_Blend0;
TexDescr.s4.tex1En = GL_TRUE;
TexDescr.s4.texBLoopEn = GL_TRUE;
TexDescr.s4.tex1Width = TexDescr.s4.tex0Width;
TexDescr.s4.tex1Height = TexDescr.s4.tex0Height;
TexDescr.s4.tex1Fmt = TexDescr.s4.tex0Fmt;

if (imesa->Registers.TexAddr[1].ui != imesa->Registers.TexAddr[0].ui)
{
imesa->Registers.TexAddr[1].ui = imesa->Registers.TexAddr[0].ui;
imesa->Registers.changed.ni.fTex1AddrChanged = GL_TRUE;
}

if (imesa->Registers.TexBlendCtrl[1].ui != TBC_Blend1)
{
imesa->Registers.TexBlendCtrl[1].ui = TBC_Blend1;
imesa->Registers.changed.ni.fTex1BlendCtrlChanged = GL_TRUE;
}

TexCtrl.s4.clrArg1Invert = GL_TRUE;
imesa->regs.s4.texBlendCtrl[0].ui = TBC_Blend0;
imesa->regs.s4.texDescr.ni.tex1En = GL_TRUE;
imesa->regs.s4.texDescr.ni.texBLoopEn = GL_TRUE;
imesa->regs.s4.texDescr.ni.tex1Width =
imesa->regs.s4.texDescr.ni.tex0Width;
imesa->regs.s4.texDescr.ni.tex1Height =
imesa->regs.s4.texDescr.ni.tex0Height;
imesa->regs.s4.texDescr.ni.tex1Fmt =
imesa->regs.s4.texDescr.ni.tex0Fmt;

imesa->regs.s4.texAddr[1].ui = imesa->regs.s4.texAddr[0].ui;
imesa->regs.s4.texBlendCtrl[1].ui = TBC_Blend1;

imesa->regs.s4.texCtrl[0].ni.clrArg1Invert = GL_TRUE;
imesa->bTexEn1 = GL_TRUE;
break;

case GL_LUMINANCE_ALPHA:
case GL_RGBA:
TexBlendCtrl.ui = TBC_BlendAlpha0;
TexDescr.s4.tex1En = GL_TRUE;
TexDescr.s4.texBLoopEn = GL_TRUE;
TexDescr.s4.tex1Width = TexDescr.s4.tex0Width;
TexDescr.s4.tex1Height = TexDescr.s4.tex0Height;
TexDescr.s4.tex1Fmt = TexDescr.s4.tex0Fmt;

if (imesa->Registers.TexAddr[1].ui != imesa->Registers.TexAddr[0].ui)
{
imesa->Registers.TexAddr[1].ui = imesa->Registers.TexAddr[0].ui;
imesa->Registers.changed.ni.fTex1AddrChanged = GL_TRUE;
}

if (imesa->Registers.TexBlendCtrl[1].ui != TBC_BlendAlpha1)
{
imesa->Registers.TexBlendCtrl[1].ui = TBC_BlendAlpha1;
imesa->Registers.changed.ni.fTex1BlendCtrlChanged = GL_TRUE;
}

TexCtrl.s4.clrArg1Invert = GL_TRUE;
imesa->regs.s4.texBlendCtrl[0].ui = TBC_BlendAlpha0;
imesa->regs.s4.texDescr.ni.tex1En = GL_TRUE;
imesa->regs.s4.texDescr.ni.texBLoopEn = GL_TRUE;
imesa->regs.s4.texDescr.ni.tex1Width =
imesa->regs.s4.texDescr.ni.tex0Width;
imesa->regs.s4.texDescr.ni.tex1Height =
imesa->regs.s4.texDescr.ni.tex0Height;
imesa->regs.s4.texDescr.ni.tex1Fmt =
imesa->regs.s4.texDescr.ni.tex0Fmt;

imesa->regs.s4.texAddr[1].ui = imesa->regs.s4.texAddr[0].ui;
imesa->regs.s4.texBlendCtrl[1].ui = TBC_BlendAlpha1;

imesa->regs.s4.texCtrl[0].ni.clrArg1Invert = GL_TRUE;
imesa->bTexEn1 = GL_TRUE;
break;

case GL_INTENSITY:
TexBlendCtrl.ui = TBC_BlendInt0;
TexDescr.s4.tex1En = GL_TRUE;
TexDescr.s4.texBLoopEn = GL_TRUE;
TexDescr.s4.tex1Width = TexDescr.s4.tex0Width;
TexDescr.s4.tex1Height = TexDescr.s4.tex0Height;
TexDescr.s4.tex1Fmt = TexDescr.s4.tex0Fmt;

if (imesa->Registers.TexAddr[1].ui != imesa->Registers.TexAddr[0].ui)
{
imesa->Registers.TexAddr[1].ui = imesa->Registers.TexAddr[0].ui;
imesa->Registers.changed.ni.fTex1AddrChanged = GL_TRUE;
}

if (imesa->Registers.TexBlendCtrl[1].ui != TBC_BlendInt1)
{
imesa->Registers.TexBlendCtrl[1].ui = TBC_BlendInt1;
imesa->Registers.changed.ni.fTex1BlendCtrlChanged = GL_TRUE;
}
TexCtrl.s4.clrArg1Invert = GL_TRUE;
TexCtrl.s4.alphaArg1Invert = GL_TRUE;
imesa->regs.s4.texBlendCtrl[0].ui = TBC_BlendInt0;
imesa->regs.s4.texDescr.ni.tex1En = GL_TRUE;
imesa->regs.s4.texDescr.ni.texBLoopEn = GL_TRUE;
imesa->regs.s4.texDescr.ni.tex1Width =
imesa->regs.s4.texDescr.ni.tex0Width;
imesa->regs.s4.texDescr.ni.tex1Height =
imesa->regs.s4.texDescr.ni.tex0Height;
imesa->regs.s4.texDescr.ni.tex1Fmt =
imesa->regs.s4.texDescr.ni.tex0Fmt;

imesa->regs.s4.texAddr[1].ui = imesa->regs.s4.texAddr[0].ui;
imesa->regs.s4.texBlendCtrl[1].ui = TBC_BlendInt1;

imesa->regs.s4.texCtrl[0].ni.clrArg1Invert = GL_TRUE;
imesa->regs.s4.texCtrl[0].ni.alphaArg1Invert = GL_TRUE;
imesa->bTexEn1 = GL_TRUE;
break;
}
__HWEnvCombineSingleUnitScale(imesa, 0, 0, &TexBlendCtrl);
__HWEnvCombineSingleUnitScale(imesa, 0, 0,
&imesa->regs.s4.texBlendCtrl[0]);
break;

/*
@@ -1228,14 +1203,16 @@ static void savageUpdateTex0State_s4( GLcontext *ctx )
*/
case GL_ADD:
printf("Add\n");
TexCtrl.s4.clrArg1Invert = GL_FALSE;
TexBlendCtrl.ui = TBC_AddAlpha;
__HWEnvCombineSingleUnitScale(imesa, 0, 0, &TexBlendCtrl);
imesa->regs.s4.texCtrl[0].ni.clrArg1Invert = GL_FALSE;
imesa->regs.s4.texBlendCtrl[0].ui = TBC_AddAlpha;
__HWEnvCombineSingleUnitScale(imesa, 0, 0,
&imesa->regs.s4.texBlendCtrl[0]);
break;

#if GL_ARB_texture_env_combine
case GL_COMBINE_ARB:
__HWParseTexEnvCombine(imesa, 0, &TexCtrl, &TexBlendCtrl);
__HWParseTexEnvCombine(imesa, 0, &imesa->regs.s4.texCtrl[0],
&imesa->regs.s4.texBlendCtrl[0]);
break;
#endif

@@ -1245,39 +1222,40 @@ static void savageUpdateTex0State_s4( GLcontext *ctx )
break;
}

TexCtrl.s4.uMode = !(t->texParams.sWrapMode & 0x01);
TexCtrl.s4.vMode = !(t->texParams.tWrapMode & 0x01);
imesa->regs.s4.texCtrl[0].ni.uMode = !(t->texParams.sWrapMode & 0x01);
imesa->regs.s4.texCtrl[0].ni.vMode = !(t->texParams.tWrapMode & 0x01);

switch (t->texParams.minFilter)
{
case GL_NEAREST:
TexCtrl.s4.filterMode = TFM_Point;
TexCtrl.s4.mipmapEnable = GL_FALSE;
imesa->regs.s4.texCtrl[0].ni.filterMode = TFM_Point;
imesa->regs.s4.texCtrl[0].ni.mipmapEnable = GL_FALSE;
break;

case GL_LINEAR:
TexCtrl.s4.filterMode = TFM_Bilin;
TexCtrl.s4.mipmapEnable = GL_FALSE;
imesa->regs.s4.texCtrl[0].ni.filterMode = TFM_Bilin;
imesa->regs.s4.texCtrl[0].ni.mipmapEnable = GL_FALSE;
break;

case GL_NEAREST_MIPMAP_NEAREST:
TexCtrl.s4.filterMode = TFM_Point;
TexCtrl.s4.mipmapEnable = GL_TRUE;
imesa->regs.s4.texCtrl[0].ni.filterMode = TFM_Point;
imesa->regs.s4.texCtrl[0].ni.mipmapEnable = GL_TRUE;
break;

case GL_LINEAR_MIPMAP_NEAREST:
TexCtrl.s4.filterMode = TFM_Bilin;
TexCtrl.s4.mipmapEnable = GL_TRUE;
imesa->regs.s4.texCtrl[0].ni.filterMode = TFM_Bilin;
imesa->regs.s4.texCtrl[0].ni.mipmapEnable = GL_TRUE;
break;

case GL_NEAREST_MIPMAP_LINEAR:
case GL_LINEAR_MIPMAP_LINEAR:
TexCtrl.s4.filterMode = TFM_Trilin;
TexCtrl.s4.mipmapEnable = GL_TRUE;
imesa->regs.s4.texCtrl[0].ni.filterMode = TFM_Trilin;
imesa->regs.s4.texCtrl[0].ni.mipmapEnable = GL_TRUE;
break;
}

if((ctx->Texture.Unit[0].LodBias !=0.0F) && (TexCtrl.s4.dBias != 0))
if((ctx->Texture.Unit[0].LodBias !=0.0F) &&
(imesa->regs.s4.texCtrl[0].ni.dBias != 0))
{
union {
GLfloat f;
@@ -1307,47 +1285,23 @@ static void savageUpdateTex0State_s4( GLcontext *ctx )
}
ul &= 0x1FF;
TexCtrl.s4.dBias = ul;
imesa->regs.s4.texCtrl[0].ni.dBias = ul;
}

TexDescr.s4.tex0En = GL_TRUE;
TexDescr.s4.tex0Width = t->image[0].image->WidthLog2;
TexDescr.s4.tex0Height = t->image[0].image->HeightLog2;
TexDescr.s4.tex0Fmt = t->image[0].internalFormat;
TexCtrl.s4.dMax = t->max_level;
imesa->regs.s4.texDescr.ni.tex0En = GL_TRUE;
imesa->regs.s4.texDescr.ni.tex0Width = t->image[0].image->WidthLog2;
imesa->regs.s4.texDescr.ni.tex0Height = t->image[0].image->HeightLog2;
imesa->regs.s4.texDescr.ni.tex0Fmt = t->image[0].internalFormat;
imesa->regs.s4.texCtrl[0].ni.dMax = t->max_level;

if (TexDescr.s4.tex1En)
TexDescr.s4.texBLoopEn = GL_TRUE;
if (imesa->regs.s4.texDescr.ni.tex1En)
imesa->regs.s4.texDescr.ni.texBLoopEn = GL_TRUE;

if (imesa->Registers.TexAddr[0].ui != (GLuint)t->texParams.hwPhysAddress)
{
imesa->Registers.TexAddr[0].ui = (GLuint) t->texParams.hwPhysAddress | 0x2;
if(t->heap == SAVAGE_AGP_HEAP)
imesa->Registers.TexAddr[0].ui |= 0x1;
imesa->Registers.changed.ni.fTex0AddrChanged = GL_TRUE;
}

if (imesa->Registers.TexCtrl[0].ui != TexCtrl.ui)
{
imesa->Registers.TexCtrl[0].ui = TexCtrl.ui;
imesa->Registers.changed.ni.fTex0CtrlChanged = GL_TRUE;
}

if (imesa->Registers.TexBlendCtrl[0].ui != TexBlendCtrl.ui)
{
imesa->Registers.TexBlendCtrl[0].ui = TexBlendCtrl.ui;
imesa->Registers.changed.ni.fTex0BlendCtrlChanged = GL_TRUE;
}

if (imesa->Registers.TexDescr.ui != TexDescr.ui)
{
imesa->Registers.TexDescr.ui = TexDescr.ui;
imesa->Registers.changed.ni.fTexDescrChanged = GL_TRUE;
}

return;
imesa->regs.s4.texAddr[0].ui = (GLuint) t->texParams.hwPhysAddress | 0x2;
if(t->heap == SAVAGE_AGP_HEAP)
imesa->regs.s4.texAddr[0].ui |= 0x1;
return;
}
static void savageUpdateTex1State_s4( GLcontext *ctx )
{
@@ -1355,10 +1309,6 @@ static void savageUpdateTex1State_s4( GLcontext *ctx )
struct gl_texture_object *tObj;
savageTextureObjectPtr t;
GLuint format;
Reg_TexCtrl TexCtrl;
Reg_TexBlendCtrl TexBlendCtrl;
Reg_TexDescr TexDescr;


/* disable */
if(imesa->bTexEn1)
@@ -1368,15 +1318,11 @@ static void savageUpdateTex1State_s4( GLcontext *ctx )
}

if (ctx->Texture.Unit[1]._ReallyEnabled == 0) {
imesa->Registers.TexDescr.s4.tex1En = GL_FALSE;
imesa->Registers.TexBlendCtrl[1].ui = TBC_NoTexMap1;
imesa->Registers.TexCtrl[1].ui = 0x20f040;
imesa->Registers.TexAddr[1].ui = 0;
imesa->Registers.TexDescr.s4.texBLoopEn = GL_FALSE;
imesa->Registers.changed.ni.fTex1BlendCtrlChanged = GL_TRUE;
imesa->Registers.changed.ni.fTexDescrChanged = GL_TRUE;
imesa->Registers.changed.ni.fTex1BlendCtrlChanged = GL_TRUE;
imesa->Registers.changed.ni.fTex1AddrChanged = GL_TRUE;
imesa->regs.s4.texDescr.ni.tex1En = GL_FALSE;
imesa->regs.s4.texBlendCtrl[1].ui = TBC_NoTexMap1;
imesa->regs.s4.texCtrl[1].ui = 0x20f040;
imesa->regs.s4.texAddr[1].ui = 0;
imesa->regs.s4.texDescr.ni.texBLoopEn = GL_FALSE;
return;
}

@@ -1413,67 +1359,63 @@ static void savageUpdateTex1State_s4( GLcontext *ctx )
if (t->MemBlock)
savageUpdateTexLRU( imesa, t );

TexDescr.ui = imesa->Registers.TexDescr.ui;
TexCtrl.ui = imesa->Registers.TexCtrl[1].ui;
TexBlendCtrl.ui = imesa->Registers.TexBlendCtrl[1].ui;

format = tObj->Image[0][tObj->BaseLevel]->Format;

switch (ctx->Texture.Unit[1].EnvMode) {
case GL_REPLACE:
TexCtrl.s4.clrArg1Invert = GL_FALSE;
imesa->regs.s4.texCtrl[1].ni.clrArg1Invert = GL_FALSE;
switch (format)
{
case GL_LUMINANCE:
case GL_RGB:
TexBlendCtrl.ui = TBC_Decal;
imesa->regs.s4.texBlendCtrl[1].ui = TBC_Decal;
break;

case GL_LUMINANCE_ALPHA:
case GL_INTENSITY:
case GL_RGBA:
TexBlendCtrl.ui = TBC_Copy;
imesa->regs.s4.texBlendCtrl[1].ui = TBC_Copy;
break;

case GL_ALPHA:
TexBlendCtrl.ui = TBC_CopyAlpha1;
imesa->regs.s4.texBlendCtrl[1].ui = TBC_CopyAlpha1;
break;
}
__HWEnvCombineSingleUnitScale(imesa, 0, 1, &TexBlendCtrl);
__HWEnvCombineSingleUnitScale(imesa, 0, 1, &imesa->regs.s4.texBlendCtrl);
break;
case GL_MODULATE:
TexCtrl.s4.clrArg1Invert = GL_FALSE;
TexBlendCtrl.ui = TBC_ModulAlpha1;
__HWEnvCombineSingleUnitScale(imesa, 0, 1, &TexBlendCtrl);
imesa->regs.s4.texCtrl[1].ni.clrArg1Invert = GL_FALSE;
imesa->regs.s4.texBlendCtrl[1].ui = TBC_ModulAlpha1;
__HWEnvCombineSingleUnitScale(imesa, 0, 1, &imesa->regs.s4.texBlendCtrl);
break;

/*#if GL_EXT_texture_env_add*/
case GL_ADD:
TexCtrl.s4.clrArg1Invert = GL_FALSE;
TexBlendCtrl.ui = TBC_AddAlpha1;
__HWEnvCombineSingleUnitScale(imesa, 0, 1, &TexBlendCtrl);
imesa->regs.s4.texCtrl[1].ni.clrArg1Invert = GL_FALSE;
imesa->regs.s4.texBlendCtrl[1].ui = TBC_AddAlpha1;
__HWEnvCombineSingleUnitScale(imesa, 0, 1, &imesa->regs.s4.texBlendCtrl);
break;
/*#endif*/

#if GL_ARB_texture_env_combine
case GL_COMBINE_ARB:
__HWParseTexEnvCombine(imesa, 1, &TexCtrl, &TexBlendCtrl);
__HWParseTexEnvCombine(imesa, 1, &texCtrl, &imesa->regs.s4.texBlendCtrl);
break;
#endif

case GL_DECAL:
TexCtrl.s4.clrArg1Invert = GL_FALSE;
imesa->regs.s4.texCtrl[1].ni.clrArg1Invert = GL_FALSE;

switch (format)
{
case GL_LUMINANCE:
case GL_RGB:
TexBlendCtrl.ui = TBC_Decal1;
imesa->regs.s4.texBlendCtrl[1].ui = TBC_Decal1;
break;
case GL_LUMINANCE_ALPHA:
case GL_INTENSITY:
case GL_RGBA:
TexBlendCtrl.ui = TBC_DecalAlpha1;
imesa->regs.s4.texBlendCtrl[1].ui = TBC_DecalAlpha1;
break;

/*
@@ -1481,10 +1423,10 @@ static void savageUpdateTex1State_s4( GLcontext *ctx )
// are undefined with GL_DECAL
*/
case GL_ALPHA:
TexBlendCtrl.ui = TBC_CopyAlpha1;
imesa->regs.s4.texBlendCtrl[1].ui = TBC_CopyAlpha1;
break;
}
__HWEnvCombineSingleUnitScale(imesa, 0, 1, &TexBlendCtrl);
__HWEnvCombineSingleUnitScale(imesa, 0, 1, &imesa->regs.s4.texBlendCtrl);
break;

case GL_BLEND:
@@ -1493,10 +1435,10 @@ static void savageUpdateTex1State_s4( GLcontext *ctx )
/*
// This is a hack for GLQuake, invert.
*/
TexCtrl.s4.clrArg1Invert = GL_TRUE;
TexBlendCtrl.ui = 0;
imesa->regs.s4.texCtrl[1].ni.clrArg1Invert = GL_TRUE;
imesa->regs.s4.texBlendCtrl[1].ui = 0;
}
__HWEnvCombineSingleUnitScale(imesa, 0, 1, &TexBlendCtrl);
__HWEnvCombineSingleUnitScale(imesa, 0, 1, &imesa->regs.s4.texBlendCtrl);
break;

default:
@@ -1505,39 +1447,40 @@ static void savageUpdateTex1State_s4( GLcontext *ctx )
break;
}

TexCtrl.s4.uMode = !(t->texParams.sWrapMode & 0x01);
TexCtrl.s4.vMode = !(t->texParams.tWrapMode & 0x01);
imesa->regs.s4.texCtrl[1].ni.uMode = !(t->texParams.sWrapMode & 0x01);
imesa->regs.s4.texCtrl[1].ni.vMode = !(t->texParams.tWrapMode & 0x01);

switch (t->texParams.minFilter)
{
case GL_NEAREST:
TexCtrl.s4.filterMode = TFM_Point;
TexCtrl.s4.mipmapEnable = GL_FALSE;
imesa->regs.s4.texCtrl[1].ni.filterMode = TFM_Point;
imesa->regs.s4.texCtrl[1].ni.mipmapEnable = GL_FALSE;
break;

case GL_LINEAR:
TexCtrl.s4.filterMode = TFM_Bilin;
TexCtrl.s4.mipmapEnable = GL_FALSE;
imesa->regs.s4.texCtrl[1].ni.filterMode = TFM_Bilin;
imesa->regs.s4.texCtrl[1].ni.mipmapEnable = GL_FALSE;
break;

case GL_NEAREST_MIPMAP_NEAREST:
TexCtrl.s4.filterMode = TFM_Point;
TexCtrl.s4.mipmapEnable = GL_TRUE;
imesa->regs.s4.texCtrl[1].ni.filterMode = TFM_Point;
imesa->regs.s4.texCtrl[1].ni.mipmapEnable = GL_TRUE;
break;

case GL_LINEAR_MIPMAP_NEAREST:
TexCtrl.s4.filterMode = TFM_Bilin;
TexCtrl.s4.mipmapEnable = GL_TRUE;
imesa->regs.s4.texCtrl[1].ni.filterMode = TFM_Bilin;
imesa->regs.s4.texCtrl[1].ni.mipmapEnable = GL_TRUE;
break;

case GL_NEAREST_MIPMAP_LINEAR:
case GL_LINEAR_MIPMAP_LINEAR:
TexCtrl.s4.filterMode = TFM_Trilin;
TexCtrl.s4.mipmapEnable = GL_TRUE;
imesa->regs.s4.texCtrl[1].ni.filterMode = TFM_Trilin;
imesa->regs.s4.texCtrl[1].ni.mipmapEnable = GL_TRUE;
break;
}
if((ctx->Texture.Unit[1].LodBias !=0.0F)&&(TexCtrl.s4.dBias != 0))
if((ctx->Texture.Unit[1].LodBias !=0.0F)&&
(imesa->regs.s4.texCtrl[1].ni.dBias != 0))
{
union {
GLfloat f;
@@ -1567,45 +1510,19 @@ static void savageUpdateTex1State_s4( GLcontext *ctx )
}
ul &= 0x1FF;
TexCtrl.s4.dBias = ul;
imesa->regs.s4.texCtrl[1].ni.dBias = ul;
}

TexDescr.s4.tex1En = GL_TRUE;
TexDescr.s4.tex1Width = t->image[0].image->WidthLog2;
TexDescr.s4.tex1Height = t->image[0].image->HeightLog2;
TexDescr.s4.tex1Fmt = t->image[0].internalFormat;
TexCtrl.s4.dMax = t->max_level;
TexDescr.s4.texBLoopEn = GL_TRUE;

if (imesa->Registers.TexAddr[1].ui != (GLuint)t->texParams.hwPhysAddress)
{
imesa->Registers.TexAddr[1].ui = (GLuint) t->texParams.hwPhysAddress| 2;
if(t->heap == SAVAGE_AGP_HEAP)
imesa->Registers.TexAddr[1].ui |= 0x1;
/*imesa->Registers.TexAddr[1].ui = (GLuint) t->texParams.hwPhysAddress| 3;*/
imesa->Registers.changed.ni.fTex1AddrChanged = GL_TRUE;
}

if (imesa->Registers.TexCtrl[1].ui != TexCtrl.ui)
{
imesa->Registers.TexCtrl[1].ui = TexCtrl.ui;
imesa->Registers.changed.ni.fTex1CtrlChanged = GL_TRUE;
}

if (imesa->Registers.TexBlendCtrl[1].ui != TexBlendCtrl.ui)
{
imesa->Registers.TexBlendCtrl[1].ui = TexBlendCtrl.ui;
imesa->Registers.changed.ni.fTex1BlendCtrlChanged = GL_TRUE;
}

if (imesa->Registers.TexDescr.ui != TexDescr.ui)
{
imesa->Registers.TexDescr.ui = TexDescr.ui;
imesa->Registers.changed.ni.fTexDescrChanged = GL_TRUE;
}
imesa->regs.s4.texDescr.ni.tex1En = GL_TRUE;
imesa->regs.s4.texDescr.ni.tex1Width = t->image[0].image->WidthLog2;
imesa->regs.s4.texDescr.ni.tex1Height = t->image[0].image->HeightLog2;
imesa->regs.s4.texDescr.ni.tex1Fmt = t->image[0].internalFormat;
imesa->regs.s4.texCtrl[1].ni.dMax = t->max_level;
imesa->regs.s4.texDescr.ni.texBLoopEn = GL_TRUE;

imesa->regs.s4.texAddr[1].ui = (GLuint) t->texParams.hwPhysAddress| 2;
if(t->heap == SAVAGE_AGP_HEAP)
imesa->regs.s4.texAddr[1].ui |= 0x1;
}
static void savageUpdateTexState_s3d( GLcontext *ctx )
{
@@ -1613,19 +1530,14 @@ static void savageUpdateTexState_s3d( GLcontext *ctx )
struct gl_texture_object *tObj;
savageTextureObjectPtr t;
GLuint format;
Reg_TexCtrl TexCtrl;
Reg_DrawCtrl DrawCtrl;
Reg_TexDescr TexDescr;

/* disable */
if (ctx->Texture.Unit[0]._ReallyEnabled == 0) {
imesa->Registers.TexCtrl[0].ui = 0;
imesa->Registers.TexCtrl[0].s3d.texEn = GL_FALSE;
imesa->Registers.TexCtrl[0].s3d.dBias = 0x08;
imesa->Registers.TexCtrl[0].s3d.texXprEn = GL_TRUE;
imesa->Registers.TexAddr[0].ui = 0;
imesa->Registers.changed.ni.fTex0AddrChanged = GL_TRUE;
imesa->Registers.changed.ni.fTex0CtrlChanged = GL_TRUE;
imesa->regs.s3d.texCtrl.ui = 0;
imesa->regs.s3d.texCtrl.ni.texEn = GL_FALSE;
imesa->regs.s3d.texCtrl.ni.dBias = 0x08;
imesa->regs.s3d.texCtrl.ni.texXprEn = GL_TRUE;
imesa->regs.s3d.texAddr.ui = 0;
return;
}

@@ -1659,23 +1571,19 @@ static void savageUpdateTexState_s3d( GLcontext *ctx )
if (t->MemBlock)
savageUpdateTexLRU( imesa, t );

TexDescr.ui = imesa->Registers.TexDescr.ui;
TexCtrl.ui = imesa->Registers.TexCtrl[0].ui;
DrawCtrl.ui = imesa->Registers.DrawCtrl.ui;

format = tObj->Image[0][tObj->BaseLevel]->Format;

/* FIXME: copied from utah-glx, probably needs some tuning */
switch (ctx->Texture.Unit[0].EnvMode) {
case GL_DECAL:
DrawCtrl.ni.texBlendCtrl = SAVAGETBC_DECAL_S3D;
imesa->regs.s3d.drawCtrl.ni.texBlendCtrl = SAVAGETBC_DECAL_S3D;
break;
case GL_REPLACE:
DrawCtrl.ni.texBlendCtrl = SAVAGETBC_COPY_S3D;
imesa->regs.s3d.drawCtrl.ni.texBlendCtrl = SAVAGETBC_COPY_S3D;
break;
case GL_BLEND: /* FIXIT */
case GL_MODULATE:
DrawCtrl.ni.texBlendCtrl = SAVAGETBC_MODULATEALPHA_S3D;
imesa->regs.s3d.drawCtrl.ni.texBlendCtrl = SAVAGETBC_MODULATEALPHA_S3D;
break;
default:
fprintf(stderr, "unkown tex env mode\n");
@@ -1683,43 +1591,43 @@ static void savageUpdateTexState_s3d( GLcontext *ctx )
break;
}

DrawCtrl.ni.flushPdDestWrites = GL_TRUE;
DrawCtrl.ni.flushPdZbufWrites = GL_TRUE;
imesa->regs.s3d.drawCtrl.ni.flushPdDestWrites = GL_TRUE;
imesa->regs.s3d.drawCtrl.ni.flushPdZbufWrites = GL_TRUE;

/* FIXME: this is how the utah-driver works. I doubt it's the ultimate
truth. */
TexCtrl.s3d.uWrapEn = 0;
TexCtrl.s3d.vWrapEn = 0;
imesa->regs.s3d.texCtrl.ni.uWrapEn = 0;
imesa->regs.s3d.texCtrl.ni.vWrapEn = 0;
if (t->texParams.sWrapMode == GL_CLAMP)
TexCtrl.s3d.wrapMode = TAM_Clamp;
imesa->regs.s3d.texCtrl.ni.wrapMode = TAM_Clamp;
else
TexCtrl.s3d.wrapMode = TAM_Wrap;
imesa->regs.s3d.texCtrl.ni.wrapMode = TAM_Wrap;

switch (t->texParams.minFilter) {
case GL_NEAREST:
TexCtrl.s3d.filterMode = TFM_Point;
TexCtrl.s3d.mipmapDisable = GL_TRUE;
imesa->regs.s3d.texCtrl.ni.filterMode = TFM_Point;
imesa->regs.s3d.texCtrl.ni.mipmapDisable = GL_TRUE;
break;

case GL_LINEAR:
TexCtrl.s3d.filterMode = TFM_Bilin;
TexCtrl.s3d.mipmapDisable = GL_TRUE;
imesa->regs.s3d.texCtrl.ni.filterMode = TFM_Bilin;
imesa->regs.s3d.texCtrl.ni.mipmapDisable = GL_TRUE;
break;

case GL_NEAREST_MIPMAP_NEAREST:
TexCtrl.s3d.filterMode = TFM_Point;
TexCtrl.s3d.mipmapDisable = GL_FALSE;
imesa->regs.s3d.texCtrl.ni.filterMode = TFM_Point;
imesa->regs.s3d.texCtrl.ni.mipmapDisable = GL_FALSE;
break;

case GL_LINEAR_MIPMAP_NEAREST:
TexCtrl.s3d.filterMode = TFM_Bilin;
TexCtrl.s3d.mipmapDisable = GL_FALSE;
imesa->regs.s3d.texCtrl.ni.filterMode = TFM_Bilin;
imesa->regs.s3d.texCtrl.ni.mipmapDisable = GL_FALSE;
break;

case GL_NEAREST_MIPMAP_LINEAR:
case GL_LINEAR_MIPMAP_LINEAR:
TexCtrl.s3d.filterMode = TFM_Trilin;
TexCtrl.s3d.mipmapDisable = GL_FALSE;
imesa->regs.s3d.texCtrl.ni.filterMode = TFM_Trilin;
imesa->regs.s3d.texCtrl.ni.mipmapDisable = GL_FALSE;
break;
}

@@ -1728,54 +1636,30 @@ static void savageUpdateTexState_s3d( GLcontext *ctx )
/*
if (t->max_level < t->image[0].image->WidthLog2 ||
t->max_level < t->image[0].image->HeightLog2) {
TexCtrl.s3d.mipmapEnable = GL_TRUE;
if (TexCtrl.s3d.filterMode == TFM_Trilin)
TexCtrl.s3d.filterMode = TFM_Bilin;
TexCtrl.s3d.filterMode = TFM_Point;
texCtrl.ni.mipmapEnable = GL_TRUE;
if (texCtrl.ni.filterMode == TFM_Trilin)
texCtrl.ni.filterMode = TFM_Bilin;
texCtrl.ni.filterMode = TFM_Point;
}
*/

/* LOD bias makes corruption of small mipmap levels worse on Savage IX
* but doesn't show the desired effect with the lodbias mesa demo. */
TexCtrl.s3d.dBias = 0;
imesa->regs.s3d.texCtrl.ni.dBias = 0;

TexCtrl.s3d.texEn = GL_TRUE;
TexDescr.s3d.texWidth = t->image[0].image->WidthLog2;
TexDescr.s3d.texHeight = t->image[0].image->HeightLog2;
imesa->regs.s3d.texCtrl.ni.texEn = GL_TRUE;
imesa->regs.s3d.texDescr.ni.texWidth = t->image[0].image->WidthLog2;
imesa->regs.s3d.texDescr.ni.texHeight = t->image[0].image->HeightLog2;
assert (t->image[0].internalFormat <= 7);
TexDescr.s3d.texFmt = t->image[0].internalFormat;

if (imesa->Registers.TexAddr[0].ni.addr != (GLuint)t->texParams.hwPhysAddress >> 3)
{
imesa->Registers.TexAddr[0].ni.addr = (GLuint) t->texParams.hwPhysAddress >> 3;

if(t->heap == SAVAGE_AGP_HEAP) {
imesa->Registers.TexAddr[0].ni.inSysTex = 1;
imesa->Registers.TexAddr[0].ni.inAGPTex = 1;
} else {
imesa->Registers.TexAddr[0].ni.inSysTex = 0;
imesa->Registers.TexAddr[0].ni.inAGPTex = 1;
}

imesa->Registers.changed.ni.fTex0AddrChanged = GL_TRUE;
}

if (imesa->Registers.TexCtrl[0].ui != TexCtrl.ui)
{
imesa->Registers.TexCtrl[0].ui = TexCtrl.ui;
imesa->Registers.changed.ni.fTex0CtrlChanged = GL_TRUE;
}
imesa->regs.s3d.texDescr.ni.texFmt = t->image[0].internalFormat;

if (imesa->Registers.TexDescr.ui != TexDescr.ui)
{
imesa->Registers.TexDescr.ui = TexDescr.ui;
imesa->Registers.changed.ni.fTexDescrChanged = GL_TRUE;
}

if (imesa->Registers.DrawCtrl.ui != DrawCtrl.ui)
{
imesa->Registers.DrawCtrl.ui = DrawCtrl.ui;
imesa->Registers.changed.ni.fDrawCtrlChanged = GL_TRUE;
imesa->regs.s3d.texAddr.ni.addr = (GLuint) t->texParams.hwPhysAddress >> 3;
if(t->heap == SAVAGE_AGP_HEAP) {
imesa->regs.s3d.texAddr.ni.inSysTex = 1;
imesa->regs.s3d.texAddr.ni.inAGPTex = 1;
} else {
imesa->regs.s3d.texAddr.ni.inSysTex = 0;
imesa->regs.s3d.texAddr.ni.inAGPTex = 1;
}
}


Loading…
Cancel
Save