i965: Add a debug option for spilling everything in vec4 code

Reviewed-by: Francisco Jerez <currojerez@riseup.net>

src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp

@@ -649,7 +649,7 @@ fs_visitor::assign_regs(bool allow_spilling)
    }
 
    /* Debug of register spilling: Go spill everything. */
-   if (unlikely(INTEL_DEBUG & DEBUG_SPILL)) {
+   if (unlikely(INTEL_DEBUG & DEBUG_SPILL_FS)) {
       int reg = choose_spill_reg(g);
 
       if (reg != -1) {

src/mesa/drivers/dri/i965/brw_vec4.cpp

@@ -1833,7 +1833,7 @@ vec4_visitor::run()
 
    setup_payload();
 
-   if (false) {
+   if (unlikely(INTEL_DEBUG & DEBUG_SPILL_VEC4)) {
       /* Debug of register spilling: Go spill everything. */
       const int grf_count = alloc.count;
       float spill_costs[alloc.count];

src/mesa/drivers/dri/i965/intel_debug.c

@@ -69,7 +69,8 @@ static const struct dri_debug_control debug_control[] = {
    { "ann",         DEBUG_ANNOTATION },
    { "no8",         DEBUG_NO8 },
    { "vec4",        DEBUG_VEC4VS },
-   { "spill",       DEBUG_SPILL },
+   { "spill_fs",    DEBUG_SPILL_FS },
+   { "spill_vec4",  DEBUG_SPILL_VEC4 },
    { "cs",          DEBUG_CS },
    { NULL,    0 }
 };

src/mesa/drivers/dri/i965/intel_debug.h

@@ -64,8 +64,9 @@ extern uint64_t INTEL_DEBUG;
 #define DEBUG_ANNOTATION          (1ull << 28)
 #define DEBUG_NO8                 (1ull << 29)
 #define DEBUG_VEC4VS              (1ull << 30)
-#define DEBUG_SPILL               (1ull << 31)
-#define DEBUG_CS                  (1ull << 32)
+#define DEBUG_SPILL_FS            (1ull << 31)
+#define DEBUG_SPILL_VEC4          (1ull << 32)
+#define DEBUG_CS                  (1ull << 33)
 
 #ifdef HAVE_ANDROID_PLATFORM
 #define LOG_TAG "INTEL-MESA"