|
|
@@ -169,6 +169,33 @@ genX(init_device_state)(struct anv_device *device) |
|
|
|
gen10_emit_wa_lri_to_cache_mode_zero(&batch); |
|
|
|
#endif |
|
|
|
|
|
|
|
/* Set the "CONSTANT_BUFFER Address Offset Disable" bit, so |
|
|
|
* 3DSTATE_CONSTANT_XS buffer 0 is an absolute address. |
|
|
|
* |
|
|
|
* This is only safe on kernels with context isolation support. |
|
|
|
*/ |
|
|
|
if (GEN_GEN >= 8 && |
|
|
|
device->instance->physicalDevice.has_context_isolation) { |
|
|
|
UNUSED uint32_t tmp_reg; |
|
|
|
#if GEN_GEN >= 9 |
|
|
|
anv_pack_struct(&tmp_reg, GENX(CS_DEBUG_MODE2), |
|
|
|
.CONSTANT_BUFFERAddressOffsetDisable = true, |
|
|
|
.CONSTANT_BUFFERAddressOffsetDisableMask = true); |
|
|
|
anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) { |
|
|
|
lri.RegisterOffset = GENX(CS_DEBUG_MODE2_num); |
|
|
|
lri.DataDWord = tmp_reg; |
|
|
|
} |
|
|
|
#elif GEN_GEN == 8 |
|
|
|
anv_pack_struct(&tmp_reg, GENX(INSTPM), |
|
|
|
.CONSTANT_BUFFERAddressOffsetDisable = true, |
|
|
|
.CONSTANT_BUFFERAddressOffsetDisableMask = true); |
|
|
|
anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) { |
|
|
|
lri.RegisterOffset = GENX(INSTPM_num); |
|
|
|
lri.DataDWord = tmp_reg; |
|
|
|
} |
|
|
|
#endif |
|
|
|
} |
|
|
|
|
|
|
|
anv_batch_emit(&batch, GENX(MI_BATCH_BUFFER_END), bbe); |
|
|
|
|
|
|
|
assert(batch.next <= batch.end); |