r300: Remove GLcontext requirement from radeon_nqssadce

Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>

src/mesa/drivers/dri/r300/compiler/r3xx_fragprog.c

@@ -281,14 +281,14 @@ GLboolean r3xx_compile_fragment_program(struct r300_fragment_program_compiler* c
 			.IsNativeSwizzle = &r500FPIsNativeSwizzle,
 			.BuildSwizzle = &r500FPBuildSwizzle
 		};
-		radeonNqssaDce(c->ctx, c->program, &nqssadce);
+		radeonNqssaDce(c->program, &nqssadce, 0);
 	} else {
 		struct radeon_nqssadce_descr nqssadce = {
 			.Init = &nqssadce_init,
 			.IsNativeSwizzle = &r300FPIsNativeSwizzle,
 			.BuildSwizzle = &r300FPBuildSwizzle
 		};
-		radeonNqssaDce(c->ctx, c->program, &nqssadce);
+		radeonNqssaDce(c->program, &nqssadce, 0);
 	}
 
 	if (c->debug) {

src/mesa/drivers/dri/r300/compiler/radeon_nqssadce.c

@@ -166,7 +166,7 @@ static void process_instruction(struct nqssadce_state* s)
 	if (inst->Opcode != OPCODE_KIL) {
 		struct register_state *regstate = get_reg_state(s, inst->DstReg.File, inst->DstReg.Index);
 		if (!regstate) {
-			_mesa_problem(s->Ctx, "NqssaDce: bad destination register (%i[%i])\n",
+			fprintf(stderr, "r300 driver: NqssaDce: bad destination register (%i[%i])\n",
 				inst->DstReg.File, inst->DstReg.Index);
 			return;
 		}
@@ -244,7 +244,7 @@ static void process_instruction(struct nqssadce_state* s)
 		inst = track_used_srcreg(s, inst, 0, 0xb);
 		break;
 	default:
-		_mesa_problem(s->Ctx, "NqssaDce: Unknown opcode %d\n", inst->Opcode);
+		fprintf(stderr, "r300 driver: NqssaDce: Unknown opcode %d\n", inst->Opcode);
 		return;
 	}
 }
@@ -277,14 +277,14 @@ static void calculateInputsOutputs(struct gl_program *p)
 	p->OutputsWritten = OutputsWritten;
 }
 
-void radeonNqssaDce(GLcontext *ctx, struct gl_program *p, struct radeon_nqssadce_descr* descr)
+void radeonNqssaDce(struct gl_program *p, struct radeon_nqssadce_descr* descr, void * data)
 {
 	struct nqssadce_state s;
 
 	_mesa_bzero(&s, sizeof(s));
-	s.Ctx = ctx;
 	s.Program = p;
 	s.Descr = descr;
+	s.UserData = data;
 	s.Descr->Init(&s);
 	s.IP = p->NumInstructions;
 

src/mesa/drivers/dri/r300/compiler/radeon_nqssadce.h

@@ -44,7 +44,6 @@ struct register_state {
  * read from, etc.
  */
 struct nqssadce_state {
-	GLcontext *Ctx;
 	struct gl_program *Program;
 	struct radeon_nqssadce_descr *Descr;
 
@@ -59,6 +58,8 @@ struct nqssadce_state {
 	struct register_state Temps[MAX_PROGRAM_TEMPS];
 	struct register_state Outputs[VERT_RESULT_MAX];
 	struct register_state Address;
+
+	void * UserData;
 };
 
 
@@ -83,11 +84,9 @@ struct radeon_nqssadce_descr {
 	 * The transformation will work recursively on the emitted instruction(s).
 	 */
 	void (*BuildSwizzle)(struct nqssadce_state*, struct prog_dst_register dst, struct prog_src_register src);
-
-	void *Data;
 };
 
-void radeonNqssaDce(GLcontext *ctx, struct gl_program *p, struct radeon_nqssadce_descr* descr);
+void radeonNqssaDce(struct gl_program *p, struct radeon_nqssadce_descr* descr, void * data);
 struct prog_src_register lmul_swizzle(GLuint swizzle, struct prog_src_register srcreg);
 
 #endif /* __RADEON_PROGRAM_NQSSADCE_H_ */

src/mesa/drivers/dri/r300/r300_vertprog.c

@@ -1496,7 +1496,7 @@ static void addArtificialOutputs(GLcontext *ctx, struct gl_program *prog)
 
 static void nqssadceInit(struct nqssadce_state* s)
 {
-	r300ContextPtr r300 = R300_CONTEXT(s->Ctx);
+	r300ContextPtr r300 = (r300ContextPtr)(s->UserData);
 	GLuint fp_reads;
 
 	fp_reads = r300->selected_fp->Base->InputsRead;
@@ -1582,7 +1582,7 @@ static struct r300_vertex_program *build_program(GLcontext *ctx,
 			.IsNativeSwizzle = &swizzleIsNative,
 			.BuildSwizzle = NULL
 		};
-		radeonNqssaDce(ctx, prog, &nqssadce);
+		radeonNqssaDce(prog, &nqssadce, r300);
 
 		/* We need this step for reusing temporary registers */
 		_mesa_optimize_program(ctx, prog);