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@@ -1901,10 +1901,30 @@ radv_get_hs_offchip_param(struct radv_device *device, uint32_t *max_offchip_buff |
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device->physical_device->rad_info.family != CHIP_CARRIZO && |
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device->physical_device->rad_info.family != CHIP_STONEY; |
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unsigned max_offchip_buffers_per_se = double_offchip_buffers ? 128 : 64; |
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unsigned max_offchip_buffers = max_offchip_buffers_per_se * |
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device->physical_device->rad_info.max_se; |
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unsigned max_offchip_buffers; |
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unsigned offchip_granularity; |
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unsigned hs_offchip_param; |
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/* |
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* Per RadeonSI: |
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* This must be one less than the maximum number due to a hw limitation. |
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* Various hardware bugs in SI, CIK, and GFX9 need this. |
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* |
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* Per AMDVLK: |
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* Vega10 should limit max_offchip_buffers to 508 (4 * 127). |
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* Gfx7 should limit max_offchip_buffers to 508 |
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* Gfx6 should limit max_offchip_buffers to 126 (2 * 63) |
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* |
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* Follow AMDVLK here. |
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*/ |
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if (device->physical_device->rad_info.family == CHIP_VEGA10 || |
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device->physical_device->rad_info.chip_class == CIK || |
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device->physical_device->rad_info.chip_class == SI) |
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--max_offchip_buffers_per_se; |
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max_offchip_buffers = max_offchip_buffers_per_se * |
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device->physical_device->rad_info.max_se; |
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switch (device->tess_offchip_block_dw_size) { |
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default: |
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assert(0); |