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@@ -806,6 +806,7 @@ static void |
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write_alu(write_ctx *ctx, const nir_alu_instr *alu) |
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{ |
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unsigned num_srcs = nir_op_infos[alu->op].num_inputs; |
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unsigned dst_components = nir_dest_num_components(alu->dest.dest); |
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/* 9 bits for nir_op */ |
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STATIC_ASSERT(nir_num_opcodes <= 512); |
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@@ -826,13 +827,16 @@ write_alu(write_ctx *ctx, const nir_alu_instr *alu) |
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header.alu.writemask_or_two_swizzles = alu->src[0].swizzle[0]; |
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if (num_srcs > 1) |
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header.alu.writemask_or_two_swizzles |= alu->src[1].swizzle[0] << 2; |
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} else if (!alu->dest.dest.is_ssa) { |
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/* For registers, this field is a writemask. */ |
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} else if (!alu->dest.dest.is_ssa && dst_components <= 4) { |
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/* For vec4 registers, this field is a writemask. */ |
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header.alu.writemask_or_two_swizzles = alu->dest.write_mask; |
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} |
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write_dest(ctx, &alu->dest.dest, header, alu->instr.type); |
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if (!alu->dest.dest.is_ssa && dst_components > 4) |
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blob_write_uint32(ctx->blob, alu->dest.write_mask); |
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if (header.alu.packed_src_ssa_16bit) { |
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for (unsigned i = 0; i < num_srcs; i++) { |
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assert(alu->src[i].src.is_ssa); |
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@@ -888,6 +892,16 @@ read_alu(read_ctx *ctx, union packed_instr header) |
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read_dest(ctx, &alu->dest.dest, &alu->instr, header); |
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unsigned dst_components = nir_dest_num_components(alu->dest.dest); |
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if (alu->dest.dest.is_ssa) { |
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alu->dest.write_mask = u_bit_consecutive(0, dst_components); |
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} else if (dst_components <= 4) { |
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alu->dest.write_mask = header.alu.writemask_or_two_swizzles; |
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} else { |
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alu->dest.write_mask = blob_read_uint32(ctx->blob); |
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} |
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if (header.alu.packed_src_ssa_16bit) { |
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for (unsigned i = 0; i < num_srcs; i++) { |
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nir_alu_src *src = &alu->src[i]; |
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@@ -930,13 +944,6 @@ read_alu(read_ctx *ctx, union packed_instr header) |
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} |
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} |
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if (alu->dest.dest.is_ssa) { |
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alu->dest.write_mask = |
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u_bit_consecutive(0, alu->dest.dest.ssa.num_components); |
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} else { |
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alu->dest.write_mask = header.alu.writemask_or_two_swizzles; |
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} |
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if (header.alu.packed_src_ssa_16bit && |
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alu->dest.dest.is_ssa) { |
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alu->src[0].swizzle[0] = header.alu.writemask_or_two_swizzles & 0x3; |