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@@ -140,3 +140,36 @@ by an `s_buffer_store` with the same address. Inserting an `s_nop` between them |
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does not mitigate the issue, so an `s_waitcnt lgkmcnt(0)` must be inserted. |
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This is not mentioned by LLVM among the other GFX10 bugs, but LLVM doesn't use |
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SMEM stores, so it's not surprising that they didn't notice it. |
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### VMEMtoScalarWriteHazard |
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Triggered by: |
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VMEM/FLAT/GLOBAL/SCRATCH/DS instruction reads an SGPR (or EXEC, or M0). |
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Then, a SALU/SMEM instruction writes the same SGPR. |
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Mitigated by: |
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A VALU instruction or an `s_waitcnt vmcnt(0)` between the two instructions. |
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### Offset3fBug |
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Any branch that is located at offset 0x3f will be buggy. Just insert some NOPs to make sure no branch |
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is located at this offset. |
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### InstFwdPrefetchBug |
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According to LLVM, the `s_inst_prefetch` instruction can cause a hang. |
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There are no further details. |
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### LdsMisalignedBug |
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When there is a misaligned multi-dword FLAT load/store instruction in WGP mode, |
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it needs to be split into multiple single-dword FLAT instructions. |
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ACO doesn't use FLAT load/store on GFX10, so is unaffected. |
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### FlatSegmentOffsetBug |
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The 12-bit immediate OFFSET field of FLAT instructions must always be 0. |
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GLOBAL and SCRATCH are unaffected. |
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ACO doesn't use FLAT load/store on GFX10, so is unaffected. |