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@@ -19,8 +19,6 @@ |
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#define PIPE_ATOMIC_OS_SOLARIS |
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#elif defined(_MSC_VER) |
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#define PIPE_ATOMIC_MSVC_INTRINSIC |
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#elif (defined(_MSC_VER) && (defined(__i386__) || defined(_M_IX86)) |
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#define PIPE_ATOMIC_ASM_MSVC_X86 |
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#elif defined(__GNUC__) && ((__GNUC__ * 100 + __GNUC_MINOR__) >= 401) |
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#define PIPE_ATOMIC_GCC_INTRINSIC |
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#elif (defined(__GNUC__) && defined(__i386__)) |
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@@ -226,74 +224,6 @@ p_atomic_cmpxchg(int32_t *v, int32_t old, int32_t _new) |
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#endif |
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/* Locally coded assembly for MSVC on x86: |
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*/ |
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#if defined(PIPE_ATOMIC_ASM_MSVC_X86) |
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#define PIPE_ATOMIC "MSVC x86 assembly" |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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#define p_atomic_set(_v, _i) (*(_v) = (_i)) |
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#define p_atomic_read(_v) (*(_v)) |
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static inline boolean |
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p_atomic_dec_zero(int32_t *v) |
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{ |
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unsigned char c; |
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__asm { |
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mov eax, [v] |
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lock dec dword ptr [eax] |
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sete byte ptr [c] |
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} |
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return c != 0; |
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} |
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static inline void |
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p_atomic_inc(int32_t *v) |
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{ |
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__asm { |
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mov eax, [v] |
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lock inc dword ptr [eax] |
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} |
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} |
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static inline void |
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p_atomic_dec(int32_t *v) |
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{ |
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__asm { |
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mov eax, [v] |
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lock dec dword ptr [eax] |
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} |
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} |
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static inline int32_t |
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p_atomic_cmpxchg(int32_t *v, int32_t old, int32_t _new) |
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{ |
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int32_t orig; |
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__asm { |
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mov ecx, [v] |
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mov eax, [old] |
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mov edx, [_new] |
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lock cmpxchg [ecx], edx |
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mov [orig], eax |
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} |
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return orig; |
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} |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif |
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#if defined(PIPE_ATOMIC_MSVC_INTRINSIC) |
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#define PIPE_ATOMIC "MSVC Intrinsics" |