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@@ -103,6 +103,71 @@ radv_use_tc_compat_htile_for_image(struct radv_device *device, |
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return true; |
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} |
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static bool |
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radv_use_dcc_for_image(struct radv_device *device, |
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const struct radv_image_create_info *create_info, |
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const VkImageCreateInfo *pCreateInfo) |
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{ |
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bool dcc_compatible_formats; |
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bool blendable; |
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/* DCC (Delta Color Compression) is only available for GFX8+. */ |
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if (device->physical_device->rad_info.chip_class < VI) |
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return false; |
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if (device->instance->debug_flags & RADV_DEBUG_NO_DCC) |
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return false; |
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/* TODO: Enable DCC for storage images. */ |
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if ((pCreateInfo->usage & VK_IMAGE_USAGE_STORAGE_BIT) || |
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(pCreateInfo->flags & VK_IMAGE_CREATE_EXTENDED_USAGE_BIT_KHR)) |
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return false; |
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if (pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR) |
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return false; |
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/* TODO: Enable DCC for mipmaps and array layers. */ |
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if (pCreateInfo->mipLevels > 1 || pCreateInfo->arrayLayers > 1) |
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return false; |
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if (create_info->scanout) |
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return false; |
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/* TODO: Enable DCC for MSAA textures. */ |
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if (pCreateInfo->samples >= 2) |
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return false; |
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/* Determine if the formats are DCC compatible. */ |
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dcc_compatible_formats = |
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radv_is_colorbuffer_format_supported(pCreateInfo->format, |
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&blendable); |
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if (pCreateInfo->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT) { |
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const struct VkImageFormatListCreateInfoKHR *format_list = |
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(const struct VkImageFormatListCreateInfoKHR *) |
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vk_find_struct_const(pCreateInfo->pNext, |
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IMAGE_FORMAT_LIST_CREATE_INFO_KHR); |
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/* We have to ignore the existence of the list if viewFormatCount = 0 */ |
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if (format_list && format_list->viewFormatCount) { |
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/* compatibility is transitive, so we only need to check |
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* one format with everything else. */ |
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for (unsigned i = 0; i < format_list->viewFormatCount; ++i) { |
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if (!radv_dcc_formats_compatible(pCreateInfo->format, |
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format_list->pViewFormats[i])) |
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dcc_compatible_formats = false; |
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} |
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} else { |
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dcc_compatible_formats = false; |
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} |
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} |
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if (!dcc_compatible_formats) |
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return false; |
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return true; |
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} |
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static int |
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radv_init_surface(struct radv_device *device, |
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struct radeon_surf *surface, |
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@@ -112,7 +177,7 @@ radv_init_surface(struct radv_device *device, |
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unsigned array_mode = radv_choose_tiling(device, create_info); |
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const struct vk_format_description *desc = |
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vk_format_description(pCreateInfo->format); |
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bool is_depth, is_stencil, blendable; |
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bool is_depth, is_stencil; |
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is_depth = vk_format_has_depth(desc); |
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is_stencil = vk_format_has_stencil(desc); |
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@@ -158,36 +223,9 @@ radv_init_surface(struct radv_device *device, |
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surface->flags |= RADEON_SURF_OPTIMIZE_FOR_SPACE; |
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bool dcc_compatible_formats = radv_is_colorbuffer_format_supported(pCreateInfo->format, &blendable); |
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if (pCreateInfo->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT) { |
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const struct VkImageFormatListCreateInfoKHR *format_list = |
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(const struct VkImageFormatListCreateInfoKHR *) |
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vk_find_struct_const(pCreateInfo->pNext, |
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IMAGE_FORMAT_LIST_CREATE_INFO_KHR); |
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/* We have to ignore the existence of the list if viewFormatCount = 0 */ |
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if (format_list && format_list->viewFormatCount) { |
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/* compatibility is transitive, so we only need to check |
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* one format with everything else. */ |
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for (unsigned i = 0; i < format_list->viewFormatCount; ++i) { |
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if (!radv_dcc_formats_compatible(pCreateInfo->format, |
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format_list->pViewFormats[i])) |
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dcc_compatible_formats = false; |
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} |
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} else { |
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dcc_compatible_formats = false; |
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} |
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} |
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if ((pCreateInfo->usage & VK_IMAGE_USAGE_STORAGE_BIT) || |
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(pCreateInfo->flags & VK_IMAGE_CREATE_EXTENDED_USAGE_BIT_KHR) || |
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!dcc_compatible_formats || |
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(pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR) || |
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pCreateInfo->mipLevels > 1 || pCreateInfo->arrayLayers > 1 || |
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device->physical_device->rad_info.chip_class < VI || |
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create_info->scanout || (device->instance->debug_flags & RADV_DEBUG_NO_DCC) || |
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pCreateInfo->samples >= 2) |
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if (!radv_use_dcc_for_image(device, create_info, pCreateInfo)) |
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surface->flags |= RADEON_SURF_DISABLE_DCC; |
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if (create_info->scanout) |
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surface->flags |= RADEON_SURF_SCANOUT; |
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return 0; |