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i965/vs: Restructure emit() functions around a vec4_instruction constructor.

We sometimes want to put an instruction somewhere besides the end of
the instruction stream, and we also want per-opcode instruction
generation to enable compile-time checking of operands.
tags/mesa-8.0-rc1
Eric Anholt 14 years ago
parent
commit
88e08de801
2 changed files with 33 additions and 16 deletions
  1. 8
    0
      src/mesa/drivers/dri/i965/brw_vec4.h
  2. 25
    16
      src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp

+ 8
- 0
src/mesa/drivers/dri/i965/brw_vec4.h View File

@@ -239,6 +239,12 @@ public:
return node;
}

vec4_instruction(vec4_visitor *v, enum opcode opcode,
dst_reg dst = dst_reg(),
src_reg src0 = src_reg(),
src_reg src1 = src_reg(),
src_reg src2 = src_reg());

struct brw_reg get_dst(void);
struct brw_reg get_src(int i);

@@ -384,6 +390,8 @@ public:
bool dead_code_eliminate();
bool virtual_grf_interferes(int a, int b);

vec4_instruction *emit(vec4_instruction *inst);

vec4_instruction *emit(enum opcode opcode);

vec4_instruction *emit(enum opcode opcode, dst_reg dst, src_reg src0);

+ 25
- 16
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp View File

@@ -72,43 +72,52 @@ dst_reg::dst_reg(src_reg reg)
this->fixed_hw_reg = reg.fixed_hw_reg;
}

vec4_instruction *
vec4_visitor::emit(enum opcode opcode, dst_reg dst,
src_reg src0, src_reg src1, src_reg src2)
vec4_instruction::vec4_instruction(vec4_visitor *v,
enum opcode opcode, dst_reg dst,
src_reg src0, src_reg src1, src_reg src2)
{
vec4_instruction *inst = new(mem_ctx) vec4_instruction();

inst->opcode = opcode;
inst->dst = dst;
inst->src[0] = src0;
inst->src[1] = src1;
inst->src[2] = src2;
inst->ir = this->base_ir;
inst->annotation = this->current_annotation;
this->opcode = opcode;
this->dst = dst;
this->src[0] = src0;
this->src[1] = src1;
this->src[2] = src2;
this->ir = v->base_ir;
this->annotation = v->current_annotation;
}

vec4_instruction *
vec4_visitor::emit(vec4_instruction *inst)
{
this->instructions.push_tail(inst);

return inst;
}

vec4_instruction *
vec4_visitor::emit(enum opcode opcode, dst_reg dst,
src_reg src0, src_reg src1, src_reg src2)
{
return emit(new(mem_ctx) vec4_instruction(this, opcode, dst,
src0, src1, src2));
}


vec4_instruction *
vec4_visitor::emit(enum opcode opcode, dst_reg dst, src_reg src0, src_reg src1)
{
return emit(opcode, dst, src0, src1, src_reg());
return emit(new(mem_ctx) vec4_instruction(this, opcode, dst, src0, src1));
}

vec4_instruction *
vec4_visitor::emit(enum opcode opcode, dst_reg dst, src_reg src0)
{
assert(dst.writemask != 0);
return emit(opcode, dst, src0, src_reg(), src_reg());
return emit(new(mem_ctx) vec4_instruction(this, opcode, dst, src0));
}

vec4_instruction *
vec4_visitor::emit(enum opcode opcode)
{
return emit(opcode, dst_reg(), src_reg(), src_reg(), src_reg());
return emit(new(mem_ctx) vec4_instruction(this, opcode, dst_reg()));
}

void

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