r300: Move vertex program compilation to compiler

This is just the first step of refactoring. The separation is not yet
clean enough with this commit.

Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>

src/mesa/drivers/dri/r300/compiler/Makefile

@@ -17,6 +17,7 @@ C_SOURCES = \
 		r300_fragprog_emit.c \
 		r500_fragprog.c \
 		r500_fragprog_emit.c \
+		r3xx_vertprog.c \
 		\
 		memory_pool.c
 

src/mesa/drivers/dri/r300/compiler/radeon_code.h

@@ -147,4 +147,29 @@ struct rX00_fragment_program_code {
 };
 
 
+#define VSF_MAX_FRAGMENT_LENGTH (255*4)
+#define VSF_MAX_FRAGMENT_TEMPS (14)
+
+struct r300_vertex_program_external_state {
+	GLuint FpReads;
+	GLuint FogAttr;
+	GLuint WPosAttr;
+};
+
+struct r300_vertex_program_code {
+	int length;
+	union {
+		GLuint d[VSF_MAX_FRAGMENT_LENGTH];
+		float f[VSF_MAX_FRAGMENT_LENGTH];
+	} body;
+
+	int pos_end;
+	int num_temporaries;	/* Number of temp vars used by program */
+	int inputs[VERT_ATTRIB_MAX];
+	int outputs[VERT_RESULT_MAX];
+
+	GLbitfield InputsRead;
+	GLbitfield OutputsWritten;
+};
+
 #endif /* RADEON_CODE_H */

src/mesa/drivers/dri/r300/compiler/radeon_compiler.h

@@ -66,4 +66,14 @@ struct r300_fragment_program_compiler {
 
 GLboolean r3xx_compile_fragment_program(struct r300_fragment_program_compiler* c);
 
+
+struct r300_vertex_program_compiler {
+	struct radeon_compiler Base;
+	struct r300_vertex_program_code *code;
+	struct r300_vertex_program_external_state state;
+	struct gl_program *program;
+};
+
+GLboolean r3xx_compile_vertex_program(struct r300_vertex_program_compiler* c, GLcontext * ctx);
+
 #endif /* RADEON_COMPILER_H */

src/mesa/drivers/dri/r300/r300_context.h

@@ -390,46 +390,19 @@ struct r300_hw_state {
 
 /* Vertex shader state */
 
-/* Perhaps more if we store programs in vmem? */
-/* drm_r300_cmd_header_t->vpu->count is unsigned char */
-#define VSF_MAX_FRAGMENT_LENGTH (255*4)
-
-/* Can be tested with colormat currently. */
-#define VSF_MAX_FRAGMENT_TEMPS (14)
-
 #define COLOR_IS_RGBA
 #define TAG(x) r300##x
 #include "tnl_dd/t_dd_vertex.h"
 #undef TAG
 
-struct r300_vertex_program_key {
-	GLuint FpReads;
-	GLuint FogAttr;
-	GLuint WPosAttr;
-};
-
 struct r300_vertex_program {
 	struct gl_vertex_program *Base;
 	struct r300_vertex_program *next;
 
-	struct r300_vertex_program_key key;
-	GLbitfield InputsRead;
-	GLbitfield OutputsWritten;
-
-	struct r300_vertex_shader_hw_code {
-		int length;
-		union {
-			GLuint d[VSF_MAX_FRAGMENT_LENGTH];
-			float f[VSF_MAX_FRAGMENT_LENGTH];
-		} body;
-	} hw_code;
+	struct r300_vertex_program_external_state key;
+	struct r300_vertex_program_code code;
 
 	GLboolean error;
-
-	int pos_end;
-	int num_temporaries;	/* Number of temp vars used by program */
-	int inputs[VERT_ATTRIB_MAX];
-	int outputs[VERT_RESULT_MAX];
 };
 
 struct r300_vertex_program_cont {

src/mesa/drivers/dri/r300/r300_draw.c

@@ -341,7 +341,7 @@ static void r300SetVertexFormat(GLcontext *ctx, const struct gl_client_array *ar
 	{
 		int i, tmp;
 
-		tmp = r300->selected_vp->InputsRead;
+		tmp = r300->selected_vp->code.InputsRead;
 		i = 0;
 		vbuf->num_attribs = 0;
 		while (tmp) {
@@ -437,7 +437,7 @@ static GLboolean r300TryDrawPrims(GLcontext *ctx,
 	if (r300->fallback)
 		return GL_FALSE;
 
-	r300SetupVAP(ctx, r300->selected_vp->InputsRead, r300->selected_vp->OutputsWritten);
+	r300SetupVAP(ctx, r300->selected_vp->code.InputsRead, r300->selected_vp->code.OutputsWritten);
 
 	r300UpdateShaderStates(r300);
 

src/mesa/drivers/dri/r300/r300_ioctl.c

@@ -567,12 +567,12 @@ static void r300EmitClearState(GLcontext * ctx)
                                          0, 0xf, PVS_DST_REG_OUT);
 		vpu.cmd[2] = PVS_SRC_OPERAND(0, PVS_SRC_SELECT_X, PVS_SRC_SELECT_Y,
                                       PVS_SRC_SELECT_Z, PVS_SRC_SELECT_W,
-                                      PVS_SRC_REG_INPUT, VSF_FLAG_NONE);
+                                      PVS_SRC_REG_INPUT, NEGATE_NONE);
 		vpu.cmd[3] = PVS_SRC_OPERAND(0, PVS_SRC_SELECT_FORCE_0,
                                       PVS_SRC_SELECT_FORCE_0,
                                       PVS_SRC_SELECT_FORCE_0,
                                       PVS_SRC_SELECT_FORCE_0,
-                                      PVS_SRC_REG_INPUT, VSF_FLAG_NONE);
+                                      PVS_SRC_REG_INPUT, NEGATE_NONE);
 		vpu.cmd[4] = 0x0;
 
 		vpu.cmd[5] = PVS_OP_DST_OPERAND(VE_ADD, GL_FALSE, GL_FALSE, 1, 0xf,
@@ -580,13 +580,12 @@ static void r300EmitClearState(GLcontext * ctx)
 		vpu.cmd[6] = PVS_SRC_OPERAND(1, PVS_SRC_SELECT_X,
                                       PVS_SRC_SELECT_Y, PVS_SRC_SELECT_Z,
                                       PVS_SRC_SELECT_W, PVS_SRC_REG_INPUT,
-
-                                      VSF_FLAG_NONE);
+                                      NEGATE_NONE);
 		vpu.cmd[7] = PVS_SRC_OPERAND(1, PVS_SRC_SELECT_FORCE_0,
                                       PVS_SRC_SELECT_FORCE_0,
                                       PVS_SRC_SELECT_FORCE_0,
                                       PVS_SRC_SELECT_FORCE_0,
-                                      PVS_SRC_REG_INPUT, VSF_FLAG_NONE);
+                                      PVS_SRC_REG_INPUT, NEGATE_NONE);
 		vpu.cmd[8] = 0x0;
 
 		r300->vap_flush_needed = GL_TRUE;

src/mesa/drivers/dri/r300/r300_reg.h

@@ -2667,6 +2667,24 @@ enum {
 	PVS_SRC_ADDR_MODE_1_SHIFT	= 32,
 };
 
+
+#define PVS_OP_DST_OPERAND(opcode, math_inst, macro_inst, reg_index, reg_writemask, reg_class)	\
+	 (((opcode & PVS_DST_OPCODE_MASK) << PVS_DST_OPCODE_SHIFT)	\
+	 | ((math_inst & PVS_DST_MATH_INST_MASK) << PVS_DST_MATH_INST_SHIFT)	\
+	 | ((macro_inst & PVS_DST_MACRO_INST_MASK) << PVS_DST_MACRO_INST_SHIFT)	\
+	 | ((reg_index & PVS_DST_OFFSET_MASK) << PVS_DST_OFFSET_SHIFT)	\
+	 | ((reg_writemask & 0xf) << PVS_DST_WE_X_SHIFT)	/* X Y Z W */	\
+	 | ((reg_class & PVS_DST_REG_TYPE_MASK) << PVS_DST_REG_TYPE_SHIFT))
+
+#define PVS_SRC_OPERAND(in_reg_index, comp_x, comp_y, comp_z, comp_w, reg_class, negate)	\
+	(((in_reg_index & PVS_SRC_OFFSET_MASK) << PVS_SRC_OFFSET_SHIFT)				\
+	 | ((comp_x & PVS_SRC_SWIZZLE_X_MASK) << PVS_SRC_SWIZZLE_X_SHIFT)			\
+	 | ((comp_y & PVS_SRC_SWIZZLE_Y_MASK) << PVS_SRC_SWIZZLE_Y_SHIFT)			\
+	 | ((comp_z & PVS_SRC_SWIZZLE_Z_MASK) << PVS_SRC_SWIZZLE_Z_SHIFT)			\
+	 | ((comp_w & PVS_SRC_SWIZZLE_W_MASK) << PVS_SRC_SWIZZLE_W_SHIFT)			\
+	 | ((negate & 0xf) << PVS_SRC_MODIFIER_X_SHIFT)	/* X Y Z W */				\
+	 | ((reg_class & PVS_SRC_REG_TYPE_MASK) << PVS_SRC_REG_TYPE_SHIFT))
+
 /*\}*/
 
 /* BEGIN: Packet 3 commands */

src/mesa/drivers/dri/r300/r300_state.c

@@ -1458,7 +1458,7 @@ static void r300SetupRSUnit(GLcontext * ctx)
 	hw_tcl_on = r300->options.hw_tcl_enabled;
 
 	if (hw_tcl_on)
-		OutputsWritten.vp_outputs = r300->selected_vp->OutputsWritten;
+		OutputsWritten.vp_outputs = r300->selected_vp->code.OutputsWritten;
 	else
 		RENDERINPUTS_COPY(OutputsWritten.index_bitset, r300->render_inputs_bitset);
 
@@ -1552,7 +1552,7 @@ static void r500SetupRSUnit(GLcontext * ctx)
 	hw_tcl_on = r300->options.hw_tcl_enabled;
 
 	if (hw_tcl_on)
-		OutputsWritten.vp_outputs = r300->selected_vp->OutputsWritten;
+		OutputsWritten.vp_outputs = r300->selected_vp->code.OutputsWritten;
 	else
 		RENDERINPUTS_COPY(OutputsWritten.index_bitset, r300->render_inputs_bitset);
 

src/mesa/drivers/dri/r300/r300_vertprog.h

@@ -3,34 +3,6 @@
 
 #include "r300_reg.h"
 
-#define PVS_OP_DST_OPERAND(opcode, math_inst, macro_inst, reg_index, reg_writemask, reg_class)	\
-	 (((opcode & PVS_DST_OPCODE_MASK) << PVS_DST_OPCODE_SHIFT)	\
-	 | ((math_inst & PVS_DST_MATH_INST_MASK) << PVS_DST_MATH_INST_SHIFT)	\
-	 | ((macro_inst & PVS_DST_MACRO_INST_MASK) << PVS_DST_MACRO_INST_SHIFT)	\
-	 | ((reg_index & PVS_DST_OFFSET_MASK) << PVS_DST_OFFSET_SHIFT)	\
-	 | ((reg_writemask & 0xf) << PVS_DST_WE_X_SHIFT)	/* X Y Z W */	\
-	 | ((reg_class & PVS_DST_REG_TYPE_MASK) << PVS_DST_REG_TYPE_SHIFT))
-
-#define PVS_SRC_OPERAND(in_reg_index, comp_x, comp_y, comp_z, comp_w, reg_class, negate)	\
-	(((in_reg_index & PVS_SRC_OFFSET_MASK) << PVS_SRC_OFFSET_SHIFT)				\
-	 | ((comp_x & PVS_SRC_SWIZZLE_X_MASK) << PVS_SRC_SWIZZLE_X_SHIFT)			\
-	 | ((comp_y & PVS_SRC_SWIZZLE_Y_MASK) << PVS_SRC_SWIZZLE_Y_SHIFT)			\
-	 | ((comp_z & PVS_SRC_SWIZZLE_Z_MASK) << PVS_SRC_SWIZZLE_Z_SHIFT)			\
-	 | ((comp_w & PVS_SRC_SWIZZLE_W_MASK) << PVS_SRC_SWIZZLE_W_SHIFT)			\
-	 | ((negate & 0xf) << PVS_SRC_MODIFIER_X_SHIFT)	/* X Y Z W */				\
-	 | ((reg_class & PVS_SRC_REG_TYPE_MASK) << PVS_SRC_REG_TYPE_SHIFT))
-
-#if 1
-
-#define VSF_FLAG_X	1
-#define VSF_FLAG_Y	2
-#define VSF_FLAG_Z	4
-#define VSF_FLAG_W	8
-#define VSF_FLAG_XYZ	(VSF_FLAG_X | VSF_FLAG_Y | VSF_FLAG_Z)
-#define VSF_FLAG_ALL  0xf
-#define VSF_FLAG_NONE  0
-
-#endif
 
 void r300SetupVertexProgram(r300ContextPtr rmesa);
 

src/mesa/shader/prog_instruction.h

@@ -133,6 +133,7 @@
 #define NEGATE_Y    0x2
 #define NEGATE_Z    0x4
 #define NEGATE_W    0x8
+#define NEGATE_XYZ  0x7
 #define NEGATE_XYZW 0xf
 #define NEGATE_NONE 0x0
 /*@}*/
@@ -303,11 +304,11 @@ struct prog_dst_register
     * Condition code swizzle value.
     */
    GLuint CondSwizzle:12;
-   
+
    /**
     * Selects the condition code register to use for conditional destination
     * update masking.  In NV_fragmnet_program or NV_vertex_program2 mode, only
-    * condition code register 0 is available.  In NV_vertex_program3 mode, 
+    * condition code register 0 is available.  In NV_vertex_program3 mode,
     * condition code registers 0 and 1 are available.
     */
    GLuint CondSrc:1;
@@ -359,7 +360,7 @@ struct prog_instruction
     * NV_fragment_program, NV_fragment_program_option, NV_vertex_program3.
     */
    GLuint SaturateMode:2;
-   
+
    /**
     * Per-instruction selectable precision: FLOAT32, FLOAT16, FIXED12.
     *
@@ -374,7 +375,7 @@ struct prog_instruction
    /*@{*/
    /** Source texture unit. */
    GLuint TexSrcUnit:5;
-   
+
    /** Source texture target, one of TEXTURE_{1D,2D,3D,CUBE,RECT}_INDEX */
    GLuint TexSrcTarget:3;