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@@ -257,8 +257,7 @@ fix_swizzle(GLuint swizzle) |
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* Convert IR storage to an instruction dst register. |
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*/ |
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static void |
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storage_to_dst_reg(struct prog_dst_register *dst, const slang_ir_storage *st, |
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GLuint writemask) |
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storage_to_dst_reg(struct prog_dst_register *dst, const slang_ir_storage *st) |
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{ |
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const GLint size = st->Size; |
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GLint index = st->Index; |
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@@ -280,23 +279,29 @@ storage_to_dst_reg(struct prog_dst_register *dst, const slang_ir_storage *st, |
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assert(size >= 1); |
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assert(size <= 4); |
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#if 0 |
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if (size == 1) { |
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GLuint comp = GET_SWZ(swizzle, 0); |
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assert(comp < 4); |
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dst->WriteMask = WRITEMASK_X << comp; |
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} |
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else { |
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dst->WriteMask = writemask; |
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} |
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#elif 1 |
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if (swizzle != SWIZZLE_XYZW) { |
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dst->WriteMask = swizzle_to_writemask(swizzle); |
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} |
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else { |
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GLuint writemask; |
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switch (size) { |
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case 1: |
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writemask = WRITEMASK_X << GET_SWZ(st->Swizzle, 0); |
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break; |
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case 2: |
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writemask = WRITEMASK_XY; |
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break; |
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case 3: |
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writemask = WRITEMASK_XYZ; |
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break; |
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case 4: |
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writemask = WRITEMASK_XYZW; |
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break; |
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default: |
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; /* error would have been caught above */ |
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} |
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dst->WriteMask = writemask; |
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} |
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#endif |
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} |
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@@ -422,27 +427,8 @@ emit_instruction(slang_emit_info *emitInfo, |
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inst->Opcode = opcode; |
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inst->BranchTarget = -1; /* invalid */ |
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if (dst) { |
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GLuint writemask; |
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switch (dst->Size) { |
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case 4: |
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writemask = WRITEMASK_XYZW; |
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break; |
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case 3: |
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writemask = WRITEMASK_XYZ; |
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break; |
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case 2: |
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writemask = WRITEMASK_XY; |
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break; |
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case 1: |
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writemask = WRITEMASK_X << GET_SWZ(dst->Swizzle, 0); |
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break; |
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default: |
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writemask = WRITEMASK_XYZW; |
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assert(0); |
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} |
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storage_to_dst_reg(&inst->DstReg, dst, writemask); |
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} |
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if (dst) |
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storage_to_dst_reg(&inst->DstReg, dst); |
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if (src1) |
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storage_to_src_reg(&inst->SrcReg[0], src1); |
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@@ -1245,14 +1231,7 @@ emit_copy(slang_emit_info *emitInfo, slang_ir_node *n) |
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/* fixup the previous instruction (which stored the RHS result) */ |
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assert(n->Children[0]->Store->Index >= 0); |
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/* use tighter writemask when possible */ |
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#if 0 |
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if (n->Writemask == WRITEMASK_XYZW) { |
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n->Writemask = inst->DstReg.WriteMask; |
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printf("Narrow writemask to 0x%x\n", n->Writemask); |
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} |
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#endif |
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storage_to_dst_reg(&inst->DstReg, n->Children[0]->Store, n->Writemask); |
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storage_to_dst_reg(&inst->DstReg, n->Children[0]->Store); |
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return inst; |
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} |
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else |
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@@ -1263,7 +1242,6 @@ emit_copy(slang_emit_info *emitInfo, slang_ir_node *n) |
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slang_ir_storage dstStore = *n->Children[0]->Store; |
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slang_ir_storage srcStore = *n->Children[1]->Store; |
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GLint size = srcStore.Size; |
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ASSERT(n->Children[0]->Writemask == WRITEMASK_XYZW); |
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ASSERT(n->Children[1]->Store->Swizzle == SWIZZLE_NOOP); |
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dstStore.Size = 4; |
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srcStore.Size = 4; |
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@@ -1718,10 +1696,7 @@ move_block(slang_emit_info *emitInfo, |
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/* move matrix/struct etc (block of registers) */ |
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slang_ir_storage dstStore = *dst; |
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slang_ir_storage srcStore = *src; |
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//GLint size = srcStore.Size; |
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/*ASSERT(n->Children[0]->Writemask == WRITEMASK_XYZW); |
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ASSERT(n->Children[1]->Store->Swizzle == SWIZZLE_NOOP); |
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*/ |
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dstStore.Size = 4; |
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srcStore.Size = 4; |
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while (size >= 4) { |