I965: fix bug#9625-get the correct PV for quardstrip

The order of vertices in payload for quardstrip is (0, 1, 3, 2),
so the PV for quardstrip is c->reg.vertex[2].

src/mesa/drivers/dri/i965/brw_gs.c

@@ -82,6 +82,9 @@ static void compile_gs_prog( struct brw_context *brw,
    case GL_QUADS:
       brw_gs_quads( &c ); 
       break;
+   case GL_QUAD_STRIP:
+      brw_gs_quad_strip( &c );
+      break;
    case GL_LINE_LOOP:
       brw_gs_lines( &c );
       break;
@@ -145,7 +148,7 @@ static const GLenum gs_prim[GL_POLYGON+1] = {
    GL_TRIANGLES,
    GL_TRIANGLES,
    GL_QUADS,
-   GL_QUADS,
+   GL_QUAD_STRIP,
    GL_TRIANGLES
 };
 

src/mesa/drivers/dri/i965/brw_gs.h

@@ -67,6 +67,7 @@ struct brw_gs_compile {
 #define ATTR_SIZE  (4*4)
 
 void brw_gs_quads( struct brw_gs_compile *c );
+void brw_gs_quad_strip( struct brw_gs_compile *c );
 void brw_gs_tris( struct brw_gs_compile *c );
 void brw_gs_lines( struct brw_gs_compile *c );
 void brw_gs_points( struct brw_gs_compile *c );

src/mesa/drivers/dri/i965/brw_gs_emit.c

@@ -116,6 +116,16 @@ void brw_gs_quads( struct brw_gs_compile *c )
    brw_gs_emit_vue(c, c->reg.vertex[2], 1, ((_3DPRIM_POLYGON << 2) | R02_PRIM_END));
 }
 
+void brw_gs_quad_strip( struct brw_gs_compile *c )
+{
+   brw_gs_alloc_regs(c, 4);
+   
+   brw_gs_emit_vue(c, c->reg.vertex[2], 0, ((_3DPRIM_POLYGON << 2) | R02_PRIM_START));
+   brw_gs_emit_vue(c, c->reg.vertex[3], 0, (_3DPRIM_POLYGON << 2));
+   brw_gs_emit_vue(c, c->reg.vertex[0], 0, (_3DPRIM_POLYGON << 2)); 
+   brw_gs_emit_vue(c, c->reg.vertex[1], 1, ((_3DPRIM_POLYGON << 2) | R02_PRIM_END));
+}
+
 void brw_gs_tris( struct brw_gs_compile *c )
 {
    brw_gs_alloc_regs(c, 3);