@@ -661,25 +661,6 @@ TGSI Instruction Specification | |||
TBD | |||
1.9.8 BGNFOR - Begin a For-Loop | |||
dst.x = floor(src.x) | |||
dst.y = floor(src.y) | |||
dst.z = floor(src.z) | |||
if (dst.y <= 0) | |||
pc = [matching ENDFOR] + 1 | |||
endif | |||
Note: The destination must be a loop register. | |||
The source must be a constant register. | |||
1.9.9 REP - Repeat | |||
TBD | |||
1.9.10 ELSE - Else | |||
TBD | |||
@@ -690,23 +671,6 @@ TGSI Instruction Specification | |||
TBD | |||
1.9.12 ENDFOR - End a For-Loop | |||
dst.x = dst.x + dst.z | |||
dst.y = dst.y - 1.0 | |||
if (dst.y > 0) | |||
pc = [matching BGNFOR instruction] + 1 | |||
endif | |||
Note: The destination must be a loop register. | |||
1.9.13 ENDREP - End Repeat | |||
TBD | |||
1.10 GL_NV_vertex_program3 | |||
--------------------------- | |||
@@ -586,7 +586,6 @@ iter_instruction( | |||
/* update indentation */ | |||
if (inst->Instruction.Opcode == TGSI_OPCODE_IF || | |||
inst->Instruction.Opcode == TGSI_OPCODE_ELSE || | |||
inst->Instruction.Opcode == TGSI_OPCODE_BGNFOR || | |||
inst->Instruction.Opcode == TGSI_OPCODE_BGNLOOP) { | |||
ctx->indentation += indent_spaces; | |||
} |
@@ -3186,14 +3186,6 @@ exec_instruction( | |||
*pc = -1; | |||
break; | |||
case TGSI_OPCODE_REP: | |||
assert (0); | |||
break; | |||
case TGSI_OPCODE_ENDREP: | |||
assert (0); | |||
break; | |||
case TGSI_OPCODE_PUSHA: | |||
assert (0); | |||
break; | |||
@@ -3258,29 +3250,6 @@ exec_instruction( | |||
emit_primitive(mach); | |||
break; | |||
case TGSI_OPCODE_BGNFOR: | |||
assert(mach->LoopCounterStackTop < TGSI_EXEC_MAX_LOOP_NESTING); | |||
for (chan_index = 0; chan_index < 3; chan_index++) { | |||
FETCH( &mach->LoopCounterStack[mach->LoopCounterStackTop].xyzw[chan_index], 0, chan_index ); | |||
} | |||
++mach->LoopCounterStackTop; | |||
STORE(&mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_X], 0, CHAN_X); | |||
/* update LoopMask */ | |||
if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[0] <= 0.0f) { | |||
mach->LoopMask &= ~0x1; | |||
} | |||
if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[1] <= 0.0f) { | |||
mach->LoopMask &= ~0x2; | |||
} | |||
if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[2] <= 0.0f) { | |||
mach->LoopMask &= ~0x4; | |||
} | |||
if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[3] <= 0.0f) { | |||
mach->LoopMask &= ~0x8; | |||
} | |||
/* TODO: if mach->LoopMask == 0, jump to end of loop */ | |||
UPDATE_EXEC_MASK(mach); | |||
/* fall-through (for now) */ | |||
case TGSI_OPCODE_BGNLOOP: | |||
/* push LoopMask and ContMasks */ | |||
assert(mach->LoopStackTop < TGSI_EXEC_MAX_LOOP_NESTING); | |||
@@ -3295,56 +3264,6 @@ exec_instruction( | |||
mach->BreakType = TGSI_EXEC_BREAK_INSIDE_LOOP; | |||
break; | |||
case TGSI_OPCODE_ENDFOR: | |||
assert(mach->LoopCounterStackTop > 0); | |||
micro_sub(&mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y], | |||
&mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y], | |||
&mach->Temps[TEMP_1_I].xyzw[TEMP_1_C]); | |||
/* update LoopMask */ | |||
if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[0] <= 0.0f) { | |||
mach->LoopMask &= ~0x1; | |||
} | |||
if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[1] <= 0.0f) { | |||
mach->LoopMask &= ~0x2; | |||
} | |||
if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[2] <= 0.0f) { | |||
mach->LoopMask &= ~0x4; | |||
} | |||
if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[3] <= 0.0f) { | |||
mach->LoopMask &= ~0x8; | |||
} | |||
micro_add(&mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_X], | |||
&mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_X], | |||
&mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Z]); | |||
assert(mach->LoopLabelStackTop > 0); | |||
inst = mach->Instructions + mach->LoopLabelStack[mach->LoopLabelStackTop - 1]; | |||
STORE(&mach->LoopCounterStack[mach->LoopCounterStackTop].xyzw[CHAN_X], 0, CHAN_X); | |||
/* Restore ContMask, but don't pop */ | |||
assert(mach->ContStackTop > 0); | |||
mach->ContMask = mach->ContStack[mach->ContStackTop - 1]; | |||
UPDATE_EXEC_MASK(mach); | |||
if (mach->ExecMask) { | |||
/* repeat loop: jump to instruction just past BGNLOOP */ | |||
assert(mach->LoopLabelStackTop > 0); | |||
*pc = mach->LoopLabelStack[mach->LoopLabelStackTop - 1] + 1; | |||
} | |||
else { | |||
/* exit loop: pop LoopMask */ | |||
assert(mach->LoopStackTop > 0); | |||
mach->LoopMask = mach->LoopStack[--mach->LoopStackTop]; | |||
/* pop ContMask */ | |||
assert(mach->ContStackTop > 0); | |||
mach->ContMask = mach->ContStack[--mach->ContStackTop]; | |||
assert(mach->LoopLabelStackTop > 0); | |||
--mach->LoopLabelStackTop; | |||
assert(mach->LoopCounterStackTop > 0); | |||
--mach->LoopCounterStackTop; | |||
mach->BreakType = mach->BreakStack[--mach->BreakStackTop]; | |||
} | |||
UPDATE_EXEC_MASK(mach); | |||
break; | |||
case TGSI_OPCODE_ENDLOOP: | |||
/* Restore ContMask, but don't pop */ | |||
assert(mach->ContStackTop > 0); |
@@ -106,12 +106,12 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] = | |||
{ 1, 2, 1, 0, 0, 0, "TXL", TGSI_OPCODE_TXL }, | |||
{ 0, 0, 0, 0, 0, 0, "BRK", TGSI_OPCODE_BRK }, | |||
{ 0, 1, 0, 1, 0, 1, "IF", TGSI_OPCODE_IF }, | |||
{ 1, 1, 0, 0, 0, 1, "BGNFOR", TGSI_OPCODE_BGNFOR }, | |||
{ 0, 1, 0, 0, 0, 1, "REP", TGSI_OPCODE_REP }, | |||
{ 1, 1, 0, 0, 0, 1, "", 75 }, /* removed */ | |||
{ 0, 1, 0, 0, 0, 1, "", 76 }, /* removed */ | |||
{ 0, 0, 0, 1, 1, 1, "ELSE", TGSI_OPCODE_ELSE }, | |||
{ 0, 0, 0, 0, 1, 0, "ENDIF", TGSI_OPCODE_ENDIF }, | |||
{ 1, 0, 0, 0, 1, 0, "ENDFOR", TGSI_OPCODE_ENDFOR }, | |||
{ 0, 0, 0, 0, 1, 0, "ENDREP", TGSI_OPCODE_ENDREP }, | |||
{ 1, 0, 0, 0, 1, 0, "", 79 }, /* removed */ | |||
{ 0, 0, 0, 0, 1, 0, "", 80 }, /* removed */ | |||
{ 0, 1, 0, 0, 0, 0, "PUSHA", TGSI_OPCODE_PUSHA }, | |||
{ 1, 0, 0, 0, 0, 0, "POPA", TGSI_OPCODE_POPA }, | |||
{ 1, 1, 0, 0, 0, 0, "CEIL", TGSI_OPCODE_CEIL }, |
@@ -111,12 +111,8 @@ OP12(DP2) | |||
OP12_TEX(TXL) | |||
OP00(BRK) | |||
OP01_LBL(IF) | |||
OP11(BGNFOR) | |||
OP01(REP) | |||
OP00_LBL(ELSE) | |||
OP00(ENDIF) | |||
OP10(ENDFOR) | |||
OP00(ENDREP) | |||
OP01(PUSHA) | |||
OP10(POPA) | |||
OP11(CEIL) |
@@ -346,25 +346,6 @@ iter_instruction( | |||
} | |||
} | |||
switch (inst->Instruction.Opcode) { | |||
case TGSI_OPCODE_BGNFOR: | |||
case TGSI_OPCODE_ENDFOR: | |||
if (inst->Dst[0].Register.File != TGSI_FILE_LOOP || | |||
inst->Dst[0].Register.Index != 0) { | |||
report_error(ctx, "Destination register must be LOOP[0]"); | |||
} | |||
break; | |||
} | |||
switch (inst->Instruction.Opcode) { | |||
case TGSI_OPCODE_BGNFOR: | |||
if (inst->Src[0].Register.File != TGSI_FILE_CONSTANT && | |||
inst->Src[0].Register.File != TGSI_FILE_IMMEDIATE) { | |||
report_error(ctx, "Source register file must be either CONST or IMM"); | |||
} | |||
break; | |||
} | |||
ctx->num_instructions++; | |||
return TRUE; |
@@ -2533,14 +2533,6 @@ emit_instruction( | |||
return 0; | |||
break; | |||
case TGSI_OPCODE_BGNFOR: | |||
return 0; | |||
break; | |||
case TGSI_OPCODE_REP: | |||
return 0; | |||
break; | |||
case TGSI_OPCODE_ELSE: | |||
return 0; | |||
break; | |||
@@ -2549,14 +2541,6 @@ emit_instruction( | |||
return 0; | |||
break; | |||
case TGSI_OPCODE_ENDFOR: | |||
return 0; | |||
break; | |||
case TGSI_OPCODE_ENDREP: | |||
return 0; | |||
break; | |||
case TGSI_OPCODE_PUSHA: | |||
return 0; | |||
break; |