Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>tags/17.0-branchpoint
| @@ -140,6 +140,7 @@ gallivm_get_shader_param(enum pipe_shader_cap param) | |||
| case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: | |||
| case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: | |||
| return 0; | |||
| case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: | |||
| return 32; | |||
| @@ -534,6 +534,7 @@ tgsi_exec_get_shader_param(enum pipe_shader_cap param) | |||
| return 1; | |||
| case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED: | |||
| case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: | |||
| case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: | |||
| return 0; | |||
| case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: | |||
| return PIPE_MAX_SHADER_BUFFERS; | |||
| @@ -463,6 +463,10 @@ to be 0. | |||
| * ``PIPE_SHADER_CAP_SUPPORTED_IRS``: Supported representations of the | |||
| program. It should be a mask of ``pipe_shader_ir`` bits. | |||
| * ``PIPE_SHADER_CAP_MAX_SHADER_IMAGES``: Maximum number of image units. | |||
| * ``PIPE_SHADER_CAP_LOWER_IF_THRESHOLD``: IF and ELSE branches with a lower | |||
| cost than this value should be lowered by the state tracker for better | |||
| performance. This is a tunable for the GLSL compiler and the behavior is | |||
| specific to the compiler. | |||
| .. _pipe_compute_cap: | |||
| @@ -499,6 +499,7 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, | |||
| return 32; | |||
| case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: | |||
| case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: | |||
| return 0; | |||
| } | |||
| debug_printf("unknown shader param %d\n", param); | |||
| @@ -300,6 +300,7 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, | |||
| case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: | |||
| case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: | |||
| return 0; | |||
| default: | |||
| debug_printf("unknown vertex shader param %d\n", param); | |||
| @@ -348,6 +349,7 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, | |||
| case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: | |||
| case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: | |||
| return 0; | |||
| default: | |||
| debug_printf("unknown fragment shader param %d\n", param); | |||
| @@ -345,6 +345,7 @@ nv50_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, | |||
| case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: | |||
| case PIPE_SHADER_CAP_SUPPORTED_IRS: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: | |||
| case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: | |||
| return 0; | |||
| default: | |||
| NOUVEAU_ERR("unknown PIPE_SHADER_CAP %d\n", param); | |||
| @@ -374,6 +374,7 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, | |||
| return 1; | |||
| case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED: | |||
| case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: | |||
| case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: | |||
| return 0; | |||
| case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: | |||
| return NVC0_MAX_BUFFERS; | |||
| @@ -339,6 +339,7 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, e | |||
| case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: | |||
| case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: | |||
| return 0; | |||
| case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: | |||
| return 32; | |||
| @@ -401,6 +402,7 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, e | |||
| case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: | |||
| case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: | |||
| return 0; | |||
| case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: | |||
| return 32; | |||
| @@ -561,6 +561,7 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e | |||
| case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: | |||
| case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: | |||
| return 0; | |||
| case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: | |||
| /* due to a bug in the shader compiler, some loops hang | |||
| @@ -659,6 +659,7 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu | |||
| case PIPE_SHADER_CAP_SUPPORTED_IRS: | |||
| case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED: | |||
| case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED: | |||
| case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: | |||
| return 0; | |||
| } | |||
| return 0; | |||
| @@ -499,6 +499,7 @@ vgpu9_get_shader_param(struct pipe_screen *screen, unsigned shader, | |||
| case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: | |||
| case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: | |||
| return 0; | |||
| case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: | |||
| return 32; | |||
| @@ -561,6 +562,7 @@ vgpu9_get_shader_param(struct pipe_screen *screen, unsigned shader, | |||
| case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: | |||
| case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: | |||
| return 0; | |||
| case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: | |||
| return 32; | |||
| @@ -656,6 +658,7 @@ vgpu10_get_shader_param(struct pipe_screen *screen, unsigned shader, | |||
| case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: | |||
| case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: | |||
| return 0; | |||
| case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: | |||
| return 32; | |||
| @@ -402,6 +402,7 @@ vc4_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, | |||
| return 32; | |||
| case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: | |||
| case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: | |||
| case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: | |||
| return 0; | |||
| default: | |||
| fprintf(stderr, "unknown shader param %d\n", param); | |||
| @@ -312,6 +312,7 @@ virgl_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_sh | |||
| return 32; | |||
| case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: | |||
| return 4096 * sizeof(float[4]); | |||
| case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: | |||
| default: | |||
| return 0; | |||
| } | |||
| @@ -809,6 +809,7 @@ enum pipe_shader_cap | |||
| PIPE_SHADER_CAP_MAX_SHADER_BUFFERS, | |||
| PIPE_SHADER_CAP_SUPPORTED_IRS, | |||
| PIPE_SHADER_CAP_MAX_SHADER_IMAGES, | |||
| PIPE_SHADER_CAP_LOWER_IF_THRESHOLD, | |||
| }; | |||
| /** | |||