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@@ -2879,20 +2879,37 @@ tu6_emit_ibo(struct tu_device *device, struct tu_cs *draw_state, |
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tu_cs_begin_sub_stream(device, draw_state, 64, &cs); |
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uint32_t opcode, ibo_addr_reg; |
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enum a6xx_state_block sb; |
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enum a6xx_state_type st; |
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switch (type) { |
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case MESA_SHADER_FRAGMENT: |
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opcode = CP_LOAD_STATE6; |
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st = ST6_SHADER; |
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sb = SB6_IBO; |
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ibo_addr_reg = REG_A6XX_SP_IBO_LO; |
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break; |
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case MESA_SHADER_COMPUTE: |
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opcode = CP_LOAD_STATE6_FRAG; |
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st = ST6_IBO; |
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sb = SB6_CS_SHADER; |
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ibo_addr_reg = REG_A6XX_SP_CS_IBO_LO; |
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break; |
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default: |
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unreachable("unsupported stage for ibos"); |
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} |
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/* emit texture state: */ |
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tu_cs_emit_pkt7(&cs, CP_LOAD_STATE6, 3); |
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tu_cs_emit_pkt7(&cs, opcode, 3); |
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tu_cs_emit(&cs, CP_LOAD_STATE6_0_DST_OFF(0) | |
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CP_LOAD_STATE6_0_STATE_TYPE(type == MESA_SHADER_COMPUTE ? |
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ST6_IBO : ST6_SHADER) | |
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CP_LOAD_STATE6_0_STATE_TYPE(st) | |
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CP_LOAD_STATE6_0_STATE_SRC(SS6_INDIRECT) | |
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CP_LOAD_STATE6_0_STATE_BLOCK(type == MESA_SHADER_COMPUTE ? |
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SB6_CS_SHADER : SB6_IBO) | |
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CP_LOAD_STATE6_0_STATE_BLOCK(sb) | |
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CP_LOAD_STATE6_0_NUM_UNIT(link->image_mapping.num_ibo)); |
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tu_cs_emit_qw(&cs, ibo_addr); /* SRC_ADDR_LO/HI */ |
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tu_cs_emit_pkt4(&cs, |
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type == MESA_SHADER_COMPUTE ? |
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REG_A6XX_SP_IBO_LO : REG_A6XX_SP_CS_IBO_LO, 2); |
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tu_cs_emit_pkt4(&cs, ibo_addr_reg, 2); |
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tu_cs_emit_qw(&cs, ibo_addr); /* SRC_ADDR_LO/HI */ |
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return tu_cs_end_sub_stream(draw_state, &cs); |