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@@ -1395,10 +1395,31 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr) |
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case nir_op_extract_u8: |
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case nir_op_extract_i8: { |
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const brw_reg_type type = brw_int_type(1, instr->op == nir_op_extract_i8); |
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nir_const_value *byte = nir_src_as_const_value(instr->src[1].src); |
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assert(byte != NULL); |
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bld.MOV(result, subscript(op[0], type, byte->u32[0])); |
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/* The PRMs say: |
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* |
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* BDW+ |
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* There is no direct conversion from B/UB to Q/UQ or Q/UQ to B/UB. |
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* Use two instructions and a word or DWord intermediate integer type. |
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*/ |
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if (nir_dest_bit_size(instr->dest.dest) == 64) { |
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const brw_reg_type type = brw_int_type(2, instr->op == nir_op_extract_i8); |
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if (instr->op == nir_op_extract_i8) { |
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/* If we need to sign extend, extract to a word first */ |
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fs_reg w_temp = bld.vgrf(BRW_REGISTER_TYPE_W); |
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bld.MOV(w_temp, subscript(op[0], type, byte->u32[0])); |
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bld.MOV(result, w_temp); |
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} else { |
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/* Otherwise use an AND with 0xff and a word type */ |
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bld.AND(result, subscript(op[0], type, byte->u32[0] / 2), brw_imm_uw(0xff)); |
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} |
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} else { |
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const brw_reg_type type = brw_int_type(1, instr->op == nir_op_extract_i8); |
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bld.MOV(result, subscript(op[0], type, byte->u32[0])); |
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} |
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break; |
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} |
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