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nv50: fix TEX for WriteMask not equal 0xf

If you e.g. only need alpha, it ends up in the first reg,
not the last, as it would when reading rgb too.
tags/mesa_7_7_rc1
Christoph Bumiller 16 years ago
parent
commit
5f4f7ad965
1 changed files with 5 additions and 4 deletions
  1. 5
    4
      src/gallium/drivers/nv50/nv50_program.c

+ 5
- 4
src/gallium/drivers/nv50/nv50_program.c View File

@@ -1166,10 +1166,11 @@ emit_tex(struct nv50_pc *pc, struct nv50_reg **dst, unsigned mask,
emit(pc, e);

#if 1
if (mask & 1) emit_mov(pc, dst[0], t[0]);
if (mask & 2) emit_mov(pc, dst[1], t[1]);
if (mask & 4) emit_mov(pc, dst[2], t[2]);
if (mask & 8) emit_mov(pc, dst[3], t[3]);
c = 0;
if (mask & 1) emit_mov(pc, dst[0], t[c++]);
if (mask & 2) emit_mov(pc, dst[1], t[c++]);
if (mask & 4) emit_mov(pc, dst[2], t[c++]);
if (mask & 8) emit_mov(pc, dst[3], t[c]);

free_temp4(pc, t);
#else

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