iris: use vtbl to avoid multiple symbols, fix state base address

src/gallium/drivers/iris/iris_batch.c

@@ -201,6 +201,9 @@ iris_batch_reset(struct iris_batch *batch)
 
    if (batch->state_sizes)
       _mesa_hash_table_clear(batch->state_sizes, NULL);
+
+   if (batch->ring == I915_EXEC_RENDER)
+      batch->emit_state_base_address(batch);
 }
 
 static void

src/gallium/drivers/iris/iris_batch.h

@@ -89,6 +89,8 @@ struct iris_batch {
 
    /** Map from batch offset to iris_alloc_state data (with DEBUG_BATCH) */
    struct hash_table *state_sizes;
+
+   void (*emit_state_base_address)(struct iris_batch *batch);
 };
 
 void iris_init_batch(struct iris_batch *batch,

src/gallium/drivers/iris/iris_context.c

@@ -84,10 +84,23 @@ iris_destroy_context(struct pipe_context *ctx)
    ralloc_free(ice);
 }
 
+#define genX_call(devinfo, func, ...)             \
+   switch (devinfo->gen) {                        \
+   case 10:                                       \
+      gen10_##func(__VA_ARGS__);                  \
+      break;                                      \
+   case 9:                                        \
+      gen9_##func(__VA_ARGS__);                   \
+      break;                                      \
+   default:                                       \
+      unreachable("Unknown hardware generation"); \
+   }
+
 struct pipe_context *
 iris_create_context(struct pipe_screen *pscreen, void *priv, unsigned flags)
 {
    struct iris_screen *screen = (struct iris_screen*)pscreen;
+   const struct gen_device_info *devinfo = &screen->devinfo;
    struct iris_context *ice = rzalloc(NULL, struct iris_context);
 
    if (!ice)
@@ -115,11 +128,10 @@ iris_create_context(struct pipe_screen *pscreen, void *priv, unsigned flags)
    iris_init_resource_functions(ctx);
    iris_init_query_functions(ctx);
 
-   iris_init_state(ice);
    iris_init_program_cache(ice);
 
    iris_init_batch(&ice->render_batch, screen, &ice->dbg, I915_EXEC_RENDER);
-   iris_upload_initial_gpu_state(&ice->render_batch);
+   genX_call(devinfo, init_state, ice);
 
    return ctx;
 }

src/gallium/drivers/iris/iris_context.h

@@ -75,6 +75,16 @@ struct iris_batch;
 
 struct iris_depth_stencil_alpha_state;
 
+enum iris_program_cache_id {
+   IRIS_CACHE_VS  = MESA_SHADER_VERTEX,
+   IRIS_CACHE_TCS = MESA_SHADER_TESS_CTRL,
+   IRIS_CACHE_TES = MESA_SHADER_TESS_EVAL,
+   IRIS_CACHE_GS  = MESA_SHADER_GEOMETRY,
+   IRIS_CACHE_FS  = MESA_SHADER_FRAGMENT,
+   IRIS_CACHE_CS  = MESA_SHADER_COMPUTE,
+   IRIS_CACHE_BLORP_BLIT,
+};
+
 struct iris_program_cache {
    struct hash_table *table;
    struct iris_bo *bo;
@@ -131,6 +141,15 @@ struct iris_context {
       struct pipe_framebuffer_state framebuffer;
 
       struct iris_sampler_state *samplers[MESA_SHADER_STAGES][IRIS_MAX_TEXTURE_SAMPLERS];
+
+      void (*upload_render_state)(struct iris_context *ice,
+                                  struct iris_batch *batch,
+                                  const struct pipe_draw_info *draw);
+      unsigned (*derived_program_state_size)(enum iris_program_cache_id id);
+      void (*set_derived_program_state)(const struct gen_device_info *devinfo,
+                                        enum iris_program_cache_id cache_id,
+                                        struct iris_compiled_shader *shader);
+      void (*destroy_state)(struct iris_context *ice);
    } state;
 };
 
@@ -151,38 +170,15 @@ void iris_init_clear_functions(struct pipe_context *ctx);
 void iris_init_program_functions(struct pipe_context *ctx);
 void iris_init_resource_functions(struct pipe_context *ctx);
 void iris_init_query_functions(struct pipe_context *ctx);
-
-void iris_setup_state_base_address(struct iris_context *ice,
-                                   struct iris_batch *batch,
-                                   struct iris_bo *instruction_bo);
-void iris_upload_initial_gpu_state(struct iris_batch *batch);
-void iris_upload_render_state(struct iris_context *ice,
-                              struct iris_batch *batch,
-                              const struct pipe_draw_info *draw);
-void iris_destroy_state(struct iris_context *ice);
-
 void iris_update_compiled_shaders(struct iris_context *ice);
 
 void iris_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info);
 
-enum iris_program_cache_id {
-   IRIS_CACHE_VS  = MESA_SHADER_VERTEX,
-   IRIS_CACHE_TCS = MESA_SHADER_TESS_CTRL,
-   IRIS_CACHE_TES = MESA_SHADER_TESS_EVAL,
-   IRIS_CACHE_GS  = MESA_SHADER_GEOMETRY,
-   IRIS_CACHE_FS  = MESA_SHADER_FRAGMENT,
-   IRIS_CACHE_CS  = MESA_SHADER_COMPUTE,
-   IRIS_CACHE_BLORP_BLIT,
-};
-
-void iris_init_state(struct iris_context *ice);
+void gen9_init_state(struct iris_context *ice);
+void gen10_init_state(struct iris_context *ice);
 void iris_init_program_cache(struct iris_context *ice);
 void iris_destroy_program_cache(struct iris_context *ice);
 void iris_print_program_cache(struct iris_context *ice);
-unsigned iris_derived_program_state_size(enum iris_program_cache_id cache_id);
-void iris_set_derived_program_state(const struct gen_device_info *devinfo,
-                                    enum iris_program_cache_id cache_id,
-                                    struct iris_compiled_shader *shader);
 bool iris_bind_cached_shader(struct iris_context *ice,
                              enum iris_program_cache_id cache_id,
                              const void *key);

src/gallium/drivers/iris/iris_draw.c

@@ -37,5 +37,5 @@ iris_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
    struct iris_context *ice = (struct iris_context *) ctx;
 
    iris_update_compiled_shaders(ice);
-   iris_upload_render_state(ice, &ice->render_batch, info);
+   ice->state.upload_render_state(ice, &ice->render_batch, info);
 }

src/gallium/drivers/iris/iris_program_cache.c

@@ -259,7 +259,7 @@ iris_upload_and_bind_shader(struct iris_context *ice,
    struct iris_program_cache *cache = &ice->shaders.cache;
    struct iris_compiled_shader *shader =
       ralloc_size(cache->table, sizeof(struct iris_compiled_shader) +
-                  iris_derived_program_state_size(cache_id));
+                  ice->state.derived_program_state_size(cache_id));
    const struct iris_compiled_shader *existing =
       find_existing_assembly(cache, assembly, prog_data->program_size);
 
@@ -283,7 +283,7 @@ iris_upload_and_bind_shader(struct iris_context *ice,
    ralloc_steal(shader->prog_data, prog_data->pull_param);
 
    /* Store the 3DSTATE shader packets and other derived state. */
-   iris_set_derived_program_state(devinfo, cache_id, shader);
+   ice->state.set_derived_program_state(devinfo, cache_id, shader);
 
    struct keybox *keybox = make_keybox(cache, cache_id, key);
    _mesa_hash_table_insert(cache->table, keybox, shader);