Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Kristian Høgsberg <krh@bitplanet.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>tags/10.4-branchpoint
@@ -648,6 +648,15 @@ intel_batchbuffer_emit_mi_flush(struct brw_context *brw) | |||
} else { | |||
int flags = PIPE_CONTROL_NO_WRITE | PIPE_CONTROL_WRITE_FLUSH; | |||
if (brw->gen >= 6) { | |||
if (brw->gen == 9) { | |||
/* Hardware workaround: SKL | |||
* | |||
* Emit Pipe Control with all bits set to zero before emitting | |||
* a Pipe Control with VF Cache Invalidate set. | |||
*/ | |||
brw_emit_pipe_control_flush(brw, 0); | |||
} | |||
flags |= PIPE_CONTROL_INSTRUCTION_FLUSH | | |||
PIPE_CONTROL_DEPTH_CACHE_FLUSH | | |||
PIPE_CONTROL_VF_CACHE_INVALIDATE | |