Browse Source

iris: blorp using resolve hooks

tags/19.1-branchpoint
Kenneth Graunke 6 years ago
parent
commit
53c484ba8a
2 changed files with 70 additions and 6 deletions
  1. 48
    3
      src/gallium/drivers/iris/iris_blit.c
  2. 22
    3
      src/gallium/drivers/iris/iris_clear.c

+ 48
- 3
src/gallium/drivers/iris/iris_blit.c View File

@@ -309,7 +309,7 @@ iris_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
iris_blorp_surf_for_resource(&dst_surf, info->dst.resource,
ISL_AUX_USAGE_NONE, true);

iris_resource_prepare_access(ice, dst_res, info->dst.level, 1,
iris_resource_prepare_access(ice, dst_res, info->dst.level, 1,
info->dst.box.z, info->dst.box.depth,
dst_aux_usage, dst_clear_supported);

@@ -442,6 +442,30 @@ iris_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
info->dst.resource);
}

static void
get_copy_region_aux_settings(const struct gen_device_info *devinfo,
struct iris_resource *res,
enum isl_aux_usage *out_aux_usage,
bool *out_clear_supported)
{
switch (res->aux.usage) {
case ISL_AUX_USAGE_MCS:
case ISL_AUX_USAGE_CCS_E:
*out_aux_usage = res->aux.usage;
/* Prior to Gen9, fast-clear only supported 0/1 clear colors. Since
* we're going to re-interpret the format as an integer format possibly
* with a different number of components, we can't handle clear colors
* until Gen9.
*/
*out_clear_supported = devinfo->gen >= 9;
break;
default:
*out_aux_usage = ISL_AUX_USAGE_NONE;
*out_clear_supported = false;
break;
}
}

/**
* The pipe->resource_copy_region() driver hook.
*
@@ -457,9 +481,27 @@ iris_resource_copy_region(struct pipe_context *ctx,
unsigned src_level,
const struct pipe_box *src_box)
{
struct iris_screen *screen = (void *) ctx->screen;
const struct gen_device_info *devinfo = &screen->devinfo;
struct blorp_batch blorp_batch;
struct iris_context *ice = (void *) ctx;
struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
struct iris_resource *src_res = (void *) src;
struct iris_resource *dst_res = (void *) dst;

enum isl_aux_usage src_aux_usage, dst_aux_usage;
bool src_clear_supported, dst_clear_supported;
get_copy_region_aux_settings(devinfo, src_res, &src_aux_usage,
&src_clear_supported);
get_copy_region_aux_settings(devinfo, dst_res, &dst_aux_usage,
&dst_clear_supported);

iris_resource_prepare_access(ice, src_res, src_level, 1,
src_box->z, src_box->depth,
src_aux_usage, src_clear_supported);
iris_resource_prepare_access(ice, dst_res, dst_level, 1,
dstz, src_box->depth,
dst_aux_usage, dst_clear_supported);

blorp_batch_init(&ice->blorp, &blorp_batch, batch, 0);

@@ -478,8 +520,8 @@ iris_resource_copy_region(struct pipe_context *ctx,
// XXX: what about one surface being a buffer and not the other?

struct blorp_surf src_surf, dst_surf;
iris_blorp_surf_for_resource(&src_surf, src, ISL_AUX_USAGE_NONE, false);
iris_blorp_surf_for_resource(&dst_surf, dst, ISL_AUX_USAGE_NONE, true);
iris_blorp_surf_for_resource(&src_surf, src, src_aux_usage, false);
iris_blorp_surf_for_resource(&dst_surf, dst, dst_aux_usage, true);

for (int slice = 0; slice < src_box->depth; slice++) {
iris_batch_maybe_flush(batch, 1500);
@@ -493,6 +535,9 @@ iris_resource_copy_region(struct pipe_context *ctx,

blorp_batch_finish(&blorp_batch);

iris_resource_finish_write(ice, dst_res, dst_level, dstz, src_box->depth,
dst_aux_usage);

iris_flush_and_dirty_for_history(ice, batch, (struct iris_resource *) dst);
}


+ 22
- 3
src/gallium/drivers/iris/iris_clear.c View File

@@ -64,8 +64,15 @@ clear_color(struct iris_context *ice,
blorp_batch_init(&ice->blorp, &blorp_batch, batch, blorp_flags);

bool color_write_disable[4] = { false, false, false, false };
enum isl_aux_usage aux_usage =
iris_resource_render_aux_usage(ice, res, format,
false, false);

iris_resource_prepare_render(ice, res, level,
box->z, box->depth, aux_usage);

struct blorp_surf surf;
iris_blorp_surf_for_resource(&surf, p_res, ISL_AUX_USAGE_NONE, true);
iris_blorp_surf_for_resource(&surf, p_res, aux_usage, true);

if (!isl_format_supports_rendering(devinfo, format) &&
isl_format_is_rgbx(format))
@@ -78,6 +85,9 @@ clear_color(struct iris_context *ice,

blorp_batch_finish(&blorp_batch);
iris_flush_and_dirty_for_history(ice, batch, res);

iris_resource_finish_render(ice, res, level,
box->z, box->depth, aux_usage);
}


@@ -118,13 +128,14 @@ clear_depth_stencil(struct iris_context *ice,
iris_get_depth_stencil_resources(p_res, &z_res, &stencil_res);

if (z_res) {
iris_resource_prepare_depth(ice, z_res, level, box->z, box->depth);
iris_blorp_surf_for_resource(&z_surf, &z_res->base,
ISL_AUX_USAGE_NONE, true);
z_res->aux.usage, true);
}

if (stencil_res) {
iris_blorp_surf_for_resource(&stencil_surf, &stencil_res->base,
ISL_AUX_USAGE_NONE, true);
stencil_res->aux.usage, true);
}

blorp_clear_depth_stencil(&blorp_batch, &z_surf, &stencil_surf,
@@ -137,6 +148,11 @@ clear_depth_stencil(struct iris_context *ice,

blorp_batch_finish(&blorp_batch);
iris_flush_and_dirty_for_history(ice, batch, res);

if (z_res) {
iris_resource_finish_depth(ice, z_res, level,
box->z, box->depth, true);
}
}

/**
@@ -245,6 +261,9 @@ iris_clear_texture(struct pipe_context *ctx,
default:
unreachable("Unknown format bpb");
}

/* No aux surfaces for non-renderable surfaces */
assert(res->aux.usage == ISL_AUX_USAGE_NONE);
}

isl_color_value_unpack(&color, format, data);

Loading…
Cancel
Save