Before, we used the a signed d-word for booleans and the immedates we emitted varried between signed and unsigned. This commit changes the type to unsigned (I think that makes more sense) and makes immediates more consistent. This allows copy propagation to work better cleans up some instructions. total instructions in shared programs:tags/10.4-branchpoint5473519
->5465864
(-0.14%) instructions in affected programs: 432849 -> 425194 (-1.77%) GAINED: 27 LOST: 0 Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Matt Turner <mattst88@gmail.com>
@@ -526,7 +526,7 @@ fs_visitor::visit(ir_expression *ir) | |||
if (ctx->Const.UniformBooleanTrue != 1) { | |||
emit(NOT(this->result, op[0])); | |||
} else { | |||
emit(XOR(this->result, op[0], fs_reg(1))); | |||
emit(XOR(this->result, op[0], fs_reg(1u))); | |||
} | |||
break; | |||
case ir_unop_neg: | |||
@@ -801,7 +801,7 @@ fs_visitor::visit(ir_expression *ir) | |||
this->result.type = BRW_REGISTER_TYPE_F; | |||
} else { | |||
temp = fs_reg(this, glsl_type::int_type); | |||
emit(AND(temp, op[0], fs_reg(1))); | |||
emit(AND(temp, op[0], fs_reg(1u))); | |||
emit(MOV(this->result, temp)); | |||
} | |||
break; | |||
@@ -2329,7 +2329,7 @@ fs_visitor::visit(ir_constant *ir) | |||
case GLSL_TYPE_BOOL: | |||
emit(MOV(dst_reg, | |||
fs_reg(ir->value.b[i] != 0 ? ctx->Const.UniformBooleanTrue | |||
: 0))); | |||
: 0u))); | |||
break; | |||
default: | |||
unreachable("Non-float/uint/int/bool constant"); | |||
@@ -2377,7 +2377,7 @@ fs_visitor::emit_bool_to_cond_code(ir_rvalue *ir) | |||
if (ctx->Const.UniformBooleanTrue == 1) { | |||
fs_reg dst = fs_reg(this, glsl_type::uint_type); | |||
emit(XOR(dst, op[0], op[1])); | |||
inst = emit(AND(reg_null_d, dst, fs_reg(1))); | |||
inst = emit(AND(reg_null_d, dst, fs_reg(1u))); | |||
inst->conditional_mod = BRW_CONDITIONAL_NZ; | |||
} else { | |||
inst = emit(XOR(reg_null_d, op[0], op[1])); | |||
@@ -2389,7 +2389,7 @@ fs_visitor::emit_bool_to_cond_code(ir_rvalue *ir) | |||
if (ctx->Const.UniformBooleanTrue == 1) { | |||
fs_reg dst = fs_reg(this, glsl_type::uint_type); | |||
emit(OR(dst, op[0], op[1])); | |||
inst = emit(AND(reg_null_d, dst, fs_reg(1))); | |||
inst = emit(AND(reg_null_d, dst, fs_reg(1u))); | |||
inst->conditional_mod = BRW_CONDITIONAL_NZ; | |||
} else { | |||
inst = emit(OR(reg_null_d, op[0], op[1])); | |||
@@ -2401,7 +2401,7 @@ fs_visitor::emit_bool_to_cond_code(ir_rvalue *ir) | |||
if (ctx->Const.UniformBooleanTrue == 1) { | |||
fs_reg dst = fs_reg(this, glsl_type::uint_type); | |||
emit(AND(dst, op[0], op[1])); | |||
inst = emit(AND(reg_null_d, dst, fs_reg(1))); | |||
inst = emit(AND(reg_null_d, dst, fs_reg(1u))); | |||
inst->conditional_mod = BRW_CONDITIONAL_NZ; | |||
} else { | |||
inst = emit(AND(reg_null_d, op[0], op[1])); | |||
@@ -3404,7 +3404,7 @@ fs_visitor::resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg) | |||
return; | |||
fs_reg temp = fs_reg(this, glsl_type::bool_type); | |||
emit(AND(temp, *reg, fs_reg(1))); | |||
emit(AND(temp, *reg, fs_reg(1u))); | |||
*reg = temp; | |||
} | |||
@@ -280,8 +280,8 @@ brw_type_for_base_type(const struct glsl_type *type) | |||
case GLSL_TYPE_FLOAT: | |||
return BRW_REGISTER_TYPE_F; | |||
case GLSL_TYPE_INT: | |||
case GLSL_TYPE_BOOL: | |||
return BRW_REGISTER_TYPE_D; | |||
case GLSL_TYPE_BOOL: | |||
case GLSL_TYPE_UINT: | |||
return BRW_REGISTER_TYPE_UD; | |||
case GLSL_TYPE_ARRAY: |
@@ -1316,7 +1316,7 @@ vec4_visitor::visit(ir_expression *ir) | |||
if (ctx->Const.UniformBooleanTrue != 1) { | |||
emit(NOT(result_dst, op[0])); | |||
} else { | |||
emit(XOR(result_dst, op[0], src_reg(1))); | |||
emit(XOR(result_dst, op[0], src_reg(1u))); | |||
} | |||
break; | |||
case ir_unop_neg: | |||
@@ -1506,7 +1506,7 @@ vec4_visitor::visit(ir_expression *ir) | |||
emit(CMP(result_dst, op[0], op[1], | |||
brw_conditional_for_comparison(ir->operation))); | |||
if (ctx->Const.UniformBooleanTrue == 1) { | |||
emit(AND(result_dst, result_src, src_reg(1))); | |||
emit(AND(result_dst, result_src, src_reg(1u))); | |||
} | |||
break; | |||
} | |||
@@ -1522,7 +1522,7 @@ vec4_visitor::visit(ir_expression *ir) | |||
} else { | |||
emit(CMP(result_dst, op[0], op[1], BRW_CONDITIONAL_Z)); | |||
if (ctx->Const.UniformBooleanTrue == 1) { | |||
emit(AND(result_dst, result_src, src_reg(1))); | |||
emit(AND(result_dst, result_src, src_reg(1u))); | |||
} | |||
} | |||
break; | |||
@@ -1538,7 +1538,7 @@ vec4_visitor::visit(ir_expression *ir) | |||
} else { | |||
emit(CMP(result_dst, op[0], op[1], BRW_CONDITIONAL_NZ)); | |||
if (ctx->Const.UniformBooleanTrue == 1) { | |||
emit(AND(result_dst, result_src, src_reg(1))); | |||
emit(AND(result_dst, result_src, src_reg(1u))); | |||
} | |||
} | |||
break; | |||
@@ -1602,7 +1602,7 @@ vec4_visitor::visit(ir_expression *ir) | |||
break; | |||
case ir_unop_b2i: | |||
if (ctx->Const.UniformBooleanTrue != 1) { | |||
emit(AND(result_dst, op[0], src_reg(1))); | |||
emit(AND(result_dst, op[0], src_reg(1u))); | |||
} else { | |||
emit(MOV(result_dst, op[0])); | |||
} | |||
@@ -1621,7 +1621,7 @@ vec4_visitor::visit(ir_expression *ir) | |||
case ir_unop_i2b: | |||
emit(CMP(result_dst, op[0], src_reg(0.0f), BRW_CONDITIONAL_NZ)); | |||
if (ctx->Const.UniformBooleanTrue == 1) { | |||
emit(AND(result_dst, result_src, src_reg(1))); | |||
emit(AND(result_dst, result_src, src_reg(1u))); | |||
} | |||
break; | |||
@@ -1769,7 +1769,7 @@ vec4_visitor::visit(ir_expression *ir) | |||
emit(CMP(result_dst, packed_consts, src_reg(0u), | |||
BRW_CONDITIONAL_NZ)); | |||
if (ctx->Const.UniformBooleanTrue == 1) { | |||
emit(AND(result_dst, result, src_reg(1))); | |||
emit(AND(result_dst, result, src_reg(1u))); | |||
} | |||
} else { | |||
emit(MOV(result_dst, packed_consts)); | |||
@@ -2296,7 +2296,7 @@ vec4_visitor::emit_constant_values(dst_reg *dst, ir_constant *ir) | |||
case GLSL_TYPE_BOOL: | |||
emit(MOV(*dst, | |||
src_reg(ir->value.b[i] != 0 ? ctx->Const.UniformBooleanTrue | |||
: 0))); | |||
: 0u))); | |||
break; | |||
default: | |||
unreachable("Non-float/uint/int/bool constant"); |