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i965: Require softpin support for Cannonlake and later.

This isn't strictly necessary, but anyone running Cannonlake will
already have Kernel 4.5 or later, so there's no reason to support
the relocation model on Gen10+.

This will let us avoid dealing with them for new features.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
tags/18.2-branchpoint
Kenneth Graunke 7 年之前
父節點
當前提交
3ea2d791f3
共有 1 個文件被更改,包括 10 次插入0 次删除
  1. 10
    0
      src/mesa/drivers/dri/i965/brw_bufmgr.c

+ 10
- 0
src/mesa/drivers/dri/i965/brw_bufmgr.c 查看文件

@@ -1732,6 +1732,16 @@ brw_bufmgr_init(struct gen_device_info *devinfo, int fd)
4096, _4GB);
util_vma_heap_init(&bufmgr->vma_allocator[BRW_MEMZONE_OTHER],
1 * _4GB, gtt_size - 1 * _4GB);
} else if (devinfo->gen >= 10) {
/* Softpin landed in 4.5, but GVT used an aliasing PPGTT until
* kernel commit 6b3816d69628becb7ff35978aa0751798b4a940a in
* 4.14. Gen10+ GVT hasn't landed yet, so it's not actually a
* problem - but extending this requirement back to earlier gens
* might actually mean requiring 4.14.
*/
fprintf(stderr, "i965 requires softpin (Kernel 4.5) on Gen10+.");
free(bufmgr);
return NULL;
}
}


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