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@@ -1720,6 +1720,19 @@ enum brw_message_target { |
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#define HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2 12 |
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#define HSW_DATAPORT_DC_PORT1_TYPED_SURFACE_WRITE 13 |
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/* Dataport special binding table indices: */ |
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#define BRW_BTI_STATELESS 255 |
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#define GEN7_BTI_SLM 254 |
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/* Note that on Gen8+ BTI 255 was redefined to be IA-coherent according to the |
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* hardware spec, however because the DRM sets bit 4 of HDC_CHICKEN0 on BDW, |
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* CHV and at least some pre-production steppings of SKL due to |
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* WaForceEnableNonCoherent, HDC memory access may have been overridden by the |
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* kernel to be non-coherent (matching the behavior of the same BTI on |
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* pre-Gen8 hardware) and BTI 255 may actually be an alias for BTI 253. |
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*/ |
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#define GEN8_BTI_STATELESS_IA_COHERENT 255 |
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#define GEN8_BTI_STATELESS_NON_COHERENT 253 |
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/* dataport atomic operations. */ |
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#define BRW_AOP_AND 1 |
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#define BRW_AOP_OR 2 |