Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>tags/10.3-branchpoint
@@ -235,8 +235,7 @@ retry: | |||
break; | |||
default: | |||
/* BLORP is not supported before Gen6. */ | |||
assert(false); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
/* Make sure we didn't wrap the batch unintentionally, and make sure we | |||
@@ -331,7 +330,7 @@ brw_hiz_op_params::brw_hiz_op_params(struct intel_mipmap_tree *mt, | |||
case MESA_FORMAT_Z_UNORM16: depth_format = BRW_DEPTHFORMAT_D16_UNORM; break; | |||
case MESA_FORMAT_Z_FLOAT32: depth_format = BRW_DEPTHFORMAT_D32_FLOAT; break; | |||
case MESA_FORMAT_Z24_UNORM_X8_UINT: depth_format = BRW_DEPTHFORMAT_D24_UNORM_X8_UINT; break; | |||
default: assert(0); break; | |||
default: unreachable("not reached"); | |||
} | |||
} | |||
@@ -230,7 +230,7 @@ try_blorp_blit(struct brw_context *brw, | |||
filter, mirror_x, mirror_y); | |||
break; | |||
default: | |||
assert(false); | |||
unreachable("not reached"); | |||
} | |||
return true; | |||
@@ -996,9 +996,8 @@ brw_blorp_blit_program::compute_frag_coords() | |||
break; | |||
} | |||
default: | |||
assert(!"Unrecognized sample count in " | |||
"brw_blorp_blit_program::compute_frag_coords()"); | |||
break; | |||
unreachable("Unrecognized sample count in " | |||
"brw_blorp_blit_program::compute_frag_coords()"); | |||
} | |||
s_is_zero = false; | |||
} else { | |||
@@ -1128,8 +1127,7 @@ brw_blorp_blit_program::encode_msaa(unsigned num_samples, | |||
/* We can't compensate for compressed layout since at this point in the | |||
* program we haven't read from the MCS buffer. | |||
*/ | |||
assert(!"Bad layout in encode_msaa"); | |||
break; | |||
unreachable("Bad layout in encode_msaa"); | |||
case INTEL_MSAA_LAYOUT_UMS: | |||
/* No translation necessary. */ | |||
break; | |||
@@ -1215,8 +1213,7 @@ brw_blorp_blit_program::decode_msaa(unsigned num_samples, | |||
/* We can't compensate for compressed layout since at this point in the | |||
* program we don't have access to the MCS buffer. | |||
*/ | |||
assert(!"Bad layout in encode_msaa"); | |||
break; | |||
unreachable("Bad layout in encode_msaa"); | |||
case INTEL_MSAA_LAYOUT_UMS: | |||
/* No translation necessary. */ | |||
break; | |||
@@ -1675,8 +1672,7 @@ brw_blorp_blit_program::texel_fetch(struct brw_reg dst) | |||
} | |||
break; | |||
default: | |||
assert(!"Should not get here."); | |||
break; | |||
unreachable("Should not get here."); | |||
}; | |||
} | |||
@@ -1942,8 +1938,7 @@ brw_blorp_blit_params::brw_blorp_blit_params(struct brw_context *brw, | |||
wm_prog_key.texture_data_type = BRW_REGISTER_TYPE_D; | |||
break; | |||
default: | |||
assert(!"Unrecognized blorp format"); | |||
break; | |||
unreachable("Unrecognized blorp format"); | |||
} | |||
if (brw->gen > 6) { | |||
@@ -2064,8 +2059,7 @@ brw_blorp_blit_params::brw_blorp_blit_params(struct brw_context *brw, | |||
y1 = ALIGN(y1 * 2, 4); | |||
break; | |||
default: | |||
assert(!"Unrecognized sample count in brw_blorp_blit_params ctor"); | |||
break; | |||
unreachable("Unrecognized sample count in brw_blorp_blit_params ctor"); | |||
} | |||
wm_prog_key.use_kill = true; | |||
} |
@@ -106,8 +106,7 @@ static void compile_clip_prog( struct brw_context *brw, | |||
brw_emit_point_clip( &c ); | |||
break; | |||
default: | |||
assert(0); | |||
return; | |||
unreachable("not reached"); | |||
} | |||
brw_compact_instructions(&c.func, 0, 0, NULL); |
@@ -408,8 +408,7 @@ static void emit_primitives( struct brw_clip_compile *c, | |||
break; | |||
case CLIP_CULL: | |||
assert(0); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
} | |||
@@ -242,7 +242,7 @@ brw_get_vertex_surface_type(struct brw_context *brw, | |||
case GL_UNSIGNED_INT: return uint_types_direct[size]; | |||
case GL_UNSIGNED_SHORT: return ushort_types_direct[size]; | |||
case GL_UNSIGNED_BYTE: return ubyte_types_direct[size]; | |||
default: assert(0); return 0; | |||
default: unreachable("not reached"); | |||
} | |||
} else if (glarray->Type == GL_UNSIGNED_INT_10F_11F_11F_REV) { | |||
return BRW_SURFACEFORMAT_R11G11B10_FLOAT; | |||
@@ -294,7 +294,7 @@ brw_get_vertex_surface_type(struct brw_context *brw, | |||
: BRW_SURFACEFORMAT_R10G10B10A2_UNORM; | |||
} | |||
return BRW_SURFACEFORMAT_R10G10B10A2_UINT; | |||
default: assert(0); return 0; | |||
default: unreachable("not reached"); | |||
} | |||
} | |||
else { | |||
@@ -339,7 +339,7 @@ brw_get_vertex_surface_type(struct brw_context *brw, | |||
* INT32_MAX, which will be scaled down by 1/65536 by the VS. | |||
*/ | |||
return int_types_scale[size]; | |||
default: assert(0); return 0; | |||
default: unreachable("not reached"); | |||
} | |||
} | |||
} | |||
@@ -351,7 +351,7 @@ brw_get_index_type(GLenum type) | |||
case GL_UNSIGNED_BYTE: return BRW_INDEX_BYTE; | |||
case GL_UNSIGNED_SHORT: return BRW_INDEX_WORD; | |||
case GL_UNSIGNED_INT: return BRW_INDEX_DWORD; | |||
default: assert(0); return 0; | |||
default: unreachable("not reached"); | |||
} | |||
} | |||
@@ -141,9 +141,7 @@ brw_set_default_compression_control(struct brw_compile *p, | |||
brw_inst_set_qtr_control(brw, p->current, GEN6_COMPRESSION_1H); | |||
break; | |||
default: | |||
assert(!"not reached"); | |||
brw_inst_set_qtr_control(brw, p->current, GEN6_COMPRESSION_1H); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
} else { | |||
brw_inst_set_qtr_control(brw, p->current, compression_control); |
@@ -1070,7 +1070,7 @@ brw_AVG(struct brw_compile *p, struct brw_reg dest, | |||
case BRW_REGISTER_TYPE_UD: | |||
break; | |||
default: | |||
assert(!"Bad type for brw_AVG"); | |||
unreachable("Bad type for brw_AVG"); | |||
} | |||
return brw_alu2(p, BRW_OPCODE_AVG, dest, src0, src1); |
@@ -550,8 +550,7 @@ fs_visitor::type_size(const struct glsl_type *type) | |||
case GLSL_TYPE_VOID: | |||
case GLSL_TYPE_ERROR: | |||
case GLSL_TYPE_INTERFACE: | |||
assert(!"not reached"); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
return 0; | |||
@@ -873,8 +872,7 @@ fs_visitor::implied_mrf_writes(fs_inst *inst) | |||
case SHADER_OPCODE_UNTYPED_SURFACE_READ: | |||
return 0; | |||
default: | |||
assert(!"not reached"); | |||
return inst->mlen; | |||
unreachable("not reached"); | |||
} | |||
} | |||
@@ -1391,8 +1389,7 @@ fs_visitor::emit_math(enum opcode opcode, fs_reg dst, fs_reg src) | |||
case SHADER_OPCODE_COS: | |||
break; | |||
default: | |||
assert(!"not reached: bad math opcode"); | |||
return NULL; | |||
unreachable("not reached: bad math opcode"); | |||
} | |||
/* Can't do hstride == 0 args to gen6 math, so expand it out. We | |||
@@ -1431,8 +1428,7 @@ fs_visitor::emit_math(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1) | |||
case SHADER_OPCODE_POW: | |||
break; | |||
default: | |||
assert(!"not reached: unsupported binary math opcode."); | |||
return NULL; | |||
unreachable("not reached: unsupported binary math opcode."); | |||
} | |||
if (brw->gen >= 8) { |
@@ -309,8 +309,7 @@ ir_channel_expressions_visitor::visit_leave(ir_assignment *ir) | |||
case ir_binop_logic_or: | |||
ir->fprint(stderr); | |||
fprintf(stderr, "\n"); | |||
assert(!"not reached: expression operates on scalars only"); | |||
break; | |||
unreachable("not reached: expression operates on scalars only"); | |||
case ir_binop_all_equal: | |||
case ir_binop_any_nequal: { | |||
ir_expression *last = NULL; | |||
@@ -342,8 +341,7 @@ ir_channel_expressions_visitor::visit_leave(ir_assignment *ir) | |||
break; | |||
} | |||
case ir_unop_noise: | |||
assert(!"noise should have been broken down to function call"); | |||
break; | |||
unreachable("noise should have been broken down to function call"); | |||
case ir_binop_bfm: { | |||
/* Does not need to be scalarized, since its result will be identical | |||
@@ -360,8 +358,7 @@ ir_channel_expressions_visitor::visit_leave(ir_assignment *ir) | |||
} | |||
case ir_binop_ubo_load: | |||
assert(!"not yet supported"); | |||
break; | |||
unreachable("not yet supported"); | |||
case ir_triop_fma: | |||
case ir_triop_lrp: | |||
@@ -412,14 +409,12 @@ ir_channel_expressions_visitor::visit_leave(ir_assignment *ir) | |||
case ir_triop_vector_insert: | |||
case ir_quadop_bitfield_insert: | |||
case ir_quadop_vector: | |||
assert(!"should have been lowered"); | |||
break; | |||
unreachable("should have been lowered"); | |||
case ir_unop_unpack_half_2x16_split_x: | |||
case ir_unop_unpack_half_2x16_split_y: | |||
case ir_binop_pack_half_2x16_split: | |||
assert(!"not reached: expression operates on scalars only"); | |||
break; | |||
unreachable("not reached: expression operates on scalars only"); | |||
} | |||
ir->remove(); |
@@ -190,7 +190,7 @@ fs_visitor::emit_fragment_program_code() | |||
case OPCODE_DP3: count = 3; break; | |||
case OPCODE_DP4: count = 4; break; | |||
case OPCODE_DPH: count = 3; break; | |||
default: assert(!"not reached"); count = 0; break; | |||
default: unreachable("not reached"); | |||
} | |||
emit(MUL(acc, offset(src[0], 0), offset(src[1], 0))); | |||
@@ -428,8 +428,7 @@ fs_visitor::emit_fragment_program_code() | |||
lod = offset(src[0], 3); | |||
break; | |||
default: | |||
assert(!"not reached"); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
ir->type = glsl_type::vec4_type; | |||
@@ -475,9 +474,7 @@ fs_visitor::emit_fragment_program_code() | |||
} | |||
default: | |||
assert(!"not reached"); | |||
coordinate_type = glsl_type::vec2_type; | |||
break; | |||
unreachable("not reached"); | |||
} | |||
ir_constant_data junk_data; |
@@ -464,8 +464,7 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src | |||
} | |||
break; | |||
default: | |||
assert(!"not reached"); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
} else { | |||
switch (inst->opcode) { | |||
@@ -517,8 +516,7 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src | |||
simd_mode = BRW_SAMPLER_SIMD_MODE_SIMD16; | |||
break; | |||
default: | |||
assert(!"not reached"); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
} | |||
assert(msg_type != -1); | |||
@@ -1008,8 +1006,7 @@ static uint32_t brw_file_from_reg(fs_reg *reg) | |||
case IMM: | |||
return BRW_IMMEDIATE_VALUE; | |||
default: | |||
assert(!"not reached"); | |||
return BRW_GENERAL_REGISTER_FILE; | |||
unreachable("not reached"); | |||
} | |||
} | |||
@@ -1043,9 +1040,7 @@ brw_reg_from_fs_reg(fs_reg *reg) | |||
brw_reg = brw_imm_ud(reg->imm.u); | |||
break; | |||
default: | |||
assert(!"not reached"); | |||
brw_reg = brw_null_reg(); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
break; | |||
case HW_REG: | |||
@@ -1057,13 +1052,9 @@ brw_reg_from_fs_reg(fs_reg *reg) | |||
brw_reg = brw_null_reg(); | |||
break; | |||
case UNIFORM: | |||
assert(!"not reached"); | |||
brw_reg = brw_null_reg(); | |||
break; | |||
unreachable("not reached"); | |||
default: | |||
assert(!"not reached"); | |||
brw_reg = brw_null_reg(); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
if (reg->abs) | |||
brw_reg = brw_abs(brw_reg); | |||
@@ -1749,8 +1740,7 @@ fs_generator::generate_code(exec_list *instructions) | |||
abort(); | |||
case SHADER_OPCODE_LOAD_PAYLOAD: | |||
assert(!"Should be lowered by lower_load_payload()"); | |||
break; | |||
unreachable("Should be lowered by lower_load_payload()"); | |||
} | |||
if (inst->no_dd_clear || inst->no_dd_check || inst->conditional_mod) { |
@@ -312,7 +312,7 @@ ir_vector_splitting_visitor::visit_leave(ir_assignment *ir) | |||
break; | |||
default: | |||
ir->fprint(stderr); | |||
assert(!"not reached: non-channelwise dereference of LHS."); | |||
unreachable("not reached: non-channelwise dereference of LHS."); | |||
} | |||
ir->lhs = new(mem_ctx) ir_dereference_variable(lhs->components[elem]); |
@@ -442,8 +442,7 @@ fs_visitor::visit(ir_expression *ir) | |||
break; | |||
case ir_unop_exp: | |||
case ir_unop_log: | |||
assert(!"not reached: should be handled by ir_explog_to_explog2"); | |||
break; | |||
unreachable("not reached: should be handled by ir_explog_to_explog2"); | |||
case ir_unop_sin: | |||
case ir_unop_sin_reduced: | |||
emit_math(SHADER_OPCODE_SIN, this->result, op[0]); | |||
@@ -464,8 +463,7 @@ fs_visitor::visit(ir_expression *ir) | |||
emit(ADD(this->result, op[0], op[1])); | |||
break; | |||
case ir_binop_sub: | |||
assert(!"not reached: should be handled by ir_sub_to_add_neg"); | |||
break; | |||
unreachable("not reached: should be handled by ir_sub_to_add_neg"); | |||
case ir_binop_mul: | |||
if (brw->gen < 8 && ir->type->is_integer()) { | |||
@@ -568,28 +566,22 @@ fs_visitor::visit(ir_expression *ir) | |||
case ir_binop_dot: | |||
case ir_unop_any: | |||
assert(!"not reached: should be handled by brw_fs_channel_expressions"); | |||
break; | |||
unreachable("not reached: should be handled by brw_fs_channel_expressions"); | |||
case ir_unop_noise: | |||
assert(!"not reached: should be handled by lower_noise"); | |||
break; | |||
unreachable("not reached: should be handled by lower_noise"); | |||
case ir_quadop_vector: | |||
assert(!"not reached: should be handled by lower_quadop_vector"); | |||
break; | |||
unreachable("not reached: should be handled by lower_quadop_vector"); | |||
case ir_binop_vector_extract: | |||
assert(!"not reached: should be handled by lower_vec_index_to_cond_assign()"); | |||
break; | |||
unreachable("not reached: should be handled by lower_vec_index_to_cond_assign()"); | |||
case ir_triop_vector_insert: | |||
assert(!"not reached: should be handled by lower_vector_insert()"); | |||
break; | |||
unreachable("not reached: should be handled by lower_vector_insert()"); | |||
case ir_binop_ldexp: | |||
assert(!"not reached: should be handled by ldexp_to_arith()"); | |||
break; | |||
unreachable("not reached: should be handled by ldexp_to_arith()"); | |||
case ir_unop_sqrt: | |||
emit_math(SHADER_OPCODE_SQRT, this->result, op[0]); | |||
@@ -673,8 +665,7 @@ fs_visitor::visit(ir_expression *ir) | |||
case ir_unop_unpack_unorm_4x8: | |||
case ir_unop_unpack_half_2x16: | |||
case ir_unop_pack_half_2x16: | |||
assert(!"not reached: should be handled by lower_packing_builtins"); | |||
break; | |||
unreachable("not reached: should be handled by lower_packing_builtins"); | |||
case ir_unop_unpack_half_2x16_split_x: | |||
emit(FS_OPCODE_UNPACK_HALF_2x16_SPLIT_X, this->result, op[0]); | |||
break; | |||
@@ -724,9 +715,8 @@ fs_visitor::visit(ir_expression *ir) | |||
emit(BFI2(this->result, op[0], op[1], op[2])); | |||
break; | |||
case ir_quadop_bitfield_insert: | |||
assert(!"not reached: should be handled by " | |||
unreachable("not reached: should be handled by " | |||
"lower_instructions::bitfield_insert_to_bfm_bfi"); | |||
break; | |||
case ir_unop_bit_not: | |||
emit(NOT(this->result, op[0])); | |||
@@ -871,8 +861,7 @@ fs_visitor::emit_assignment_writes(fs_reg &l, fs_reg &r, | |||
case GLSL_TYPE_VOID: | |||
case GLSL_TYPE_ERROR: | |||
case GLSL_TYPE_INTERFACE: | |||
assert(!"not reached"); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
} | |||
@@ -994,7 +983,7 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate, | |||
emit(MOV(fs_reg(MRF, base_mrf + mlen), lod)); | |||
mlen++; | |||
} else { | |||
assert(!"Should not get here."); | |||
unreachable("Should not get here."); | |||
} | |||
emit(MOV(fs_reg(MRF, base_mrf + mlen), shadow_c)); | |||
@@ -1708,7 +1697,7 @@ fs_visitor::visit(ir_texture *ir) | |||
mcs = fs_reg(0u); | |||
break; | |||
default: | |||
assert(!"Unrecognized texture opcode"); | |||
unreachable("Unrecognized texture opcode"); | |||
}; | |||
/* Writemasking doesn't eliminate channels on SIMD8 texture | |||
@@ -1819,8 +1808,7 @@ fs_visitor::gather_channel(ir_texture *ir, int sampler) | |||
case SWIZZLE_Z: return 2; | |||
case SWIZZLE_W: return 3; | |||
default: | |||
assert(!"Not reached"); /* zero, one swizzles handled already */ | |||
return 0; | |||
unreachable("Not reached"); /* zero, one swizzles handled already */ | |||
} | |||
} | |||
@@ -2001,7 +1989,7 @@ fs_visitor::visit(ir_constant *ir) | |||
emit(MOV(dst_reg, fs_reg((int)ir->value.b[i]))); | |||
break; | |||
default: | |||
assert(!"Non-float/uint/int/bool constant"); | |||
unreachable("Non-float/uint/int/bool constant"); | |||
} | |||
dst_reg.reg_offset++; | |||
} | |||
@@ -2072,9 +2060,7 @@ fs_visitor::emit_bool_to_cond_code(ir_rvalue *ir) | |||
break; | |||
default: | |||
assert(!"not reached"); | |||
fail("bad cond code\n"); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
return; | |||
} | |||
@@ -2142,10 +2128,7 @@ fs_visitor::emit_if_gen6(ir_if *ir) | |||
brw_conditional_for_comparison(expr->operation))); | |||
return; | |||
default: | |||
assert(!"not reached"); | |||
emit(IF(op[0], fs_reg(0), BRW_CONDITIONAL_NZ)); | |||
fail("bad condition\n"); | |||
return; | |||
unreachable("not reached"); | |||
} | |||
} | |||
@@ -2361,14 +2344,14 @@ fs_visitor::visit(ir_call *ir) | |||
!strcmp("__intrinsic_atomic_predecrement", callee)) { | |||
visit_atomic_counter_intrinsic(ir); | |||
} else { | |||
assert(!"Unsupported intrinsic."); | |||
unreachable("Unsupported intrinsic."); | |||
} | |||
} | |||
void | |||
fs_visitor::visit(ir_return *ir) | |||
{ | |||
assert(!"FINISHME"); | |||
unreachable("FINISHME"); | |||
} | |||
void | |||
@@ -2393,22 +2376,21 @@ fs_visitor::visit(ir_function *ir) | |||
} | |||
void | |||
fs_visitor::visit(ir_function_signature *ir) | |||
fs_visitor::visit(ir_function_signature *) | |||
{ | |||
assert(!"not reached"); | |||
(void)ir; | |||
unreachable("not reached"); | |||
} | |||
void | |||
fs_visitor::visit(ir_emit_vertex *) | |||
{ | |||
assert(!"not reached"); | |||
unreachable("not reached"); | |||
} | |||
void | |||
fs_visitor::visit(ir_end_primitive *) | |||
{ | |||
assert(!"not reached"); | |||
unreachable("not reached"); | |||
} | |||
void | |||
@@ -2726,8 +2708,7 @@ cond_for_alpha_func(GLenum func) | |||
case GL_NOTEQUAL: | |||
return BRW_CONDITIONAL_NEQ; | |||
default: | |||
assert(!"Not reached"); | |||
return 0; | |||
unreachable("Not reached"); | |||
} | |||
} | |||
@@ -103,8 +103,7 @@ static void compile_ff_gs_prog(struct brw_context *brw, | |||
check_edge_flag = true; | |||
break; | |||
default: | |||
assert(!"Unexpected primitive type in Gen6 SOL program."); | |||
return; | |||
unreachable("Unexpected primitive type in Gen6 SOL program."); | |||
} | |||
gen6_sol_program(&c, key, num_verts, check_edge_flag); | |||
} else { |
@@ -77,8 +77,7 @@ txs_type(const glsl_type *type) | |||
dims = 3; | |||
break; | |||
default: | |||
assert(!"Should not get here: invalid sampler dimensionality"); | |||
dims = 2; | |||
unreachable("Should not get here: invalid sampler dimensionality"); | |||
} | |||
if (type->sampler_array) |
@@ -655,8 +655,7 @@ start_oa_counters(struct brw_context *brw) | |||
counter_format = 0b101; | |||
break; | |||
default: | |||
assert(!"Tried to enable OA counters on an unsupported generation."); | |||
return; | |||
unreachable("Tried to enable OA counters on an unsupported generation."); | |||
} | |||
BEGIN_BATCH(3); | |||
@@ -748,7 +747,7 @@ emit_mi_report_perf_count(struct brw_context *brw, | |||
OUT_BATCH(report_id); | |||
ADVANCE_BATCH(); | |||
} else { | |||
assert(!"Unsupported generation for performance counters."); | |||
unreachable("Unsupported generation for performance counters."); | |||
} | |||
/* Reports apparently don't always get written unless we flush after. */ |
@@ -62,8 +62,7 @@ can_cut_index_handle_restart_index(struct gl_context *ctx, | |||
cut_index_will_work = ctx->Array.RestartIndex == 0xffffffff; | |||
break; | |||
default: | |||
cut_index_will_work = false; | |||
assert(0); | |||
unreachable("not reached"); | |||
} | |||
return cut_index_will_work; |
@@ -127,8 +127,7 @@ static struct gl_program *brwNewProgram( struct gl_context *ctx, | |||
} | |||
default: | |||
assert(!"Unsupported target in brwNewProgram()"); | |||
return NULL; | |||
unreachable("Unsupported target in brwNewProgram()"); | |||
} | |||
} | |||
@@ -192,8 +191,7 @@ brwProgramStringNotify(struct gl_context *ctx, | |||
* this function should only ever be called with a target of | |||
* GL_VERTEX_PROGRAM_ARB or GL_FRAGMENT_PROGRAM_ARB. | |||
*/ | |||
assert(!"Unexpected target in brwProgramStringNotify"); | |||
break; | |||
unreachable("Unexpected target in brwProgramStringNotify"); | |||
} | |||
brw_add_texrect_params(prog); |
@@ -151,8 +151,7 @@ brw_queryobj_get_results(struct gl_context *ctx, | |||
break; | |||
default: | |||
assert(!"Unrecognized query target in brw_queryobj_get_results()"); | |||
break; | |||
unreachable("Unrecognized query target in brw_queryobj_get_results()"); | |||
} | |||
drm_intel_bo_unmap(query->bo); | |||
@@ -260,8 +259,7 @@ brw_begin_query(struct gl_context *ctx, struct gl_query_object *q) | |||
break; | |||
default: | |||
assert(!"Unrecognized query target in brw_begin_query()"); | |||
break; | |||
unreachable("Unrecognized query target in brw_begin_query()"); | |||
} | |||
} | |||
@@ -318,8 +316,7 @@ brw_end_query(struct gl_context *ctx, struct gl_query_object *q) | |||
break; | |||
default: | |||
assert(!"Unrecognized query target in brw_end_query()"); | |||
break; | |||
unreachable("Unrecognized query target in brw_end_query()"); | |||
} | |||
} | |||
@@ -207,8 +207,7 @@ type_is_signed(unsigned type) | |||
return false; | |||
default: | |||
assert(!"Unreachable."); | |||
return false; | |||
unreachable("not reached"); | |||
} | |||
} | |||
@@ -105,8 +105,7 @@ static void compile_sf_prog( struct brw_context *brw, | |||
brw_emit_anyprim_setup( &c ); | |||
break; | |||
default: | |||
assert(0); | |||
return; | |||
unreachable("not reached"); | |||
} | |||
brw_compact_instructions(&c.func, 0, 0, NULL); |
@@ -209,8 +209,7 @@ static void upload_sf_unit( struct brw_context *brw ) | |||
sf->sf6.cull_mode = BRW_CULLMODE_NONE; | |||
break; | |||
default: | |||
assert(0); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
/* _NEW_LINE */ |
@@ -305,8 +305,7 @@ brw_type_for_base_type(const struct glsl_type *type) | |||
case GLSL_TYPE_VOID: | |||
case GLSL_TYPE_ERROR: | |||
case GLSL_TYPE_INTERFACE: | |||
assert(!"not reached"); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
return BRW_REGISTER_TYPE_F; | |||
@@ -331,8 +330,7 @@ brw_conditional_for_comparison(unsigned int op) | |||
case ir_binop_any_nequal: /* same as nequal for scalars */ | |||
return BRW_CONDITIONAL_NZ; | |||
default: | |||
assert(!"not reached: bad operation for comparison"); | |||
return BRW_CONDITIONAL_NZ; | |||
unreachable("not reached: bad operation for comparison"); | |||
} | |||
} | |||
@@ -361,8 +359,7 @@ brw_math_function(enum opcode op) | |||
case SHADER_OPCODE_INT_REMAINDER: | |||
return BRW_MATH_FUNCTION_INT_DIV_REMAINDER; | |||
default: | |||
assert(!"not reached: unknown math function"); | |||
return 0; | |||
unreachable("not reached: unknown math function"); | |||
} | |||
} | |||
@@ -767,8 +767,7 @@ brw_depth_format(struct brw_context *brw, mesa_format format) | |||
case MESA_FORMAT_Z32_FLOAT_S8X24_UINT: | |||
return BRW_DEPTHFORMAT_D32_FLOAT_S8X24_UINT; | |||
default: | |||
assert(!"Unexpected depth format."); | |||
return BRW_DEPTHFORMAT_D32_FLOAT; | |||
unreachable("Unexpected depth format."); | |||
} | |||
} | |||
@@ -51,8 +51,7 @@ GLuint brw_translate_blend_equation( GLenum mode ) | |||
case GL_FUNC_REVERSE_SUBTRACT: | |||
return BRW_BLENDFUNCTION_REVERSE_SUBTRACT; | |||
default: | |||
assert(0); | |||
return BRW_BLENDFUNCTION_ADD; | |||
unreachable("not reached"); | |||
} | |||
} | |||
@@ -100,7 +99,6 @@ GLuint brw_translate_blend_factor( GLenum factor ) | |||
return BRW_BLENDFACTOR_INV_SRC1_ALPHA; | |||
default: | |||
assert(0); | |||
return BRW_BLENDFACTOR_ZERO; | |||
unreachable("not reached"); | |||
} | |||
} |
@@ -317,8 +317,7 @@ vec4_visitor::implied_mrf_writes(vec4_instruction *inst) | |||
case SHADER_OPCODE_UNTYPED_SURFACE_READ: | |||
return 0; | |||
default: | |||
assert(!"not reached"); | |||
return inst->mlen; | |||
unreachable("not reached"); | |||
} | |||
} | |||
@@ -670,9 +669,7 @@ vec4_visitor::opt_algebraic() | |||
inst->src[0] = src_reg(0u); | |||
break; | |||
default: | |||
assert(!"not reached"); | |||
inst->src[0] = src_reg(0.0f); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
inst->src[1] = src_reg(); | |||
progress = true; |
@@ -60,9 +60,7 @@ vec4_instruction::get_dst(void) | |||
break; | |||
default: | |||
assert(!"not reached"); | |||
brw_reg = brw_null_reg(); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
return brw_reg; | |||
} | |||
@@ -95,9 +93,7 @@ vec4_instruction::get_src(const struct brw_vec4_prog_data *prog_data, int i) | |||
brw_reg = brw_imm_ud(src[i].imm.u); | |||
break; | |||
default: | |||
assert(!"not reached"); | |||
brw_reg = brw_null_reg(); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
break; | |||
@@ -128,9 +124,7 @@ vec4_instruction::get_src(const struct brw_vec4_prog_data *prog_data, int i) | |||
break; | |||
case ATTR: | |||
default: | |||
assert(!"not reached"); | |||
brw_reg = brw_null_reg(); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
return brw_reg; | |||
@@ -285,8 +279,7 @@ vec4_generator::generate_tex(vec4_instruction *inst, | |||
} | |||
break; | |||
default: | |||
assert(!"should not get here: invalid vec4 texture opcode"); | |||
break; | |||
unreachable("should not get here: invalid vec4 texture opcode"); | |||
} | |||
} else { | |||
switch (inst->opcode) { | |||
@@ -314,8 +307,7 @@ vec4_generator::generate_tex(vec4_instruction *inst, | |||
assert(inst->mlen == 2); | |||
break; | |||
default: | |||
assert(!"should not get here: invalid vec4 texture opcode"); | |||
break; | |||
unreachable("should not get here: invalid vec4 texture opcode"); | |||
} | |||
} | |||
@@ -58,8 +58,7 @@ vec4_gs_visitor::make_reg_for_system_value(ir_variable *ir) | |||
emit(GS_OPCODE_GET_INSTANCE_ID, *reg); | |||
break; | |||
default: | |||
assert(!"not reached"); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
return reg; | |||
@@ -209,7 +208,7 @@ void | |||
vec4_gs_visitor::emit_program_code() | |||
{ | |||
/* We don't support NV_geometry_program4. */ | |||
assert(!"Unreached"); | |||
unreachable("Unreached"); | |||
} | |||
@@ -366,8 +366,7 @@ vec4_visitor::emit_math(opcode opcode, dst_reg dst, src_reg src) | |||
case SHADER_OPCODE_COS: | |||
break; | |||
default: | |||
assert(!"not reached: bad math opcode"); | |||
return; | |||
unreachable("not reached: bad math opcode"); | |||
} | |||
if (brw->gen >= 8) { | |||
@@ -420,8 +419,7 @@ vec4_visitor::emit_math(enum opcode opcode, | |||
case SHADER_OPCODE_INT_REMAINDER: | |||
break; | |||
default: | |||
assert(!"not reached: unsupported binary math opcode"); | |||
return; | |||
unreachable("not reached: unsupported binary math opcode"); | |||
} | |||
if (brw->gen >= 8) { | |||
@@ -436,8 +434,9 @@ vec4_visitor::emit_math(enum opcode opcode, | |||
void | |||
vec4_visitor::emit_pack_half_2x16(dst_reg dst, src_reg src0) | |||
{ | |||
if (brw->gen < 7) | |||
assert(!"ir_unop_pack_half_2x16 should be lowered"); | |||
if (brw->gen < 7) { | |||
unreachable("ir_unop_pack_half_2x16 should be lowered"); | |||
} | |||
assert(dst.type == BRW_REGISTER_TYPE_UD); | |||
assert(src0.type == BRW_REGISTER_TYPE_F); | |||
@@ -512,8 +511,9 @@ vec4_visitor::emit_pack_half_2x16(dst_reg dst, src_reg src0) | |||
void | |||
vec4_visitor::emit_unpack_half_2x16(dst_reg dst, src_reg src0) | |||
{ | |||
if (brw->gen < 7) | |||
assert(!"ir_unop_unpack_half_2x16 should be lowered"); | |||
if (brw->gen < 7) { | |||
unreachable("ir_unop_unpack_half_2x16 should be lowered"); | |||
} | |||
assert(dst.type == BRW_REGISTER_TYPE_F); | |||
assert(src0.type == BRW_REGISTER_TYPE_UD); | |||
@@ -597,8 +597,7 @@ type_size(const struct glsl_type *type) | |||
case GLSL_TYPE_VOID: | |||
case GLSL_TYPE_ERROR: | |||
case GLSL_TYPE_INTERFACE: | |||
assert(0); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
return 0; | |||
@@ -850,8 +849,7 @@ vec4_visitor::emit_bool_to_cond_code(ir_rvalue *ir, uint32_t *predicate) | |||
break; | |||
default: | |||
assert(!"not reached"); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
return; | |||
} | |||
@@ -944,9 +942,7 @@ vec4_visitor::emit_if_gen6(ir_if *ir) | |||
return; | |||
default: | |||
assert(!"not reached"); | |||
emit(IF(op[0], src_reg(0), BRW_CONDITIONAL_NZ)); | |||
return; | |||
unreachable("not reached"); | |||
} | |||
return; | |||
} | |||
@@ -1017,7 +1013,7 @@ vec4_visitor::visit(ir_variable *ir) | |||
break; | |||
default: | |||
assert(!"not reached"); | |||
unreachable("not reached"); | |||
} | |||
reg->type = brw_type_for_base_type(ir->type); | |||
@@ -1054,10 +1050,9 @@ vec4_visitor::visit(ir_loop_jump *ir) | |||
void | |||
vec4_visitor::visit(ir_function_signature *ir) | |||
vec4_visitor::visit(ir_function_signature *) | |||
{ | |||
assert(0); | |||
(void)ir; | |||
unreachable("not reached"); | |||
} | |||
void | |||
@@ -1354,8 +1349,7 @@ vec4_visitor::visit(ir_expression *ir) | |||
break; | |||
case ir_unop_exp: | |||
case ir_unop_log: | |||
assert(!"not reached: should be handled by ir_explog_to_explog2"); | |||
break; | |||
unreachable("not reached: should be handled by ir_explog_to_explog2"); | |||
case ir_unop_sin: | |||
case ir_unop_sin_reduced: | |||
emit_math(SHADER_OPCODE_SIN, result_dst, op[0]); | |||
@@ -1367,8 +1361,7 @@ vec4_visitor::visit(ir_expression *ir) | |||
case ir_unop_dFdx: | |||
case ir_unop_dFdy: | |||
assert(!"derivatives not valid in vertex shader"); | |||
break; | |||
unreachable("derivatives not valid in vertex shader"); | |||
case ir_unop_bitfield_reverse: | |||
emit(BFREV(result_dst, op[0])); | |||
@@ -1404,15 +1397,13 @@ vec4_visitor::visit(ir_expression *ir) | |||
break; | |||
case ir_unop_noise: | |||
assert(!"not reached: should be handled by lower_noise"); | |||
break; | |||
unreachable("not reached: should be handled by lower_noise"); | |||
case ir_binop_add: | |||
emit(ADD(result_dst, op[0], op[1])); | |||
break; | |||
case ir_binop_sub: | |||
assert(!"not reached: should be handled by ir_sub_to_add_neg"); | |||
break; | |||
unreachable("not reached: should be handled by ir_sub_to_add_neg"); | |||
case ir_binop_mul: | |||
if (brw->gen < 8 && ir->type->is_integer()) { | |||
@@ -1707,8 +1698,7 @@ vec4_visitor::visit(ir_expression *ir) | |||
} | |||
case ir_binop_vector_extract: | |||
assert(!"should have been lowered by vec_index_to_cond_assign"); | |||
break; | |||
unreachable("should have been lowered by vec_index_to_cond_assign"); | |||
case ir_triop_fma: | |||
op[0] = fix_3src_operand(op[0]); | |||
@@ -1748,17 +1738,14 @@ vec4_visitor::visit(ir_expression *ir) | |||
break; | |||
case ir_triop_vector_insert: | |||
assert(!"should have been lowered by lower_vector_insert"); | |||
break; | |||
unreachable("should have been lowered by lower_vector_insert"); | |||
case ir_quadop_bitfield_insert: | |||
assert(!"not reached: should be handled by " | |||
unreachable("not reached: should be handled by " | |||
"bitfield_insert_to_bfm_bfi\n"); | |||
break; | |||
case ir_quadop_vector: | |||
assert(!"not reached: should be handled by lower_quadop_vector"); | |||
break; | |||
unreachable("not reached: should be handled by lower_quadop_vector"); | |||
case ir_unop_pack_half_2x16: | |||
emit_pack_half_2x16(result_dst, op[0]); | |||
@@ -1774,16 +1761,13 @@ vec4_visitor::visit(ir_expression *ir) | |||
case ir_unop_unpack_snorm_4x8: | |||
case ir_unop_unpack_unorm_2x16: | |||
case ir_unop_unpack_unorm_4x8: | |||
assert(!"not reached: should be handled by lower_packing_builtins"); | |||
break; | |||
unreachable("not reached: should be handled by lower_packing_builtins"); | |||
case ir_unop_unpack_half_2x16_split_x: | |||
case ir_unop_unpack_half_2x16_split_y: | |||
case ir_binop_pack_half_2x16_split: | |||
assert(!"not reached: should not occur in vertex shader"); | |||
break; | |||
unreachable("not reached: should not occur in vertex shader"); | |||
case ir_binop_ldexp: | |||
assert(!"not reached: should be handled by ldexp_to_arith()"); | |||
break; | |||
unreachable("not reached: should be handled by ldexp_to_arith()"); | |||
} | |||
} | |||
@@ -2229,8 +2213,7 @@ vec4_visitor::emit_constant_values(dst_reg *dst, ir_constant *ir) | |||
emit(MOV(*dst, src_reg(ir->value.b[i]))); | |||
break; | |||
default: | |||
assert(!"Non-float/uint/int/bool constant"); | |||
break; | |||
unreachable("Non-float/uint/int/bool constant"); | |||
} | |||
remaining_writemask &= ~dst->writemask; | |||
@@ -2296,7 +2279,7 @@ vec4_visitor::visit(ir_call *ir) | |||
!strcmp("__intrinsic_atomic_predecrement", callee)) { | |||
visit_atomic_counter_intrinsic(ir); | |||
} else { | |||
assert(!"Unsupported intrinsic."); | |||
unreachable("Unsupported intrinsic."); | |||
} | |||
} | |||
@@ -2445,13 +2428,11 @@ vec4_visitor::visit(ir_texture *ir) | |||
inst = new(mem_ctx) vec4_instruction(this, SHADER_OPCODE_TXS); | |||
break; | |||
case ir_txb: | |||
assert(!"TXB is not valid for vertex shaders."); | |||
break; | |||
unreachable("TXB is not valid for vertex shaders."); | |||
case ir_lod: | |||
assert(!"LOD is not valid for vertex shaders."); | |||
break; | |||
unreachable("LOD is not valid for vertex shaders."); | |||
default: | |||
assert(!"Unrecognized tex op"); | |||
unreachable("Unrecognized tex op"); | |||
} | |||
if (ir->offset != NULL && ir->op != ir_txf) | |||
@@ -2644,8 +2625,7 @@ vec4_visitor::gather_channel(ir_texture *ir, int sampler) | |||
case SWIZZLE_Z: return 2; | |||
case SWIZZLE_W: return 3; | |||
default: | |||
assert(!"Not reached"); /* zero, one swizzles handled already */ | |||
return 0; | |||
unreachable("Not reached"); /* zero, one swizzles handled already */ | |||
} | |||
} | |||
@@ -2709,13 +2689,13 @@ vec4_visitor::swizzle_result(ir_texture *ir, src_reg orig_val, int sampler) | |||
void | |||
vec4_visitor::visit(ir_return *) | |||
{ | |||
assert(!"not reached"); | |||
unreachable("not reached"); | |||
} | |||
void | |||
vec4_visitor::visit(ir_discard *) | |||
{ | |||
assert(!"not reached"); | |||
unreachable("not reached"); | |||
} | |||
void | |||
@@ -2750,13 +2730,13 @@ vec4_visitor::visit(ir_if *ir) | |||
void | |||
vec4_visitor::visit(ir_emit_vertex *) | |||
{ | |||
assert(!"not reached"); | |||
unreachable("not reached"); | |||
} | |||
void | |||
vec4_visitor::visit(ir_end_primitive *) | |||
{ | |||
assert(!"not reached"); | |||
unreachable("not reached"); | |||
} | |||
void |
@@ -478,8 +478,7 @@ vec4_vs_visitor::get_vp_dst_reg(const prog_dst_register &dst) | |||
return dst_null_f(); | |||
default: | |||
assert(!"vec4_vp: bad destination register file"); | |||
return dst_reg(this, glsl_type::vec4_type); | |||
unreachable("vec4_vp: bad destination register file"); | |||
} | |||
result.writemask = dst.WriteMask; |
@@ -161,8 +161,7 @@ vec4_vs_visitor::make_reg_for_system_value(ir_variable *ir) | |||
reg->writemask = WRITEMASK_Y; | |||
break; | |||
default: | |||
assert(!"not reached"); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
return reg; |
@@ -119,7 +119,7 @@ brw_upload_vs_unit(struct brw_context *brw) | |||
vs->thread4.nr_urb_entries = brw->urb.nr_vs_entries >> 2; | |||
break; | |||
default: | |||
assert(0); | |||
unreachable("not reached"); | |||
} | |||
} else { | |||
switch (brw->urb.nr_vs_entries) { | |||
@@ -132,7 +132,7 @@ brw_upload_vs_unit(struct brw_context *brw) | |||
assert(brw->is_g4x); | |||
break; | |||
default: | |||
assert(0); | |||
unreachable("not reached"); | |||
} | |||
vs->thread4.nr_urb_entries = brw->urb.nr_vs_entries; | |||
} |
@@ -73,8 +73,7 @@ translate_tex_target(GLenum target) | |||
return BRW_SURFACE_CUBE; | |||
default: | |||
assert(0); | |||
return 0; | |||
unreachable("not reached"); | |||
} | |||
} | |||
@@ -449,9 +448,7 @@ brw_update_sol_surface(struct brw_context *brw, | |||
surface_format = BRW_SURFACEFORMAT_R32G32B32A32_FLOAT; | |||
break; | |||
default: | |||
assert(!"Invalid vector size for transform feedback output"); | |||
surface_format = BRW_SURFACEFORMAT_R32_FLOAT; | |||
break; | |||
unreachable("Invalid vector size for transform feedback output"); | |||
} | |||
surf[0] = BRW_SURFACE_BUFFER << BRW_SURFACE_TYPE_SHIFT | |
@@ -685,8 +685,7 @@ gen6_blorp_emit_wm_config(struct brw_context *brw, | |||
case GEN6_HIZ_OP_NONE: | |||
break; | |||
default: | |||
assert(0); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
dw5 |= GEN6_WM_LINE_AA_WIDTH_1_0; | |||
dw5 |= GEN6_WM_LINE_END_CAP_AA_WIDTH_0_5; |
@@ -69,8 +69,7 @@ upload_clip_state(struct brw_context *brw) | |||
dw1 |= GEN7_CLIP_CULLMODE_BOTH; | |||
break; | |||
default: | |||
assert(!"Should not get here: invalid CullFlag"); | |||
break; | |||
unreachable("Should not get here: invalid CullFlag"); | |||
} | |||
} else { | |||
dw1 |= GEN7_CLIP_CULLMODE_NONE; |
@@ -48,8 +48,7 @@ gen6_get_sample_position(struct gl_context *ctx, | |||
bits = brw_multisample_positions_8x[index >> 2] >> (8 * (index & 3)); | |||
break; | |||
default: | |||
assert(!"Not implemented"); | |||
return; | |||
unreachable("Not implemented"); | |||
} | |||
/* Convert from U0.4 back to a floating point coordinate. */ | |||
@@ -85,8 +84,7 @@ gen6_emit_3dstate_multisample(struct brw_context *brw, | |||
sample_positions_7654 = brw_multisample_positions_8x[1]; | |||
break; | |||
default: | |||
assert(!"Unrecognized num_samples in gen6_emit_3dstate_multisample"); | |||
break; | |||
unreachable("Unrecognized num_samples in gen6_emit_3dstate_multisample"); | |||
} | |||
/* 3DSTATE_MULTISAMPLE is nonpipelined. */ |
@@ -186,8 +186,7 @@ gen6_queryobj_get_results(struct gl_context *ctx, | |||
break; | |||
default: | |||
assert(!"Unrecognized query target in brw_queryobj_get_results()"); | |||
break; | |||
unreachable("Unrecognized query target in brw_queryobj_get_results()"); | |||
} | |||
drm_intel_bo_unmap(query->bo); | |||
@@ -253,8 +252,7 @@ gen6_begin_query(struct gl_context *ctx, struct gl_query_object *q) | |||
break; | |||
default: | |||
assert(!"Unrecognized query target in brw_begin_query()"); | |||
break; | |||
unreachable("Unrecognized query target in brw_begin_query()"); | |||
} | |||
} | |||
@@ -292,8 +290,7 @@ gen6_end_query(struct gl_context *ctx, struct gl_query_object *q) | |||
break; | |||
default: | |||
assert(!"Unrecognized query target in brw_end_query()"); | |||
break; | |||
unreachable("Unrecognized query target in brw_end_query()"); | |||
} | |||
} | |||
@@ -275,8 +275,7 @@ upload_sf_state(struct brw_context *brw) | |||
break; | |||
default: | |||
assert(0); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
switch (ctx->Polygon.BackMode) { | |||
@@ -293,8 +292,7 @@ upload_sf_state(struct brw_context *brw) | |||
break; | |||
default: | |||
assert(0); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
/* _NEW_SCISSOR */ | |||
@@ -314,8 +312,7 @@ upload_sf_state(struct brw_context *brw) | |||
dw3 |= GEN6_SF_CULL_BOTH; | |||
break; | |||
default: | |||
assert(0); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
} else { | |||
dw3 |= GEN6_SF_CULL_NONE; |
@@ -517,8 +517,7 @@ gen7_blorp_emit_wm_config(struct brw_context *brw, | |||
case GEN6_HIZ_OP_NONE: | |||
break; | |||
default: | |||
assert(0); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
dw1 |= GEN7_WM_LINE_AA_WIDTH_1_0; | |||
dw1 |= GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5; |
@@ -142,8 +142,7 @@ upload_sf_state(struct brw_context *brw) | |||
break; | |||
default: | |||
assert(0); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
switch (ctx->Polygon.BackMode) { | |||
@@ -160,8 +159,7 @@ upload_sf_state(struct brw_context *brw) | |||
break; | |||
default: | |||
assert(0); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
dw2 = 0; | |||
@@ -178,8 +176,7 @@ upload_sf_state(struct brw_context *brw) | |||
dw2 |= GEN6_SF_CULL_BOTH; | |||
break; | |||
default: | |||
assert(0); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
} else { | |||
dw2 |= GEN6_SF_CULL_NONE; |
@@ -415,7 +415,7 @@ brw_compute_xfb_vertices_written(struct brw_context *brw, | |||
vertices_per_prim = 3; | |||
break; | |||
default: | |||
assert(!"Invalid transform feedback primitive mode."); | |||
unreachable("Invalid transform feedback primitive mode."); | |||
} | |||
/* Get the number of primitives generated. */ |
@@ -59,8 +59,7 @@ brw_swizzle_to_scs(GLenum swizzle, bool need_green_to_blue) | |||
return HSW_SCS_ONE; | |||
} | |||
assert(!"Should not get here: invalid swizzle mode"); | |||
return HSW_SCS_ZERO; | |||
unreachable("Should not get here: invalid swizzle mode"); | |||
} | |||
uint32_t |
@@ -283,7 +283,7 @@ gen8_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt, | |||
dw1 |= GEN8_WM_HZ_DEPTH_CLEAR; | |||
break; | |||
case GEN6_HIZ_OP_NONE: | |||
assert(!"Should not get here."); | |||
unreachable("Should not get here."); | |||
} | |||
if (mt->num_samples > 0) |
@@ -231,8 +231,7 @@ gen8_fs_generator::generate_tex(fs_inst *ir, | |||
} | |||
break; | |||
default: | |||
assert(!"not reached"); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
assert(msg_type != -1); | |||
@@ -1125,8 +1124,7 @@ gen8_fs_generator::generate_code(exec_list *instructions) | |||
case FS_OPCODE_PIXEL_X: | |||
case FS_OPCODE_PIXEL_Y: | |||
assert(!"FS_OPCODE_PIXEL_X and FS_OPCODE_PIXEL_Y are only for Gen4-5."); | |||
break; | |||
unreachable("FS_OPCODE_PIXEL_X and FS_OPCODE_PIXEL_Y are only for Gen4-5."); | |||
case FS_OPCODE_CINTERP: | |||
MOV(dst, src[0]); | |||
@@ -1193,8 +1191,7 @@ gen8_fs_generator::generate_code(exec_list *instructions) | |||
break; | |||
case SHADER_OPCODE_SHADER_TIME_ADD: | |||
assert(!"XXX: Missing Gen8 scalar support for INTEL_DEBUG=shader_time"); | |||
break; | |||
unreachable("XXX: Missing Gen8 scalar support for INTEL_DEBUG=shader_time"); | |||
case SHADER_OPCODE_UNTYPED_ATOMIC: | |||
generate_untyped_atomic(ir, dst, src[0], src[1]); |
@@ -506,8 +506,7 @@ gen8_generator::find_loop_end(unsigned start) const | |||
return ip; | |||
} | |||
} | |||
assert(!"not reached"); | |||
return start; | |||
unreachable("not reached"); | |||
} | |||
/* After program generation, go back and update the UIP and JIP of |
@@ -202,8 +202,7 @@ upload_raster(struct brw_context *brw) | |||
dw1 |= GEN8_RASTER_CULL_BOTH; | |||
break; | |||
default: | |||
assert(0); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
} else { | |||
dw1 |= GEN8_RASTER_CULL_NONE; | |||
@@ -237,8 +236,7 @@ upload_raster(struct brw_context *brw) | |||
break; | |||
default: | |||
assert(0); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
switch (ctx->Polygon.BackMode) { | |||
@@ -252,8 +250,7 @@ upload_raster(struct brw_context *brw) | |||
dw1 |= GEN6_SF_BACK_POINT; | |||
break; | |||
default: | |||
assert(0); | |||
break; | |||
unreachable("not reached"); | |||
} | |||
/* _NEW_LINE */ |
@@ -62,8 +62,7 @@ vertical_alignment(struct intel_mipmap_tree *mt) | |||
case 16: | |||
return GEN8_SURFACE_VALIGN_16; | |||
default: | |||
assert(!"Unsupported vertical surface alignment."); | |||
return GEN8_SURFACE_VALIGN_4; | |||
unreachable("Unsupported vertical surface alignment."); | |||
} | |||
} | |||
@@ -78,8 +77,7 @@ horizontal_alignment(struct intel_mipmap_tree *mt) | |||
case 16: | |||
return GEN8_SURFACE_HALIGN_16; | |||
default: | |||
assert(!"Unsupported horizontal surface alignment."); | |||
return GEN8_SURFACE_HALIGN_4; | |||
unreachable("Unsupported horizontal surface alignment."); | |||
} | |||
} | |||
@@ -97,8 +97,7 @@ gen8_vec4_generator::generate_tex(vec4_instruction *ir, struct brw_reg dst) | |||
} | |||
break; | |||
default: | |||
assert(!"should not get here: invalid VS texture opcode"); | |||
break; | |||
unreachable("should not get here: invalid VS texture opcode"); | |||
} | |||
if (ir->header_present) { | |||
@@ -815,8 +814,7 @@ gen8_vec4_generator::generate_vec4_instruction(vec4_instruction *instruction, | |||
break; | |||
case SHADER_OPCODE_SHADER_TIME_ADD: | |||
assert(!"XXX: Missing Gen8 vec4 support for INTEL_DEBUG=shader_time"); | |||
break; | |||
unreachable("XXX: Missing Gen8 vec4 support for INTEL_DEBUG=shader_time"); | |||
case SHADER_OPCODE_UNTYPED_ATOMIC: | |||
generate_untyped_atomic(ir, dst, src[0], src[1]); | |||
@@ -827,8 +825,7 @@ gen8_vec4_generator::generate_vec4_instruction(vec4_instruction *instruction, | |||
break; | |||
case VS_OPCODE_UNPACK_FLAGS_SIMD4X2: | |||
assert(!"VS_OPCODE_UNPACK_FLAGS_SIMD4X2 should not be used on Gen8+."); | |||
break; | |||
unreachable("VS_OPCODE_UNPACK_FLAGS_SIMD4X2 should not be used on Gen8+."); | |||
default: | |||
if (ir->opcode < (int) ARRAY_SIZE(opcode_descs)) { |
@@ -85,8 +85,7 @@ br13_for_cpp(int cpp) | |||
return BR13_8; | |||
break; | |||
default: | |||
assert(0); | |||
return 0; | |||
unreachable("not reached"); | |||
} | |||
} | |||
@@ -136,7 +136,7 @@ intel_get_non_msrt_mcs_alignment(struct brw_context *brw, | |||
{ | |||
switch (mt->tiling) { | |||
default: | |||
assert(!"Non-MSRT MCS requires X or Y tiling"); | |||
unreachable("Non-MSRT MCS requires X or Y tiling"); | |||
/* In release builds, fall through */ | |||
case I915_TILING_Y: | |||
*width_px = 32 / mt->cpp; | |||
@@ -322,7 +322,7 @@ intel_miptree_create_layout(struct brw_context *brw, | |||
/* num_samples should already have been quantized to 0, 1, 2, 4, or | |||
* 8. | |||
*/ | |||
assert(false); | |||
unreachable("not reached"); | |||
} | |||
} else { | |||
/* Non-interleaved */ | |||
@@ -987,7 +987,7 @@ intel_miptree_get_tile_masks(const struct intel_mipmap_tree *mt, | |||
switch (tiling) { | |||
default: | |||
assert(false); | |||
unreachable("not reached"); | |||
case I915_TILING_NONE: | |||
*mask_x = *mask_y = 0; | |||
break; | |||
@@ -1031,7 +1031,7 @@ intel_miptree_get_aligned_offset(const struct intel_mipmap_tree *mt, | |||
switch (tiling) { | |||
default: | |||
assert(false); | |||
unreachable("not reached"); | |||
case I915_TILING_NONE: | |||
return y * pitch + x * cpp; | |||
case I915_TILING_X: | |||
@@ -1257,8 +1257,7 @@ intel_miptree_alloc_mcs(struct brw_context *brw, | |||
format = MESA_FORMAT_R_UINT32; | |||
break; | |||
default: | |||
assert(!"Unrecognized sample count in intel_miptree_alloc_mcs"); | |||
return false; | |||
unreachable("Unrecognized sample count in intel_miptree_alloc_mcs"); | |||
}; | |||
/* From the Ivy Bridge PRM, Vol4 Part1 p76, "MCS Base Address": |
@@ -1285,8 +1285,7 @@ set_max_gl_versions(struct intel_screen *screen) | |||
psp->max_gl_es2_version = 20; | |||
break; | |||
default: | |||
assert(!"unrecognized intel_screen::gen"); | |||
break; | |||
unreachable("unrecognized intel_screen::gen"); | |||
} | |||
} | |||
@@ -70,8 +70,7 @@ intel_translate_shadow_compare_func(GLenum func) | |||
return BRW_COMPAREFUNCTION_NEVER; | |||
} | |||
assert(!"Invalid shadow comparison function."); | |||
return BRW_COMPAREFUNCTION_NEVER; | |||
unreachable("Invalid shadow comparison function."); | |||
} | |||
int | |||
@@ -96,8 +95,7 @@ intel_translate_compare_func(GLenum func) | |||
return BRW_COMPAREFUNCTION_ALWAYS; | |||
} | |||
assert(!"Invalid comparison function."); | |||
return BRW_COMPAREFUNCTION_ALWAYS; | |||
unreachable("Invalid comparison function."); | |||
} | |||
int |
@@ -449,8 +449,7 @@ linear_to_tiled(uint32_t xt1, uint32_t xt2, | |||
span = ytile_span; | |||
tile_copy = ytile_copy_faster; | |||
} else { | |||
assert(!"unsupported tiling"); | |||
return; | |||
unreachable("unsupported tiling"); | |||
} | |||
/* Round out to tile boundaries. */ |
@@ -55,33 +55,32 @@ public: | |||
protected: | |||
virtual dst_reg *make_reg_for_system_value(ir_variable *ir) | |||
{ | |||
assert(!"Not reached"); | |||
return NULL; | |||
unreachable("Not reached"); | |||
} | |||
virtual void setup_payload() | |||
{ | |||
assert(!"Not reached"); | |||
unreachable("Not reached"); | |||
} | |||
virtual void emit_prolog() | |||
{ | |||
assert(!"Not reached"); | |||
unreachable("Not reached"); | |||
} | |||
virtual void emit_program_code() | |||
{ | |||
assert(!"Not reached"); | |||
unreachable("Not reached"); | |||
} | |||
virtual void emit_thread_end() | |||
{ | |||
assert(!"Not reached"); | |||
unreachable("Not reached"); | |||
} | |||
virtual void emit_urb_write_header(int mrf) | |||
{ | |||
assert(!"Not reached"); | |||
unreachable("Not reached"); | |||
} | |||
virtual vec4_instruction *emit_urb_write_opcode(bool complete) |
@@ -58,33 +58,32 @@ public: | |||
protected: | |||
virtual dst_reg *make_reg_for_system_value(ir_variable *ir) | |||
{ | |||
assert(!"Not reached"); | |||
return NULL; | |||
unreachable("Not reached"); | |||
} | |||
virtual void setup_payload() | |||
{ | |||
assert(!"Not reached"); | |||
unreachable("Not reached"); | |||
} | |||
virtual void emit_prolog() | |||
{ | |||
assert(!"Not reached"); | |||
unreachable("Not reached"); | |||
} | |||
virtual void emit_program_code() | |||
{ | |||
assert(!"Not reached"); | |||
unreachable("Not reached"); | |||
} | |||
virtual void emit_thread_end() | |||
{ | |||
assert(!"Not reached"); | |||
unreachable("Not reached"); | |||
} | |||
virtual void emit_urb_write_header(int mrf) | |||
{ | |||
assert(!"Not reached"); | |||
unreachable("Not reached"); | |||
} | |||
virtual vec4_instruction *emit_urb_write_opcode(bool complete) |