Conflicts: src/gallium/drivers/nouveau/nouveau_screen.c src/gallium/drivers/nvfx/nvfx_transfer.c src/gallium/winsys/drm/radeon/core/radeon_drm_buffer.cgallium-resources
| @@ -186,8 +186,7 @@ get_next_slot( struct blit_state *ctx ) | |||
| if (!ctx->vbuf) { | |||
| ctx->vbuf = pipe_buffer_create(ctx->pipe->screen, | |||
| 32, | |||
| PIPE_BUFFER_USAGE_VERTEX, | |||
| PIPE_BIND_VERTEX_BUFFER, | |||
| max_slots * sizeof ctx->vertices); | |||
| } | |||
| @@ -304,9 +303,9 @@ util_blit_pixels_writemask(struct blit_state *ctx, | |||
| filter == PIPE_TEX_MIPFILTER_LINEAR); | |||
| assert(screen->is_format_supported(screen, src->format, PIPE_TEXTURE_2D, | |||
| PIPE_TEXTURE_USAGE_SAMPLER, 0)); | |||
| PIPE_BIND_SAMPLER_VIEW, 0)); | |||
| assert(screen->is_format_supported(screen, dst->format, PIPE_TEXTURE_2D, | |||
| PIPE_TEXTURE_USAGE_RENDER_TARGET, 0)); | |||
| PIPE_BIND_RENDER_TARGET, 0)); | |||
| /* do the regions overlap? */ | |||
| overlap = util_same_surface(src, dst) && | |||
| @@ -335,7 +334,7 @@ util_blit_pixels_writemask(struct blit_state *ctx, | |||
| } | |||
| assert(screen->is_format_supported(screen, dst->format, PIPE_TEXTURE_2D, | |||
| PIPE_TEXTURE_USAGE_RENDER_TARGET, 0)); | |||
| PIPE_BIND_RENDER_TARGET, 0)); | |||
| /* Create a temporary texture when src and dest alias or when src | |||
| * is anything other than a single-level 2d texture. | |||
| @@ -389,7 +388,7 @@ util_blit_pixels_writemask(struct blit_state *ctx, | |||
| } | |||
| texSurf = screen->get_tex_surface(screen, tex, 0, 0, 0, | |||
| PIPE_BUFFER_USAGE_GPU_WRITE); | |||
| PIPE_BIND_BLIT_DESTINATION); | |||
| /* load temp texture */ | |||
| if (pipe->surface_copy) { | |||
| @@ -582,7 +581,7 @@ util_blit_pixels_tex(struct blit_state *ctx, | |||
| assert(ctx->pipe->screen->is_format_supported(ctx->pipe->screen, dst->format, | |||
| PIPE_TEXTURE_2D, | |||
| PIPE_TEXTURE_USAGE_RENDER_TARGET, | |||
| PIPE_BIND_RENDER_TARGET, | |||
| 0)); | |||
| /* save state (restored below) */ | |||
| @@ -215,8 +215,7 @@ struct blitter_context *util_blitter_create(struct pipe_context *pipe) | |||
| /* create the vertex buffer */ | |||
| ctx->vbuf = pipe_buffer_create(ctx->pipe->screen, | |||
| 32, | |||
| PIPE_BUFFER_USAGE_VERTEX, | |||
| PIPE_BIND_VERTEX_BUFFER, | |||
| sizeof(ctx->vertices)); | |||
| return &ctx->blitter; | |||
| @@ -734,8 +733,8 @@ static void util_blitter_overlap_copy(struct blitter_context *blitter, | |||
| return; | |||
| tex_surf = screen->get_tex_surface(screen, texture, 0, 0, 0, | |||
| PIPE_BUFFER_USAGE_GPU_READ | | |||
| PIPE_BUFFER_USAGE_GPU_WRITE); | |||
| PIPE_BIND_BLIT_SOURCE | | |||
| PIPE_BIND_BLIT_DESTINATION); | |||
| /* blit from the src to the temp */ | |||
| util_blitter_do_copy(blitter, tex_surf, 0, 0, | |||
| @@ -781,8 +780,8 @@ void util_blitter_copy(struct blitter_context *blitter, | |||
| is_depth = util_format_get_component_bits(src->format, UTIL_FORMAT_COLORSPACE_ZS, 0) != 0; | |||
| is_stencil = util_format_get_component_bits(src->format, UTIL_FORMAT_COLORSPACE_ZS, 1) != 0; | |||
| dst_tex_usage = is_depth || is_stencil ? PIPE_TEXTURE_USAGE_DEPTH_STENCIL : | |||
| PIPE_TEXTURE_USAGE_RENDER_TARGET; | |||
| dst_tex_usage = is_depth || is_stencil ? PIPE_BIND_DEPTH_STENCIL : | |||
| PIPE_BIND_RENDER_TARGET; | |||
| /* check if we can sample from and render to the surfaces */ | |||
| /* (assuming copying a stencil buffer is not possible) */ | |||
| @@ -790,7 +789,7 @@ void util_blitter_copy(struct blitter_context *blitter, | |||
| !screen->is_format_supported(screen, dst->format, dst->texture->target, | |||
| dst_tex_usage, 0) || | |||
| !screen->is_format_supported(screen, src->format, src->texture->target, | |||
| PIPE_TEXTURE_USAGE_SAMPLER, 0)) { | |||
| PIPE_BIND_SAMPLER_VIEW, 0)) { | |||
| util_surface_copy(pipe, FALSE, dst, dstx, dsty, src, srcx, srcy, | |||
| width, height); | |||
| return; | |||
| @@ -827,7 +826,7 @@ void util_blitter_fill(struct blitter_context *blitter, | |||
| /* check if we can render to the surface */ | |||
| if (util_format_is_depth_or_stencil(dst->format) || /* unlikely, but you never know */ | |||
| !screen->is_format_supported(screen, dst->format, dst->texture->target, | |||
| PIPE_TEXTURE_USAGE_RENDER_TARGET, 0)) { | |||
| PIPE_BIND_RENDER_TARGET, 0)) { | |||
| util_surface_fill(pipe, dst, dstx, dsty, width, height, value); | |||
| return; | |||
| } | |||
| @@ -477,7 +477,7 @@ void debug_dump_texture(struct pipe_context *pipe, | |||
| /* XXX for now, just dump image for face=0, level=0 */ | |||
| surface = screen->get_tex_surface(screen, texture, 0, 0, 0, | |||
| PIPE_TEXTURE_USAGE_SAMPLER); | |||
| PIPE_BIND_SAMPLER_VIEW); | |||
| if (surface) { | |||
| debug_dump_surface(pipe, prefix, surface); | |||
| screen->tex_surface_destroy(surface); | |||
| @@ -114,7 +114,7 @@ util_draw_texquad(struct pipe_context *pipe, | |||
| v[29] = 1.0; | |||
| vbuf = pipe_user_buffer_create(pipe->screen, v, vertexBytes, | |||
| PIPE_BUFFER_USAGE_VERTEX); | |||
| PIPE_BIND_VERTEX_BUFFER); | |||
| if (!vbuf) | |||
| goto out; | |||
| @@ -280,7 +280,9 @@ util_dump_template(struct os_stream *stream, const struct pipe_resource *templat | |||
| util_dump_member_end(stream); | |||
| util_dump_member(stream, uint, templat, last_level); | |||
| util_dump_member(stream, uint, templat, tex_usage); | |||
| util_dump_member(stream, uint, templat, _usage); | |||
| util_dump_member(stream, uint, templat, bind); | |||
| util_dump_member(stream, uint, templat, flags); | |||
| util_dump_struct_end(stream); | |||
| } | |||
| @@ -1358,8 +1358,7 @@ get_next_slot(struct gen_mipmap_state *ctx) | |||
| if (!ctx->vbuf) { | |||
| ctx->vbuf = pipe_buffer_create(ctx->pipe->screen, | |||
| 32, | |||
| PIPE_BUFFER_USAGE_VERTEX, | |||
| PIPE_BIND_VERTEX_BUFFER, | |||
| max_slots * sizeof ctx->vertices); | |||
| } | |||
| @@ -1495,7 +1494,7 @@ util_gen_mipmap(struct gen_mipmap_state *ctx, | |||
| /* check if we can render in the texture's format */ | |||
| if (!screen->is_format_supported(screen, psv->format, PIPE_TEXTURE_2D, | |||
| PIPE_TEXTURE_USAGE_RENDER_TARGET, 0)) { | |||
| PIPE_BIND_RENDER_TARGET, 0)) { | |||
| fallback_gen_mipmap(ctx, pt, face, baseLevel, lastLevel); | |||
| return; | |||
| } | |||
| @@ -1541,7 +1540,7 @@ util_gen_mipmap(struct gen_mipmap_state *ctx, | |||
| struct pipe_surface *surf = | |||
| screen->get_tex_surface(screen, pt, face, dstLevel, zslice, | |||
| PIPE_BUFFER_USAGE_GPU_WRITE); | |||
| PIPE_BIND_RENDER_TARGET); | |||
| /* | |||
| * Setup framebuffer / dest surface | |||
| @@ -128,13 +128,16 @@ pipe_sampler_view_reference(struct pipe_sampler_view **ptr, struct pipe_sampler_ | |||
| static INLINE struct pipe_resource * | |||
| pipe_buffer_create( struct pipe_screen *screen, | |||
| unsigned alignment, unsigned usage, unsigned size ) | |||
| unsigned bind, | |||
| unsigned size ) | |||
| { | |||
| struct pipe_resource buffer; | |||
| memset(&buffer, 0, sizeof buffer); | |||
| buffer.target = PIPE_BUFFER; | |||
| buffer.format = PIPE_FORMAT_R8_UNORM; /* want TYPELESS or similar */ | |||
| buffer.usage = usage; | |||
| buffer.bind = bind; | |||
| buffer._usage = PIPE_USAGE_DEFAULT; | |||
| buffer.flags = 0; | |||
| buffer.width0 = size; | |||
| buffer.height0 = 1; | |||
| buffer.depth0 = 1; | |||
| @@ -118,7 +118,7 @@ struct pipe_winsys | |||
| * pools, or obtained directly from the windowing system. | |||
| * | |||
| * This callback is invoked by the pipe_screenwhen creating a texture marked | |||
| * with the PIPE_TEXTURE_USAGE_DISPLAY_TARGET flag to get the underlying | |||
| * with the PIPE_BIND_DISPLAY_TARGET flag to get the underlying | |||
| * buffer storage. | |||
| */ | |||
| struct pipe_resource *(*surface_buffer_create)(struct pipe_winsys *ws, | |||
| @@ -50,6 +50,7 @@ | |||
| boolean | |||
| util_create_rgba_surface(struct pipe_screen *screen, | |||
| uint width, uint height, | |||
| uint bind, | |||
| struct pipe_resource **textureOut, | |||
| struct pipe_surface **surfaceOut) | |||
| { | |||
| @@ -60,7 +61,6 @@ util_create_rgba_surface(struct pipe_screen *screen, | |||
| PIPE_FORMAT_NONE | |||
| }; | |||
| const uint target = PIPE_TEXTURE_2D; | |||
| const uint usage = PIPE_TEXTURE_USAGE_RENDER_TARGET; | |||
| enum pipe_format format = PIPE_FORMAT_NONE; | |||
| struct pipe_resource templ; | |||
| uint i; | |||
| @@ -68,7 +68,7 @@ util_create_rgba_surface(struct pipe_screen *screen, | |||
| /* Choose surface format */ | |||
| for (i = 0; rgbaFormats[i]; i++) { | |||
| if (screen->is_format_supported(screen, rgbaFormats[i], | |||
| target, usage, 0)) { | |||
| target, bind, 0)) { | |||
| format = rgbaFormats[i]; | |||
| break; | |||
| } | |||
| @@ -84,14 +84,17 @@ util_create_rgba_surface(struct pipe_screen *screen, | |||
| templ.width0 = width; | |||
| templ.height0 = height; | |||
| templ.depth0 = 1; | |||
| templ.tex_usage = usage; | |||
| templ.bind = bind; | |||
| *textureOut = screen->resource_create(screen, &templ); | |||
| if (!*textureOut) | |||
| return FALSE; | |||
| /* create surface / view into texture */ | |||
| *surfaceOut = screen->get_tex_surface(screen, *textureOut, 0, 0, 0, PIPE_BUFFER_USAGE_GPU_WRITE); | |||
| *surfaceOut = screen->get_tex_surface(screen, | |||
| *textureOut, | |||
| 0, 0, 0, | |||
| bind); | |||
| if (!*surfaceOut) { | |||
| pipe_resource_reference(textureOut, NULL); | |||
| return FALSE; | |||
| @@ -52,7 +52,7 @@ util_same_surface(const struct pipe_surface *s1, const struct pipe_surface *s2) | |||
| extern boolean | |||
| util_create_rgba_surface(struct pipe_screen *screen, | |||
| uint width, uint height, | |||
| uint width, uint height, uint bind, | |||
| struct pipe_resource **textureOut, | |||
| struct pipe_surface **surfaceOut); | |||
| @@ -149,8 +149,7 @@ u_upload_alloc_buffer( struct u_upload_mgr *upload, | |||
| size = align(MAX2(upload->default_size, min_size), 4096); | |||
| upload->buffer = pipe_buffer_create( upload->pipe->screen, | |||
| upload->alignment, | |||
| upload->usage | PIPE_BUFFER_USAGE_CPU_WRITE, | |||
| upload->usage, | |||
| size ); | |||
| if (upload->buffer == NULL) | |||
| goto fail; | |||
| @@ -314,7 +314,7 @@ init_buffers(struct vl_compositor *c) | |||
| ( | |||
| c->pipe->screen, | |||
| 1, | |||
| PIPE_BUFFER_USAGE_VERTEX, | |||
| PIPE_BIND_VERTEX_BUFFER, | |||
| sizeof(struct vertex2f) * 4 | |||
| ); | |||
| @@ -338,7 +338,7 @@ init_buffers(struct vl_compositor *c) | |||
| ( | |||
| c->pipe->screen, | |||
| 1, | |||
| PIPE_BUFFER_USAGE_VERTEX, | |||
| PIPE_BIND_VERTEX_BUFFER, | |||
| sizeof(struct vertex2f) * 4 | |||
| ); | |||
| @@ -359,7 +359,7 @@ init_buffers(struct vl_compositor *c) | |||
| ( | |||
| c->pipe->screen, | |||
| 1, | |||
| PIPE_BUFFER_USAGE_CONSTANT | PIPE_BUFFER_USAGE_DISCARD, | |||
| PIPE_BIND_CONSTANT_BUFFER | PIPE_BUFFER_USAGE_DISCARD, | |||
| sizeof(struct vertex_shader_consts) | |||
| ); | |||
| @@ -371,7 +371,7 @@ init_buffers(struct vl_compositor *c) | |||
| ( | |||
| c->pipe->screen, | |||
| 1, | |||
| PIPE_BUFFER_USAGE_CONSTANT, | |||
| PIPE_BIND_CONSTANT_BUFFER, | |||
| sizeof(struct fragment_shader_consts) | |||
| ); | |||
| @@ -898,7 +898,7 @@ init_buffers(struct vl_mpeg12_mc_renderer *r) | |||
| template.height0 = r->pot_buffers ? | |||
| util_next_power_of_two(r->picture_height) : r->picture_height; | |||
| template.depth0 = 1; | |||
| template.tex_usage = PIPE_TEXTURE_USAGE_SAMPLER | PIPE_TEXTURE_USAGE_DYNAMIC; | |||
| template.tex_usage = PIPE_BIND_SAMPLER_VIEW | PIPE_TEXTURE_USAGE_DYNAMIC; | |||
| r->textures.individual.y = r->pipe->screen->texture_create(r->pipe->screen, &template); | |||
| @@ -927,7 +927,7 @@ init_buffers(struct vl_mpeg12_mc_renderer *r) | |||
| ( | |||
| r->pipe->screen, | |||
| DEFAULT_BUF_ALIGNMENT, | |||
| PIPE_BUFFER_USAGE_VERTEX | PIPE_BUFFER_USAGE_DISCARD, | |||
| PIPE_BIND_VERTEX_BUFFER | PIPE_BUFFER_USAGE_DISCARD, | |||
| sizeof(struct vertex2f) * 4 * 24 * r->macroblocks_per_batch | |||
| ); | |||
| @@ -939,7 +939,7 @@ init_buffers(struct vl_mpeg12_mc_renderer *r) | |||
| ( | |||
| r->pipe->screen, | |||
| DEFAULT_BUF_ALIGNMENT, | |||
| PIPE_BUFFER_USAGE_VERTEX | PIPE_BUFFER_USAGE_DISCARD, | |||
| PIPE_BIND_VERTEX_BUFFER | PIPE_BUFFER_USAGE_DISCARD, | |||
| sizeof(struct vertex2f) * 2 * 24 * r->macroblocks_per_batch | |||
| ); | |||
| } | |||
| @@ -948,7 +948,7 @@ init_buffers(struct vl_mpeg12_mc_renderer *r) | |||
| ( | |||
| r->pipe->screen, | |||
| DEFAULT_BUF_ALIGNMENT, | |||
| PIPE_BUFFER_USAGE_CONSTANT | PIPE_BUFFER_USAGE_DISCARD, | |||
| PIPE_BIND_CONSTANT_BUFFER | PIPE_BUFFER_USAGE_DISCARD, | |||
| sizeof(struct vertex_shader_consts) | |||
| ); | |||
| @@ -956,7 +956,7 @@ init_buffers(struct vl_mpeg12_mc_renderer *r) | |||
| ( | |||
| r->pipe->screen, | |||
| DEFAULT_BUF_ALIGNMENT, | |||
| PIPE_BUFFER_USAGE_CONSTANT, sizeof(struct fragment_shader_consts) | |||
| PIPE_BIND_CONSTANT_BUFFER, sizeof(struct fragment_shader_consts) | |||
| ); | |||
| memcpy | |||
| @@ -141,9 +141,9 @@ cell_is_format_supported( struct pipe_screen *screen, | |||
| format == PIPE_FORMAT_A8B8G8R8_SRGB) | |||
| return FALSE; | |||
| if (tex_usage & (PIPE_TEXTURE_USAGE_DISPLAY_TARGET | | |||
| PIPE_TEXTURE_USAGE_SCANOUT | | |||
| PIPE_TEXTURE_USAGE_SHARED)) { | |||
| if (tex_usage & (PIPE_BIND_DISPLAY_TARGET | | |||
| PIPE_BIND_SCANOUT | | |||
| PIPE_BIND_SHARED)) { | |||
| if (!winsys->is_displaytarget_format_supported(winsys, tex_usage, format)) | |||
| return FALSE; | |||
| } | |||
| @@ -130,9 +130,9 @@ cell_resource_create(struct pipe_screen *screen, | |||
| /* Create both a displaytarget (linear) and regular texture | |||
| * (twiddled). Convert twiddled->linear at flush_frontbuffer time. | |||
| */ | |||
| if (ct->base.tex_usage & (PIPE_TEXTURE_USAGE_DISPLAY_TARGET | | |||
| PIPE_TEXTURE_USAGE_SCANOUT | | |||
| PIPE_TEXTURE_USAGE_SHARED)) { | |||
| if (ct->base.tex_usage & (PIPE_BIND_DISPLAY_TARGET | | |||
| PIPE_BIND_SCANOUT | | |||
| PIPE_BIND_SHARED)) { | |||
| if (!cell_displaytarget_layout(screen, ct)) | |||
| goto fail; | |||
| } | |||
| @@ -45,7 +45,7 @@ struct cell_resource | |||
| unsigned long stride[CELL_MAX_TEXTURE_LEVELS]; | |||
| /** | |||
| * Display target, for textures with the PIPE_TEXTURE_USAGE_DISPLAY_TARGET | |||
| * Display target, for textures with the PIPE_BIND_DISPLAY_TARGET | |||
| * usage. | |||
| */ | |||
| struct sw_displaytarget *dt; | |||
| @@ -137,7 +137,7 @@ struct pipe_resource * | |||
| i915_user_buffer_create(struct pipe_screen *screen, | |||
| void *ptr, | |||
| unsigned bytes, | |||
| unsigned usage) | |||
| unsigned bind) | |||
| { | |||
| struct i915_buffer *buf = CALLOC_STRUCT(i915_buffer); | |||
| @@ -148,7 +148,9 @@ i915_user_buffer_create(struct pipe_screen *screen, | |||
| buf->b.vtbl = &i915_buffer_vtbl; | |||
| buf->b.b.screen = screen; | |||
| buf->b.b.format = PIPE_FORMAT_R8_UNORM; /* ?? */ | |||
| buf->b.b.usage = PIPE_BUFFER_USAGE_CPU_READ | usage; | |||
| buf->b.b._usage = PIPE_USAGE_IMMUTABLE; | |||
| buf->b.b.bind = bind; | |||
| buf->b.b.flags = 0; | |||
| buf->b.b.width0 = bytes; | |||
| buf->b.b.height0 = 1; | |||
| buf->b.b.depth0 = 1; | |||
| @@ -219,12 +219,17 @@ i915_texture_layout_2d(struct i915_texture *tex) | |||
| unsigned nblocksy = util_format_get_nblocksy(pt->format, pt->width0); | |||
| /* used for scanouts that need special layouts */ | |||
| if (pt->tex_usage & PIPE_TEXTURE_USAGE_SCANOUT) | |||
| if (pt->bind & PIPE_BIND_SCANOUT) | |||
| if (i915_scanout_layout(tex)) | |||
| return; | |||
| /* shared buffers needs to be compatible with X servers */ | |||
| if (pt->tex_usage & PIPE_TEXTURE_USAGE_SHARED) | |||
| /* shared buffers needs to be compatible with X servers | |||
| * | |||
| * XXX: need a better name than shared for this if it is to be part | |||
| * of core gallium, and probably move the flag to resource.flags, | |||
| * rather than bindings. | |||
| */ | |||
| if (pt->bind & PIPE_BIND_SHARED) | |||
| if (i915_display_target_layout(tex)) | |||
| return; | |||
| @@ -369,12 +374,12 @@ i945_texture_layout_2d(struct i915_texture *tex) | |||
| unsigned nblocksy = util_format_get_nblocksy(pt->format, pt->height0); | |||
| /* used for scanouts that need special layouts */ | |||
| if (tex->b.b.tex_usage & PIPE_TEXTURE_USAGE_SCANOUT) | |||
| if (tex->b.b.bind & PIPE_BIND_SCANOUT) | |||
| if (i915_scanout_layout(tex)) | |||
| return; | |||
| /* shared buffers needs to be compatible with X servers */ | |||
| if (tex->b.b.tex_usage & PIPE_TEXTURE_USAGE_SHARED) | |||
| if (tex->b.b.bind & PIPE_BIND_SHARED) | |||
| if (i915_display_target_layout(tex)) | |||
| return; | |||
| @@ -742,7 +747,11 @@ i915_texture_create(struct pipe_screen *screen, | |||
| tex_size = tex->stride * tex->total_nblocksy; | |||
| /* for scanouts and cursors, cursors arn't scanouts */ | |||
| if ((template->tex_usage & PIPE_TEXTURE_USAGE_SCANOUT) && template->width0 != 64) | |||
| /* XXX: use a custom flag for cursors, don't rely on magically | |||
| * guessing that this is Xorg asking for a cursor | |||
| */ | |||
| if ((template->bind & PIPE_BIND_SCANOUT) && template->width0 != 64) | |||
| buf_usage = INTEL_NEW_SCANOUT; | |||
| else | |||
| buf_usage = INTEL_NEW_TEXTURE; | |||
| @@ -186,7 +186,7 @@ i915_is_format_supported(struct pipe_screen *screen, | |||
| const enum pipe_format *list; | |||
| uint i; | |||
| if(tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) | |||
| if(tex_usage & PIPE_BIND_RENDER_TARGET) | |||
| list = surface_supported; | |||
| else | |||
| list = tex_supported; | |||
| @@ -266,14 +266,14 @@ boolean brw_draw_init( struct brw_context *brw ) | |||
| brw->vb.upload_vertex = u_upload_create( &brw->base, | |||
| 128 * 1024, | |||
| 64, | |||
| PIPE_BUFFER_USAGE_VERTEX ); | |||
| PIPE_BIND_VERTEX_BUFFER ); | |||
| if (brw->vb.upload_vertex == NULL) | |||
| return FALSE; | |||
| brw->vb.upload_index = u_upload_create( &brw->base, | |||
| 32 * 1024, | |||
| 64, | |||
| PIPE_BUFFER_USAGE_INDEX ); | |||
| PIPE_BIND_INDEX_BUFFER ); | |||
| if (brw->vb.upload_index == NULL) | |||
| return FALSE; | |||
| @@ -143,22 +143,17 @@ brw_buffer_create(struct pipe_screen *screen, | |||
| pipe_reference_init(&buf->b.b.reference, 1); | |||
| buf->b.b.screen = screen; | |||
| switch (template->usage & (PIPE_BUFFER_USAGE_VERTEX | | |||
| PIPE_BUFFER_USAGE_INDEX | | |||
| PIPE_BUFFER_USAGE_PIXEL | | |||
| PIPE_BUFFER_USAGE_CONSTANT)) | |||
| switch (template->bind & (PIPE_BIND_VERTEX_BUFFER | | |||
| PIPE_BIND_INDEX_BUFFER | | |||
| PIPE_BIND_CONSTANT_BUFFER)) | |||
| { | |||
| case PIPE_BUFFER_USAGE_VERTEX: | |||
| case PIPE_BUFFER_USAGE_INDEX: | |||
| case (PIPE_BUFFER_USAGE_VERTEX|PIPE_BUFFER_USAGE_INDEX): | |||
| case PIPE_BIND_VERTEX_BUFFER: | |||
| case PIPE_BIND_INDEX_BUFFER: | |||
| case (PIPE_BIND_VERTEX_BUFFER|PIPE_BIND_INDEX_BUFFER): | |||
| buffer_type = BRW_BUFFER_TYPE_VERTEX; | |||
| break; | |||
| case PIPE_BUFFER_USAGE_PIXEL: | |||
| buffer_type = BRW_BUFFER_TYPE_PIXEL; | |||
| break; | |||
| case PIPE_BUFFER_USAGE_CONSTANT: | |||
| case PIPE_BIND_CONSTANT_BUFFER: | |||
| buffer_type = BRW_BUFFER_TYPE_SHADER_CONSTANTS; | |||
| break; | |||
| @@ -182,7 +177,7 @@ struct pipe_resource * | |||
| brw_user_buffer_create(struct pipe_screen *screen, | |||
| void *ptr, | |||
| unsigned bytes, | |||
| unsigned usage) | |||
| unsigned bind) | |||
| { | |||
| struct brw_buffer *buf; | |||
| @@ -194,7 +189,8 @@ brw_user_buffer_create(struct pipe_screen *screen, | |||
| buf->b.vtbl = &brw_buffer_vtbl; | |||
| buf->b.b.screen = screen; | |||
| buf->b.b.format = PIPE_FORMAT_R8_UNORM; /* ?? */ | |||
| buf->b.b.usage = PIPE_BUFFER_USAGE_CPU_READ | usage; | |||
| buf->b.b._usage = PIPE_USAGE_IMMUTABLE; | |||
| buf->b.b.bind = bind; | |||
| buf->b.b.width0 = bytes; | |||
| buf->b.b.height0 = 1; | |||
| buf->b.b.depth0 = 1; | |||
| @@ -390,8 +390,8 @@ brw_texture_create( struct pipe_screen *screen, | |||
| goto fail; | |||
| if (template->tex_usage & (PIPE_TEXTURE_USAGE_SCANOUT | | |||
| PIPE_TEXTURE_USAGE_SHARED)) { | |||
| if (template->bind & (PIPE_BIND_SCANOUT | | |||
| PIPE_BIND_SHARED)) { | |||
| buffer_type = BRW_BUFFER_TYPE_SCANOUT; | |||
| } | |||
| else { | |||
| @@ -276,9 +276,9 @@ brw_is_format_supported(struct pipe_screen *screen, | |||
| const enum pipe_format *list; | |||
| uint i; | |||
| if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) | |||
| if (tex_usage & PIPE_BIND_DEPTH_STENCIL) | |||
| list = depth_supported; | |||
| else if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) | |||
| else if (tex_usage & PIPE_BIND_RENDER_TARGET) | |||
| list = render_supported; | |||
| else | |||
| list = tex_supported; | |||
| @@ -398,10 +398,14 @@ static boolean | |||
| lp_scene_map_buffers( struct lp_scene *scene ) | |||
| { | |||
| struct pipe_surface *cbuf, *zsbuf; | |||
| unsigned usage; | |||
| int i; | |||
| LP_DBG(DEBUG_RAST, "%s\n", __FUNCTION__); | |||
| /* XXX: try to improve on this: | |||
| */ | |||
| usage = PIPE_TRANSFER_READ_WRITE; | |||
| /* Map all color buffers | |||
| */ | |||
| @@ -409,9 +413,10 @@ lp_scene_map_buffers( struct lp_scene *scene ) | |||
| cbuf = scene->fb.cbufs[i]; | |||
| if (cbuf) { | |||
| scene->cbuf_map[i] = llvmpipe_resource_map(cbuf->texture, | |||
| cbuf->face, | |||
| cbuf->level, | |||
| cbuf->zslice); | |||
| usage, | |||
| cbuf->face, | |||
| cbuf->level, | |||
| cbuf->zslice); | |||
| if (!scene->cbuf_map[i]) | |||
| goto fail; | |||
| } | |||
| @@ -422,9 +427,10 @@ lp_scene_map_buffers( struct lp_scene *scene ) | |||
| zsbuf = scene->fb.zsbuf; | |||
| if (zsbuf) { | |||
| scene->zsbuf_map = llvmpipe_resource_map(zsbuf->texture, | |||
| zsbuf->face, | |||
| zsbuf->level, | |||
| zsbuf->zslice); | |||
| usage, | |||
| zsbuf->face, | |||
| zsbuf->level, | |||
| zsbuf->zslice); | |||
| if (!scene->zsbuf_map) | |||
| goto fail; | |||
| } | |||
| @@ -190,7 +190,7 @@ llvmpipe_is_format_supported( struct pipe_screen *_screen, | |||
| break; | |||
| } | |||
| if(tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) { | |||
| if(tex_usage & PIPE_BIND_RENDER_TARGET) { | |||
| if(format_desc->block.width != 1 || | |||
| format_desc->block.height != 1) | |||
| return FALSE; | |||
| @@ -203,14 +203,14 @@ llvmpipe_is_format_supported( struct pipe_screen *_screen, | |||
| return FALSE; | |||
| } | |||
| if(tex_usage & (PIPE_TEXTURE_USAGE_DISPLAY_TARGET | | |||
| PIPE_TEXTURE_USAGE_SCANOUT | | |||
| PIPE_TEXTURE_USAGE_SHARED)) { | |||
| if(tex_usage & (PIPE_BIND_DISPLAY_TARGET | | |||
| PIPE_BIND_SCANOUT | | |||
| PIPE_BIND_SHARED)) { | |||
| if(!winsys->is_displaytarget_format_supported(winsys, tex_usage, format)) | |||
| return FALSE; | |||
| } | |||
| if(tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) { | |||
| if(tex_usage & PIPE_BIND_DEPTH_STENCIL) { | |||
| if(format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS) | |||
| return FALSE; | |||
| @@ -220,7 +220,7 @@ llvmpipe_is_format_supported( struct pipe_screen *_screen, | |||
| } | |||
| /* FIXME: Temporary restrictions. See lp_bld_sample_soa.c */ | |||
| if(tex_usage & PIPE_TEXTURE_USAGE_SAMPLER) { | |||
| if(tex_usage & PIPE_BIND_SAMPLER_VIEW) { | |||
| if(format_desc->block.width != 1 || | |||
| format_desc->block.height != 1) | |||
| return FALSE; | |||
| @@ -506,7 +506,7 @@ lp_setup_set_fragment_sampler_views(struct lp_setup_context *setup, | |||
| struct llvmpipe_screen *screen = llvmpipe_screen(tex->screen); | |||
| struct sw_winsys *winsys = screen->winsys; | |||
| jit_tex->data[0] = winsys->displaytarget_map(winsys, lp_tex->dt, | |||
| PIPE_BUFFER_USAGE_CPU_READ); | |||
| PIPE_TRANSFER_READ); | |||
| jit_tex->row_stride[0] = lp_tex->stride[0]; | |||
| assert(jit_tex->data[0]); | |||
| } | |||
| @@ -128,9 +128,9 @@ llvmpipe_resource_create(struct pipe_screen *_screen, | |||
| pipe_reference_init(&lpt->base.reference, 1); | |||
| lpt->base.screen = &screen->base; | |||
| if (lpt->base.tex_usage & (PIPE_TEXTURE_USAGE_DISPLAY_TARGET | | |||
| PIPE_TEXTURE_USAGE_SCANOUT | | |||
| PIPE_TEXTURE_USAGE_SHARED)) { | |||
| if (lpt->base.tex_usage & (PIPE_BIND_DISPLAY_TARGET | | |||
| PIPE_BIND_SCANOUT | | |||
| PIPE_BIND_SHARED)) { | |||
| if (!llvmpipe_displaytarget_layout(screen, lpt)) | |||
| goto fail; | |||
| } | |||
| @@ -173,9 +173,10 @@ llvmpipe_resource_destroy(struct pipe_screen *pscreen, | |||
| */ | |||
| void * | |||
| llvmpipe_resource_map(struct pipe_resource *texture, | |||
| unsigned face, | |||
| unsigned level, | |||
| unsigned zslice) | |||
| unsigned usage, | |||
| unsigned face, | |||
| unsigned level, | |||
| unsigned zslice) | |||
| { | |||
| struct llvmpipe_resource *lpt = llvmpipe_resource(texture); | |||
| uint8_t *map; | |||
| @@ -184,7 +185,6 @@ llvmpipe_resource_map(struct pipe_resource *texture, | |||
| /* display target */ | |||
| struct llvmpipe_screen *screen = llvmpipe_screen(texture->screen); | |||
| struct sw_winsys *winsys = screen->winsys; | |||
| const unsigned usage = PIPE_BUFFER_USAGE_CPU_READ_WRITE; | |||
| assert(face == 0); | |||
| assert(level == 0); | |||
| @@ -305,7 +305,6 @@ llvmpipe_get_tex_surface(struct pipe_screen *screen, | |||
| unsigned face, unsigned level, unsigned zslice, | |||
| unsigned usage) | |||
| { | |||
| struct llvmpipe_resource *lpt = llvmpipe_resource(pt); | |||
| struct pipe_surface *ps; | |||
| assert(level <= pt->last_level); | |||
| @@ -319,26 +318,6 @@ llvmpipe_get_tex_surface(struct pipe_screen *screen, | |||
| ps->height = u_minify(pt->height0, level); | |||
| ps->usage = usage; | |||
| /* Because we are llvmpipe, anything that the state tracker | |||
| * thought was going to be done with the GPU will actually get | |||
| * done with the CPU. Let's adjust the flags to take that into | |||
| * account. | |||
| */ | |||
| if (ps->usage & PIPE_BUFFER_USAGE_GPU_WRITE) { | |||
| /* GPU_WRITE means "render" and that can involve reads (blending) */ | |||
| ps->usage |= PIPE_BUFFER_USAGE_CPU_WRITE | PIPE_BUFFER_USAGE_CPU_READ; | |||
| } | |||
| if (ps->usage & PIPE_BUFFER_USAGE_GPU_READ) | |||
| ps->usage |= PIPE_BUFFER_USAGE_CPU_READ; | |||
| if (ps->usage & (PIPE_BUFFER_USAGE_CPU_WRITE | | |||
| PIPE_BUFFER_USAGE_GPU_WRITE)) { | |||
| /* Mark the surface as dirty. */ | |||
| lpt->timestamp++; | |||
| llvmpipe_screen(screen)->timestamp++; | |||
| } | |||
| ps->face = face; | |||
| ps->level = level; | |||
| ps->zslice = zslice; | |||
| @@ -428,6 +407,7 @@ llvmpipe_transfer_map( struct pipe_context *pipe, | |||
| FALSE); /* do_not_flush */ | |||
| map = llvmpipe_resource_map(transfer->resource, | |||
| transfer->usage, | |||
| transfer->sr.face, | |||
| transfer->sr.level, | |||
| transfer->box.z); | |||
| @@ -494,7 +474,7 @@ llvmpipe_user_buffer_create(struct pipe_screen *screen, | |||
| pipe_reference_init(&buffer->base.reference, 1); | |||
| buffer->base.screen = screen; | |||
| buffer->base.format = PIPE_FORMAT_R8_UNORM; /* ?? */ | |||
| buffer->base.usage = PIPE_BUFFER_USAGE_CPU_READ | usage; | |||
| buffer->base.usage = usage; | |||
| buffer->base.width0 = bytes; | |||
| buffer->base.height0 = 1; | |||
| buffer->base.depth0 = 1; | |||
| @@ -51,7 +51,7 @@ struct llvmpipe_resource | |||
| unsigned stride[LP_MAX_TEXTURE_2D_LEVELS]; | |||
| /** | |||
| * Display target, for textures with the PIPE_TEXTURE_USAGE_DISPLAY_TARGET | |||
| * Display target, for textures with the PIPE_BIND_DISPLAY_TARGET | |||
| * usage. | |||
| */ | |||
| struct sw_displaytarget *dt; | |||
| @@ -111,9 +111,10 @@ llvmpipe_resource_stride(struct pipe_resource *texture, | |||
| void * | |||
| llvmpipe_resource_map(struct pipe_resource *texture, | |||
| unsigned face, | |||
| unsigned level, | |||
| unsigned zslice); | |||
| unsigned usage, | |||
| unsigned face, | |||
| unsigned level, | |||
| unsigned zslice); | |||
| void | |||
| llvmpipe_resource_unmap(struct pipe_resource *texture, | |||
| @@ -47,19 +47,19 @@ nouveau_screen_bo_new(struct pipe_screen *pscreen, unsigned alignment, | |||
| if (usage & NOUVEAU_BUFFER_USAGE_TRANSFER) | |||
| flags |= NOUVEAU_BO_GART; | |||
| else | |||
| if (usage & PIPE_BUFFER_USAGE_VERTEX) { | |||
| if (usage & NOUVEAU_BUFFER_USAGE_VERTEX) { | |||
| if (pscreen->get_param(pscreen, NOUVEAU_CAP_HW_VTXBUF)) | |||
| flags |= NOUVEAU_BO_GART; | |||
| } else | |||
| if (usage & PIPE_BUFFER_USAGE_INDEX) { | |||
| if (usage & NOUVEAU_BUFFER_USAGE_INDEX) { | |||
| if (pscreen->get_param(pscreen, NOUVEAU_CAP_HW_IDXBUF)) | |||
| flags |= NOUVEAU_BO_GART; | |||
| } | |||
| if (usage & PIPE_BUFFER_USAGE_PIXEL) { | |||
| if (usage & NOUVEAU_BUFFER_USAGE_PIXEL) { | |||
| if (usage & NOUVEAU_BUFFER_USAGE_TEXTURE) | |||
| flags |= NOUVEAU_BO_GART; | |||
| if (!(usage & PIPE_BUFFER_USAGE_CPU_READ_WRITE)) | |||
| if (!(usage & NOUVEAU_BUFFER_USAGE_CPU_READ_WRITE)) | |||
| flags |= NOUVEAU_BO_VRAM; | |||
| if (dev->chipset == 0x50 || dev->chipset >= 0x80) { | |||
| @@ -112,14 +112,15 @@ nouveau_screen_map_flags(unsigned usage) | |||
| return flags; | |||
| } | |||
| void * | |||
| nouveau_screen_bo_map(struct pipe_screen *pscreen, | |||
| struct nouveau_bo *bo, | |||
| unsigned usage) | |||
| struct nouveau_bo *pb, | |||
| unsigned map_flags) | |||
| { | |||
| int ret; | |||
| ret = nouveau_bo_map(bo, nouveau_screen_map_flags(usage)); | |||
| ret = nouveau_bo_map(bo, map_flags); | |||
| if (ret) { | |||
| debug_printf("map failed: %d\n", ret); | |||
| return NULL; | |||
| @@ -130,9 +131,8 @@ nouveau_screen_bo_map(struct pipe_screen *pscreen, | |||
| void * | |||
| nouveau_screen_bo_map_range(struct pipe_screen *pscreen, struct nouveau_bo *bo, | |||
| unsigned offset, unsigned length, unsigned usage) | |||
| unsigned offset, unsigned length, unsigned flags) | |||
| { | |||
| uint32_t flags = nouveau_screen_map_flags(usage); | |||
| int ret; | |||
| ret = nouveau_bo_map_range(bo, offset, length, flags); | |||
| @@ -16,14 +16,74 @@ | |||
| #define NOUVEAU_CAP_HW_VTXBUF (0xbeef0000) | |||
| #define NOUVEAU_CAP_HW_IDXBUF (0xbeef0001) | |||
| #define NOUVEAU_TEXTURE_USAGE_LINEAR (1 << 16) | |||
| /* These were poorly defined flags at the pipe interface previously. | |||
| * They have been removed, but nouveau can continue to use its own | |||
| * versions internally: | |||
| */ | |||
| #define NOUVEAU_BUFFER_USAGE_PIXEL 0x1 | |||
| #define NOUVEAU_BUFFER_USAGE_VERTEX 0x2 | |||
| #define NOUVEAU_BUFFER_USAGE_CPU_READ_WRITE 0x4 | |||
| #define NOUVEAU_BUFFER_USAGE_GPU_WRITE 0x8 | |||
| #define NOUVEAU_BUFFER_USAGE_DISCARD 0x10 | |||
| #define NOUVEAU_BUFFER_USAGE_TEXTURE 0x20 | |||
| #define NOUVEAU_BUFFER_USAGE_ZETA 0x40 | |||
| #define NOUVEAU_BUFFER_USAGE_TRANSFER 0x80 | |||
| #define NOUVEAU_BUFFER_USAGE_TEXTURE (1 << 16) | |||
| #define NOUVEAU_BUFFER_USAGE_ZETA (1 << 17) | |||
| #define NOUVEAU_BUFFER_USAGE_TRANSFER (1 << 18) | |||
| static inline uint32_t | |||
| nouveau_screen_transfer_flags(unsigned pipe) | |||
| { | |||
| uint32_t flags = 0; | |||
| if (pipe & PIPE_TRANSFER_READ) | |||
| flags |= NOUVEAU_BO_RD; | |||
| if (pipe & PIPE_TRANSFER_WRITE) | |||
| flags |= NOUVEAU_BO_WR; | |||
| if (pipe & PIPE_TRANSFER_DISCARD) | |||
| flags |= NOUVEAU_BO_INVAL; | |||
| if (pipe & PIPE_TRANSFER_DONTBLOCK) | |||
| flags |= NOUVEAU_BO_NOWAIT; | |||
| else | |||
| if (pipe & PIPE_TRANSFER_UNSYNCHRONIZED) | |||
| flags |= NOUVEAU_BO_NOSYNC; | |||
| return flags; | |||
| } | |||
| static INLINE unsigned | |||
| nouveau_screen_bind_flags( unsigned bind ) | |||
| { | |||
| unsigned buf_usage = 0; | |||
| if (bind & PIPE_BIND_VERTEX_BUFFER) | |||
| buf_usage |= NOUVEAU_BUFFER_USAGE_VERTEX; | |||
| if (bind & PIPE_BIND_INDEX_BUFFER) | |||
| buf_usage |= PIPE_BIND_INDEX_BUFFER; | |||
| if (bind & (PIPE_BIND_RENDER_TARGET | | |||
| PIPE_BIND_DEPTH_STENCIL | | |||
| PIPE_BIND_BLIT_SOURCE | | |||
| PIPE_BIND_BLIT_DESTINATION | | |||
| PIPE_BIND_SCANOUT | | |||
| PIPE_BIND_DISPLAY_TARGET | | |||
| PIPE_BIND_SAMPLER_VIEW)) | |||
| buf_usage |= NOUVEAU_BUFFER_USAGE_PIXEL; | |||
| if (bind & (PIPE_BIND_TRANSFER_WRITE | | |||
| PIPE_BIND_TRANSFER_READ)) | |||
| buf_usage |= NOUVEAU_BUFFER_USAGE_CPU_READ_WRITE; | |||
| /* Not sure where these two came from: | |||
| */ | |||
| if (0) | |||
| buf_usage |= NOUVEAU_BUFFER_USAGE_TRANSFER; | |||
| if (0) | |||
| buf_usage |= NOUVEAU_BUFFER_USAGE_ZETA; | |||
| return buf_usage; | |||
| } | |||
| /* use along with GPU_WRITE for 2D-only writes */ | |||
| #define NOUVEAU_BUFFER_USAGE_NO_RENDER (1 << 19) | |||
| extern struct pipe_screen * | |||
| nvfx_screen_create(struct pipe_winsys *ws, struct nouveau_device *); | |||
| @@ -4,6 +4,7 @@ | |||
| #include "util/u_math.h" | |||
| #include "nouveau/nouveau_screen.h" | |||
| #include "nouveau/nouveau_winsys.h" | |||
| #include "nv50_resource.h" | |||
| @@ -34,7 +35,7 @@ nv50_buffer_transfer_map( struct pipe_context *pipe, | |||
| buffer->bo, | |||
| transfer->box.x, | |||
| transfer->box.width, | |||
| transfer->usage ); | |||
| nouveau_screen_transfer_flags(transfer->usage) ); | |||
| if (map == NULL) | |||
| return NULL; | |||
| @@ -99,7 +100,7 @@ nv50_buffer_create(struct pipe_screen *pscreen, | |||
| buffer->bo = nouveau_screen_bo_new(pscreen, | |||
| 16, | |||
| buffer->base.usage, | |||
| nouveau_screen_bind_flags(buffer->base.bind), | |||
| buffer->base.width0); | |||
| if (buffer->bo == NULL) | |||
| @@ -117,7 +118,7 @@ struct pipe_resource * | |||
| nv50_user_buffer_create(struct pipe_screen *pscreen, | |||
| void *ptr, | |||
| unsigned bytes, | |||
| unsigned usage) | |||
| unsigned bind) | |||
| { | |||
| struct nv50_resource *buffer; | |||
| @@ -129,7 +130,8 @@ nv50_user_buffer_create(struct pipe_screen *pscreen, | |||
| buffer->vtbl = &nv50_buffer_vtbl; | |||
| buffer->base.screen = pscreen; | |||
| buffer->base.format = PIPE_FORMAT_R8_UNORM; | |||
| buffer->base.usage = usage; | |||
| buffer->base._usage = PIPE_USAGE_IMMUTABLE; | |||
| buffer->base.bind = bind; | |||
| buffer->base.width0 = bytes; | |||
| buffer->base.height0 = 1; | |||
| buffer->base.depth0 = 1; | |||
| @@ -160,7 +160,7 @@ nv50_miptree_create(struct pipe_screen *pscreen, const struct pipe_resource *tmp | |||
| tile_flags = 0x7400; | |||
| break; | |||
| default: | |||
| if ((pt->tex_usage & PIPE_TEXTURE_USAGE_SCANOUT) && | |||
| if ((pt->bind & PIPE_BIND_SCANOUT) && | |||
| util_format_get_blocksizebits(pt->format) == 32) | |||
| tile_flags = 0x7a00; | |||
| else | |||
| @@ -33,7 +33,7 @@ nv50_screen_is_format_supported(struct pipe_screen *pscreen, | |||
| enum pipe_texture_target target, | |||
| unsigned tex_usage, unsigned geom_flags) | |||
| { | |||
| if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) { | |||
| if (tex_usage & PIPE_BIND_RENDER_TARGET) { | |||
| switch (format) { | |||
| case PIPE_FORMAT_B8G8R8X8_UNORM: | |||
| case PIPE_FORMAT_B8G8R8A8_UNORM: | |||
| @@ -48,7 +48,7 @@ nv50_screen_is_format_supported(struct pipe_screen *pscreen, | |||
| break; | |||
| } | |||
| } else | |||
| if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) { | |||
| if (tex_usage & PIPE_BIND_DEPTH_STENCIL) { | |||
| switch (format) { | |||
| case PIPE_FORMAT_Z32_FLOAT: | |||
| case PIPE_FORMAT_S8Z24_UNORM: | |||
| @@ -407,7 +407,7 @@ nv50_draw_elements_instanced(struct pipe_context *pipe, | |||
| instanceCount); | |||
| return; | |||
| } else | |||
| if (!(indexBuffer->usage & PIPE_BUFFER_USAGE_INDEX) || indexSize == 1) { | |||
| if (!(indexBuffer->bind & PIPE_BIND_INDEX_BUFFER) || indexSize == 1) { | |||
| nv50_draw_elements_inline(pipe, indexBuffer, indexSize, | |||
| mode, start, count, startInstance, | |||
| instanceCount); | |||
| @@ -559,7 +559,7 @@ nv50_vbo_validate(struct nv50_context *nv50) | |||
| for (i = 0; i < nv50->vtxbuf_nr; i++) { | |||
| if (nv50->vtxbuf[i].stride && | |||
| !(nv50->vtxbuf[i].buffer->usage & PIPE_BUFFER_USAGE_VERTEX)) | |||
| !(nv50->vtxbuf[i].buffer->bind & PIPE_BIND_VERTEX_BUFFER)) | |||
| nv50->vbo_fifo = 0xffff; | |||
| } | |||
| @@ -287,8 +287,8 @@ nv04_surface_copy(struct nv04_surface_2d *ctx, struct pipe_surface *dst, | |||
| { | |||
| unsigned src_pitch = ((struct nv04_surface *)src)->pitch; | |||
| unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch; | |||
| int src_linear = src->texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR; | |||
| int dst_linear = dst->texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR; | |||
| int src_linear = src->texture->flags & NVFX_RESOURCE_FLAG_LINEAR; | |||
| int dst_linear = dst->texture->flags & NVFX_RESOURCE_FLAG_LINEAR; | |||
| assert(src->format == dst->format); | |||
| @@ -501,24 +501,17 @@ nv04_surface_2d_init(struct nouveau_screen *screen) | |||
| } | |||
| struct nv04_surface* | |||
| nv04_surface_wrap_for_render(struct pipe_screen *pscreen, struct nv04_surface_2d* eng2d, struct nv04_surface* ns) | |||
| nv04_surface_wrap_for_render(struct pipe_screen *pscreen, | |||
| struct nv04_surface_2d* eng2d, struct nv04_surface* ns) | |||
| { | |||
| int temp_flags; | |||
| // printf("creating temp, flags is %i!\n", flags); | |||
| temp_flags = (ns->base.usage | | |||
| PIPE_BIND_BLIT_SOURCE | | |||
| PIPE_BIND_BLIT_DESTINATION); | |||
| if(0 /*ns->base.usage & PIPE_BUFFER_USAGE_DISCARD*/) | |||
| { | |||
| temp_flags = ns->base.usage | PIPE_BUFFER_USAGE_GPU_READ; | |||
| ns->base.usage = PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER /*| PIPE_BUFFER_USAGE_DISCARD */; | |||
| } | |||
| else | |||
| { | |||
| temp_flags = ns->base.usage | PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE; | |||
| ns->base.usage = PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER | PIPE_BUFFER_USAGE_GPU_READ; | |||
| } | |||
| ns->base.usage = PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE; | |||
| ns->base.usage = (PIPE_BIND_BLIT_SOURCE | | |||
| PIPE_BIND_BLIT_DESTINATION); | |||
| struct pipe_resource templ; | |||
| memset(&templ, 0, sizeof(templ)); | |||
| @@ -532,14 +525,16 @@ nv04_surface_wrap_for_render(struct pipe_screen *pscreen, struct nv04_surface_2d | |||
| // TODO: this is probably wrong and we should specifically handle multisampling somehow once it is implemented | |||
| templ.nr_samples = ns->base.texture->nr_samples; | |||
| templ.tex_usage = ns->base.texture->tex_usage | PIPE_TEXTURE_USAGE_RENDER_TARGET; | |||
| templ.bind = ns->base.texture->bind | PIPE_BIND_RENDER_TARGET; | |||
| struct pipe_resource* temp_tex = pscreen->resource_create(pscreen, &templ); | |||
| struct nv04_surface* temp_ns = (struct nv04_surface*)pscreen->get_tex_surface(pscreen, temp_tex, 0, 0, 0, temp_flags); | |||
| temp_ns->backing = ns; | |||
| if(ns->base.usage & PIPE_BUFFER_USAGE_GPU_READ) | |||
| eng2d->copy(eng2d, &temp_ns->backing->base, 0, 0, &ns->base, 0, 0, ns->base.width, ns->base.height); | |||
| if(ns->base.usage & PIPE_BIND_BLIT_SOURCE) | |||
| eng2d->copy(eng2d, &temp_ns->backing->base, | |||
| 0, 0, &ns->base, | |||
| 0, 0, ns->base.width, ns->base.height); | |||
| return temp_ns; | |||
| } | |||
| @@ -34,4 +34,6 @@ nv04_surface_2d_takedown(struct nv04_surface_2d **); | |||
| struct nv04_surface* | |||
| nv04_surface_wrap_for_render(struct pipe_screen *pscreen, struct nv04_surface_2d* eng2d, struct nv04_surface* ns); | |||
| #define NVFX_RESOURCE_FLAG_LINEAR (PIPE_RESOURCE_FLAG_DRV_PRIV << 0) | |||
| #endif | |||
| @@ -147,7 +147,7 @@ nv40_fragtex_build(struct nvfx_context *nvfx, int unit) | |||
| return NULL; | |||
| } | |||
| if (!(pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) { | |||
| if (!(pt->flags & NVFX_RESOURCE_FLAG_LINEAR)) { | |||
| txp = 0; | |||
| } else { | |||
| txp = nv40mt->level[0].pitch; | |||
| @@ -4,6 +4,7 @@ | |||
| #include "util/u_math.h" | |||
| #include "nouveau/nouveau_screen.h" | |||
| #include "nouveau/nouveau_winsys.h" | |||
| #include "nvfx_resource.h" | |||
| @@ -38,7 +39,7 @@ nvfx_buffer_transfer_map( struct pipe_context *pipe, | |||
| buffer->bo, | |||
| transfer->box.x, | |||
| transfer->box.width, | |||
| transfer->usage ); | |||
| nouveau_screen_transfer_flags(transfer->usage) ); | |||
| if (map == NULL) | |||
| return NULL; | |||
| @@ -85,7 +86,6 @@ struct u_resource_vtbl nvfx_buffer_vtbl = | |||
| struct pipe_resource * | |||
| nvfx_buffer_create(struct pipe_screen *pscreen, | |||
| const struct pipe_resource *template) | |||
| @@ -103,7 +103,7 @@ nvfx_buffer_create(struct pipe_screen *pscreen, | |||
| buffer->bo = nouveau_screen_bo_new(pscreen, | |||
| 16, | |||
| buffer->base.usage, | |||
| nouveau_screen_bind_flags(buffer->base.bind), | |||
| buffer->base.width0); | |||
| if (buffer->bo == NULL) | |||
| @@ -133,7 +133,8 @@ nvfx_user_buffer_create(struct pipe_screen *pscreen, | |||
| buffer->vtbl = &nvfx_buffer_vtbl; | |||
| buffer->base.screen = pscreen; | |||
| buffer->base.format = PIPE_FORMAT_R8_UNORM; | |||
| buffer->base.usage = usage; | |||
| buffer->base._usage = PIPE_USAGE_IMMUTABLE; | |||
| buffer->base.bind = usage; | |||
| buffer->base.width0 = bytes; | |||
| buffer->base.height0 = 1; | |||
| buffer->base.depth0 = 1; | |||
| @@ -245,14 +245,14 @@ nvfx_draw_elements_swtnl(struct pipe_context *pipe, | |||
| for (i = 0; i < nvfx->vtxbuf_nr; i++) { | |||
| map = pipe_buffer_map(pipe, nvfx->vtxbuf[i].buffer, | |||
| PIPE_BUFFER_USAGE_CPU_READ, | |||
| PIPE_TRANSFER_READ, | |||
| &vb_transfer[i]); | |||
| draw_set_mapped_vertex_buffer(nvfx->draw, i, map); | |||
| } | |||
| if (idxbuf) { | |||
| map = pipe_buffer_map(pipe, idxbuf, | |||
| PIPE_BUFFER_USAGE_CPU_READ, | |||
| PIPE_TRANSFER_READ, | |||
| &ib_transfer); | |||
| draw_set_mapped_element_buffer(nvfx->draw, idxbuf_size, map); | |||
| } else { | |||
| @@ -264,7 +264,7 @@ nvfx_draw_elements_swtnl(struct pipe_context *pipe, | |||
| map = pipe_buffer_map(pipe, | |||
| nvfx->constbuf[PIPE_SHADER_VERTEX], | |||
| PIPE_BUFFER_USAGE_CPU_READ, | |||
| PIPE_TRANSFER_READ, | |||
| &cb_transfer); | |||
| draw_set_mapped_constant_buffer(nvfx->draw, PIPE_SHADER_VERTEX, 0, | |||
| map, nr); | |||
| @@ -850,7 +850,7 @@ nvfx_fragprog_upload(struct nvfx_context *nvfx, | |||
| int i; | |||
| map = pipe_buffer_map(pipe, fp->buffer, | |||
| PIPE_BUFFER_USAGE_CPU_WRITE, | |||
| PIPE_TRANSFER_WRITE, | |||
| &transfer); | |||
| /* Weird swapping for big-endian chips */ | |||
| @@ -885,7 +885,11 @@ nvfx_fragprog_validate(struct nvfx_context *nvfx) | |||
| return FALSE; | |||
| } | |||
| fp->buffer = pipe_buffer_create(pscreen, 0x100, 0, fp->insn_len * 4); | |||
| fp->buffer = pipe_buffer_create(pscreen, | |||
| /* XXX: no alignment, maybe use a priv bind flag | |||
| * 0x100, | |||
| */ | |||
| 0, fp->insn_len * 4); | |||
| nvfx_fragprog_upload(nvfx, fp); | |||
| so = so_new(4, 4, 1); | |||
| @@ -24,11 +24,11 @@ nvfx_miptree_layout(struct nvfx_miptree *mt) | |||
| uint width = pt->width0; | |||
| uint offset = 0; | |||
| int nr_faces, l, f; | |||
| uint wide_pitch = pt->tex_usage & (PIPE_TEXTURE_USAGE_SAMPLER | | |||
| PIPE_TEXTURE_USAGE_DEPTH_STENCIL | | |||
| PIPE_TEXTURE_USAGE_RENDER_TARGET | | |||
| PIPE_TEXTURE_USAGE_DISPLAY_TARGET | | |||
| PIPE_TEXTURE_USAGE_SCANOUT); | |||
| uint wide_pitch = pt->bind & (PIPE_BIND_SAMPLER_VIEW | | |||
| PIPE_BIND_DEPTH_STENCIL | | |||
| PIPE_BIND_RENDER_TARGET | | |||
| PIPE_BIND_DISPLAY_TARGET | | |||
| PIPE_BIND_SCANOUT); | |||
| if (pt->target == PIPE_TEXTURE_CUBE) { | |||
| nr_faces = 6; | |||
| @@ -40,7 +40,7 @@ nvfx_miptree_layout(struct nvfx_miptree *mt) | |||
| } | |||
| for (l = 0; l <= pt->last_level; l++) { | |||
| if (wide_pitch && (pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) | |||
| if (wide_pitch && (pt->flags & NVFX_RESOURCE_FLAG_LINEAR)) | |||
| mt->level[l].pitch = align(util_format_get_stride(pt->format, pt->width0), 64); | |||
| else | |||
| mt->level[l].pitch = util_format_get_stride(pt->format, width); | |||
| @@ -55,7 +55,7 @@ nvfx_miptree_layout(struct nvfx_miptree *mt) | |||
| for (l = 0; l < pt->last_level; l++) { | |||
| mt->level[l].image_offset[f] = offset; | |||
| if (!(pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR) && | |||
| if (!(pt->flags & NVFX_RESOURCE_FLAG_LINEAR) && | |||
| u_minify(pt->width0, l + 1) > 1 && u_minify(pt->height0, l + 1) > 1) | |||
| offset += align(mt->level[l].pitch * u_minify(pt->height0, l), 64); | |||
| else | |||
| @@ -124,7 +124,7 @@ struct pipe_resource * | |||
| nvfx_miptree_create(struct pipe_screen *pscreen, const struct pipe_resource *pt) | |||
| { | |||
| struct nvfx_miptree *mt; | |||
| unsigned buf_usage = PIPE_BUFFER_USAGE_PIXEL | | |||
| unsigned buf_usage = NOUVEAU_BUFFER_USAGE_PIXEL | | |||
| NOUVEAU_BUFFER_USAGE_TEXTURE; | |||
| mt = CALLOC_STRUCT(nvfx_miptree); | |||
| @@ -139,15 +139,15 @@ nvfx_miptree_create(struct pipe_screen *pscreen, const struct pipe_resource *pt) | |||
| /* Swizzled textures must be POT */ | |||
| if (pt->width0 & (pt->width0 - 1) || | |||
| pt->height0 & (pt->height0 - 1)) | |||
| mt->base.base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; | |||
| mt->base.base.flags |= NVFX_RESOURCE_FLAG_LINEAR; | |||
| else | |||
| if (pt->tex_usage & (PIPE_TEXTURE_USAGE_SCANOUT | | |||
| PIPE_TEXTURE_USAGE_DISPLAY_TARGET | | |||
| PIPE_TEXTURE_USAGE_DEPTH_STENCIL)) | |||
| mt->base.base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; | |||
| if (pt->bind & (PIPE_BIND_SCANOUT | | |||
| PIPE_BIND_DISPLAY_TARGET | | |||
| PIPE_BIND_DEPTH_STENCIL)) | |||
| mt->base.base.flags |= NVFX_RESOURCE_FLAG_LINEAR; | |||
| else | |||
| if (pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC) | |||
| mt->base.base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; | |||
| if (pt->_usage == PIPE_USAGE_DYNAMIC) | |||
| mt->base.base.flags |= NVFX_RESOURCE_FLAG_LINEAR; | |||
| else { | |||
| switch (pt->format) { | |||
| case PIPE_FORMAT_B5G6R5_UNORM: | |||
| @@ -159,7 +159,7 @@ nvfx_miptree_create(struct pipe_screen *pscreen, const struct pipe_resource *pt) | |||
| are just preserving the pre-unification behavior. | |||
| The whole 2D code is going to be rewritten anyway. */ | |||
| if(nvfx_screen(pscreen)->is_nv4x) { | |||
| mt->base.base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; | |||
| mt->base.base.flags |= NVFX_RESOURCE_FLAG_LINEAR; | |||
| break; | |||
| } | |||
| /* TODO: Figure out which formats can be swizzled */ | |||
| @@ -168,26 +168,28 @@ nvfx_miptree_create(struct pipe_screen *pscreen, const struct pipe_resource *pt) | |||
| case PIPE_FORMAT_R16_SNORM: | |||
| { | |||
| if (debug_get_bool_option("NOUVEAU_NO_SWIZZLE", FALSE)) | |||
| mt->base.base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; | |||
| mt->base.base.flags |= NVFX_RESOURCE_FLAG_LINEAR; | |||
| break; | |||
| } | |||
| default: | |||
| mt->base.base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; | |||
| mt->base.base.flags |= NVFX_RESOURCE_FLAG_LINEAR; | |||
| } | |||
| } | |||
| if (pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC) | |||
| buf_usage |= PIPE_BUFFER_USAGE_CPU_READ_WRITE; | |||
| if (pt->_usage == PIPE_USAGE_DYNAMIC) | |||
| buf_usage |= NOUVEAU_BUFFER_USAGE_CPU_READ_WRITE; | |||
| /* apparently we can't render to swizzled surfaces smaller than 64 bytes, so make them linear. | |||
| * If the user did not ask for a render target, they can still render to it, but it will cost them an extra copy. | |||
| * This also happens for small mipmaps of large textures. */ | |||
| if (pt->tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET && util_format_get_stride(pt->format, pt->width0) < 64) | |||
| mt->base.base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; | |||
| if (pt->bind & PIPE_BIND_RENDER_TARGET && | |||
| util_format_get_stride(pt->format, pt->width0) < 64) | |||
| mt->base.base.flags |= NVFX_RESOURCE_FLAG_LINEAR; | |||
| nvfx_miptree_layout(mt); | |||
| mt->base.bo = nouveau_screen_bo_new(pscreen, 256, buf_usage, mt->total_size); | |||
| mt->base.bo = nouveau_screen_bo_new(pscreen, 256, | |||
| buf_usage, mt->total_size); | |||
| if (!mt->base.bo) { | |||
| FREE(mt); | |||
| return NULL; | |||
| @@ -229,7 +231,7 @@ nvfx_miptree_from_handle(struct pipe_screen *pscreen, | |||
| mt->level[0].image_offset = CALLOC(1, sizeof(unsigned)); | |||
| /* Assume whoever created this buffer expects it to be linear for now */ | |||
| mt->base.base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; | |||
| mt->base.base.flags |= NVFX_RESOURCE_FLAG_LINEAR; | |||
| /* XXX: Need to adjust bo refcount?? | |||
| */ | |||
| @@ -274,11 +276,22 @@ nvfx_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_resource *pt, | |||
| ns->base.offset = mt->level[level].image_offset[0]; | |||
| } | |||
| /* create a linear temporary that we can render into if necessary. | |||
| * Note that ns->pitch is always a multiple of 64 for linear surfaces and swizzled surfaces are POT, so | |||
| * ns->pitch & 63 is equivalent to (ns->pitch < 64 && swizzled)*/ | |||
| if((ns->pitch & 63) && (ns->base.usage & (PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER)) == PIPE_BUFFER_USAGE_GPU_WRITE) | |||
| return &nv04_surface_wrap_for_render(pscreen, ((struct nvfx_screen*)pscreen)->eng2d, ns)->base; | |||
| /* create a linear temporary that we can render into if | |||
| * necessary. | |||
| * | |||
| * Note that ns->pitch is always a multiple of 64 for linear | |||
| * surfaces and swizzled surfaces are POT, so ns->pitch & 63 | |||
| * is equivalent to (ns->pitch < 64 && swizzled) | |||
| */ | |||
| if ((ns->pitch & 63) && | |||
| (ns->base.usage & PIPE_BIND_RENDER_TARGET)) | |||
| { | |||
| struct nv04_surface_2d* eng2d = | |||
| ((struct nvfx_screen*)pscreen)->eng2d; | |||
| ns = nv04_surface_wrap_for_render(pscreen, eng2d, ns); | |||
| } | |||
| return &ns->base; | |||
| } | |||
| @@ -290,7 +303,7 @@ nvfx_miptree_surface_del(struct pipe_surface *ps) | |||
| if(ns->backing) | |||
| { | |||
| struct nvfx_screen* screen = (struct nvfx_screen*)ps->texture->screen; | |||
| if(ns->backing->base.usage & PIPE_BUFFER_USAGE_GPU_WRITE) | |||
| if(ns->backing->base.usage & PIPE_BIND_RENDER_TARGET) | |||
| screen->eng2d->copy(screen->eng2d, &ns->backing->base, 0, 0, ps, 0, 0, ns->base.width, ns->base.height); | |||
| nvfx_miptree_surface_del(&ns->backing->base); | |||
| } | |||
| @@ -126,7 +126,7 @@ nvfx_screen_surface_format_supported(struct pipe_screen *pscreen, | |||
| struct nvfx_screen *screen = nvfx_screen(pscreen); | |||
| struct pipe_surface *front = ((struct nouveau_winsys *) pscreen->winsys)->front; | |||
| if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) { | |||
| if (tex_usage & PIPE_BIND_RENDER_TARGET) { | |||
| switch (format) { | |||
| case PIPE_FORMAT_B8G8R8A8_UNORM: | |||
| case PIPE_FORMAT_B5G6R5_UNORM: | |||
| @@ -135,7 +135,7 @@ nvfx_screen_surface_format_supported(struct pipe_screen *pscreen, | |||
| break; | |||
| } | |||
| } else | |||
| if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) { | |||
| if (tex_usage & PIPE_BIND_DEPTH_STENCIL) { | |||
| switch (format) { | |||
| case PIPE_FORMAT_S8Z24_UNORM: | |||
| case PIPE_FORMAT_X8Z24_UNORM: | |||
| @@ -47,10 +47,10 @@ nvfx_state_framebuffer_validate(struct nvfx_context *nvfx) | |||
| if (rt_enable & (NV34TCL_RT_ENABLE_COLOR0 | NV34TCL_RT_ENABLE_COLOR1 | | |||
| NV40TCL_RT_ENABLE_COLOR2 | NV40TCL_RT_ENABLE_COLOR3)) { | |||
| /* Render to at least a colour buffer */ | |||
| if (!(rt[0]->base.texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) { | |||
| if (!(rt[0]->base.texture->flags & NVFX_RESOURCE_FLAG_LINEAR)) { | |||
| assert(!(fb->width & (fb->width - 1)) && !(fb->height & (fb->height - 1))); | |||
| for (i = 1; i < fb->nr_cbufs; i++) | |||
| assert(!(rt[i]->base.texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)); | |||
| assert(!(rt[i]->base.texture->flags & NVFX_RESOURCE_FLAG_LINEAR)); | |||
| rt_format = NV34TCL_RT_FORMAT_TYPE_SWIZZLED | | |||
| (log2i(rt[0]->base.width) << NV34TCL_RT_FORMAT_LOG2_WIDTH_SHIFT) | | |||
| @@ -62,7 +62,7 @@ nvfx_state_framebuffer_validate(struct nvfx_context *nvfx) | |||
| depth_only = 1; | |||
| /* Render to depth buffer only */ | |||
| if (!(zeta->base.texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) { | |||
| if (!(zeta->base.texture->flags & NVFX_RESOURCE_FLAG_LINEAR)) { | |||
| assert(!(fb->width & (fb->width - 1)) && !(fb->height & (fb->height - 1))); | |||
| rt_format = NV34TCL_RT_FORMAT_TYPE_SWIZZLED | | |||
| @@ -19,6 +19,7 @@ struct nvfx_transfer { | |||
| static void | |||
| nvfx_compatible_transfer_tex(struct pipe_resource *pt, unsigned width, unsigned height, | |||
| unsigned bind, | |||
| struct pipe_resource *template) | |||
| { | |||
| memset(template, 0, sizeof(struct pipe_resource)); | |||
| @@ -29,9 +30,23 @@ nvfx_compatible_transfer_tex(struct pipe_resource *pt, unsigned width, unsigned | |||
| template->depth0 = 1; | |||
| template->last_level = 0; | |||
| template->nr_samples = pt->nr_samples; | |||
| template->bind = bind; | |||
| template->_usage = PIPE_USAGE_DYNAMIC; | |||
| template->flags = NVFX_RESOURCE_FLAG_LINEAR; | |||
| } | |||
| static unsigned nvfx_transfer_bind_flags( unsigned transfer_usage ) | |||
| { | |||
| unsigned bind = 0; | |||
| template->tex_usage = PIPE_TEXTURE_USAGE_DYNAMIC | | |||
| NOUVEAU_TEXTURE_USAGE_LINEAR; | |||
| if (transfer_usage & PIPE_TRANSFER_WRITE) | |||
| bind |= PIPE_BIND_BLIT_DESTINATION; | |||
| if (transfer_usage & PIPE_TRANSFER_READ) | |||
| bind |= PIPE_BIND_BLIT_SOURCE; | |||
| return bind; | |||
| } | |||
| struct pipe_transfer * | |||
| @@ -47,6 +62,7 @@ nvfx_miptree_transfer_new(struct pipe_context *pcontext, | |||
| struct pipe_resource tx_tex_template, *tx_tex; | |||
| static boolean firsttime = TRUE; | |||
| static boolean no_transfer = FALSE; | |||
| unsigned bind = nvfx_transfer_bind_flags(usage); | |||
| if (firsttime) { | |||
| no_transfer = debug_get_bool_option("NOUVEAU_NO_TRANSFER", | |||
| @@ -69,20 +85,24 @@ nvfx_miptree_transfer_new(struct pipe_context *pcontext, | |||
| tx->base.stride = mt->level[sr.level].pitch; | |||
| /* Direct access to texture */ | |||
| if ((pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC || no_transfer) && | |||
| pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR) | |||
| if ((pt->_usage == PIPE_USAGE_DYNAMIC || | |||
| no_transfer) && | |||
| pt->flags & NVFX_RESOURCE_FLAG_LINEAR) | |||
| { | |||
| tx->direct = true; | |||
| /* XXX: just call the internal nvfx function. | |||
| */ | |||
| tx->surface = pscreen->get_tex_surface(pscreen, pt, | |||
| sr.face, sr.level, | |||
| box->z, | |||
| usage); | |||
| bind); | |||
| return &tx->base; | |||
| } | |||
| tx->direct = false; | |||
| nvfx_compatible_transfer_tex(pt, box->width, box->height, &tx_tex_template); | |||
| nvfx_compatible_transfer_tex(pt, box->width, box->height, bind, &tx_tex_template); | |||
| tx_tex = pscreen->resource_create(pscreen, &tx_tex_template); | |||
| if (!tx_tex) | |||
| @@ -95,7 +115,7 @@ nvfx_miptree_transfer_new(struct pipe_context *pcontext, | |||
| tx->surface = pscreen->get_tex_surface(pscreen, tx_tex, | |||
| 0, 0, 0, | |||
| tx->base.usage); | |||
| bind); | |||
| pipe_resource_reference(&tx_tex, NULL); | |||
| @@ -112,7 +132,7 @@ nvfx_miptree_transfer_new(struct pipe_context *pcontext, | |||
| src = pscreen->get_tex_surface(pscreen, pt, | |||
| sr.face, sr.level, box->z, | |||
| PIPE_BUFFER_USAGE_GPU_READ); | |||
| PIPE_BIND_BLIT_SOURCE); | |||
| /* TODO: Check if SIFM can deal with x,y,w,h when swizzling */ | |||
| /* TODO: Check if SIFM can un-swizzle */ | |||
| @@ -144,7 +164,7 @@ nvfx_miptree_transfer_del(struct pipe_context *pcontext, | |||
| ptx->sr.face, | |||
| ptx->sr.level, | |||
| ptx->box.z, | |||
| PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER); | |||
| PIPE_BIND_BLIT_DESTINATION); | |||
| /* TODO: Check if SIFM can deal with x,y,w,h when swizzling */ | |||
| nvscreen->eng2d->copy(nvscreen->eng2d, | |||
| @@ -167,7 +187,7 @@ nvfx_miptree_transfer_map(struct pipe_context *pcontext, struct pipe_transfer *p | |||
| struct nvfx_transfer *tx = (struct nvfx_transfer *)ptx; | |||
| struct nv04_surface *ns = (struct nv04_surface *)tx->surface; | |||
| struct nvfx_miptree *mt = (struct nvfx_miptree *)tx->surface->texture; | |||
| uint8_t *map = nouveau_screen_bo_map(pscreen, mt->base.bo, ptx->usage); | |||
| nouveau_screen_transfer_flags(ptx->usage)); | |||
| if(!tx->direct) | |||
| return map + ns->base.offset; | |||
| @@ -127,7 +127,7 @@ nvfx_vbo_static_attrib(struct nvfx_context *nvfx, struct nouveau_stateobj *so, | |||
| if (nvfx_vbo_format_to_hw(ve->src_format, &type, &ncomp)) | |||
| return FALSE; | |||
| map = pipe_buffer_map(pipe, vb->buffer, PIPE_BUFFER_USAGE_CPU_READ, &transfer); | |||
| map = pipe_buffer_map(pipe, vb->buffer, PIPE_TRANSFER_READ, &transfer); | |||
| map += vb->buffer_offset + ve->src_offset; | |||
| switch (type) { | |||
| @@ -388,7 +388,7 @@ nvfx_draw_elements_inline(struct pipe_context *pipe, | |||
| struct pipe_transfer *transfer; | |||
| void *map; | |||
| map = pipe_buffer_map(pipe, ib, PIPE_BUFFER_USAGE_CPU_READ, &transfer); | |||
| map = pipe_buffer_map(pipe, ib, PIPE_TRANSFER_READ, &transfer); | |||
| if (!ib) { | |||
| NOUVEAU_ERR("failed mapping ib\n"); | |||
| return; | |||
| @@ -964,7 +964,7 @@ check_gpu_resources: | |||
| if (constbuf) { | |||
| map = pipe_buffer_map(pipe, constbuf, | |||
| PIPE_BUFFER_USAGE_CPU_READ, | |||
| PIPE_TRANSFER_READ, | |||
| &transfer); | |||
| } | |||
| @@ -137,8 +137,8 @@ void r300_surface_copy(struct pipe_context* pipe, | |||
| if (!pipe->screen->is_format_supported(pipe->screen, | |||
| old_format, src->texture->target, | |||
| PIPE_TEXTURE_USAGE_RENDER_TARGET | | |||
| PIPE_TEXTURE_USAGE_SAMPLER, 0)) { | |||
| PIPE_BIND_RENDER_TARGET | | |||
| PIPE_BIND_SAMPLER_VIEW, 0)) { | |||
| switch (util_format_get_blocksize(old_format)) { | |||
| case 1: | |||
| new_format = PIPE_FORMAT_I8_UNORM; | |||
| @@ -177,8 +177,8 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, | |||
| r300->sprite_coord_index = -1; | |||
| /* Open up the OQ BO. */ | |||
| r300->oqbo = pipe_buffer_create(screen, 4096, | |||
| PIPE_BUFFER_USAGE_PIXEL, 4096); | |||
| r300->oqbo = pipe_buffer_create(screen, | |||
| R300_BIND_OQBO, 4096); | |||
| make_empty_list(&r300->query_list); | |||
| r300_init_flush_functions(r300); | |||
| @@ -196,14 +196,14 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, | |||
| r300->upload_ib = u_upload_create(&r300->context, | |||
| 32 * 1024, 16, | |||
| PIPE_BUFFER_USAGE_INDEX); | |||
| PIPE_BIND_INDEX_BUFFER); | |||
| if (r300->upload_ib == NULL) | |||
| goto no_upload_ib; | |||
| r300->upload_vb = u_upload_create(&r300->context, | |||
| 128 * 1024, 16, | |||
| PIPE_BUFFER_USAGE_VERTEX); | |||
| PIPE_BIND_VERTEX_BUFFER); | |||
| if (r300->upload_vb == NULL) | |||
| goto no_upload_vb; | |||
| @@ -28,7 +28,7 @@ | |||
| #define R300_MAX_TEXTURE_LEVELS 13 | |||
| #define R300_MAX_DRAW_VBO_SIZE (1024 * 1024) | |||
| #define R300_TEXTURE_USAGE_TRANSFER PIPE_TEXTURE_USAGE_CUSTOM | |||
| #define R300_RESOURCE_FLAG_TRANSFER PIPE_RESOURCE_FLAG_DRV_PRIV | |||
| /* Non-atom dirty state flags. */ | |||
| #define R300_NEW_FRAGMENT_SHADER 0x00000020 | |||
| @@ -111,7 +111,7 @@ static boolean r300_get_query_result(struct pipe_context* pipe, | |||
| struct r300_screen* r300screen = r300_screen(r300->context.screen); | |||
| struct r300_query *q = (struct r300_query*)query; | |||
| struct pipe_transfer *transfer; | |||
| unsigned flags = PIPE_BUFFER_USAGE_CPU_READ; | |||
| unsigned flags = PIPE_TRANSFER_READ; | |||
| uint32_t* map; | |||
| uint32_t temp = 0; | |||
| unsigned i, num_results; | |||
| @@ -206,7 +206,7 @@ static void r300_emit_draw_arrays_immediate(struct r300_context *r300, | |||
| vbuf = &r300->vertex_buffer[vbi]; | |||
| map[vbi] = (uint32_t*)pipe_buffer_map(&r300->context, | |||
| vbuf->buffer, | |||
| PIPE_BUFFER_USAGE_CPU_READ, | |||
| PIPE_TRANSFER_READ, | |||
| &transfer[vbi]); | |||
| map[vbi] += vbuf->buffer_offset / 4; | |||
| stride[vbi] = vbuf->stride / 4; | |||
| @@ -364,14 +364,12 @@ static void r300_shorten_ubyte_elts(struct r300_context* r300, | |||
| struct pipe_transfer *src_transfer, *dst_transfer; | |||
| unsigned i; | |||
| new_elts = pipe_buffer_create(screen, 32, | |||
| PIPE_BUFFER_USAGE_INDEX | | |||
| PIPE_BUFFER_USAGE_CPU_WRITE | | |||
| PIPE_BUFFER_USAGE_GPU_READ, | |||
| new_elts = pipe_buffer_create(screen, | |||
| PIPE_BIND_INDEX_BUFFER, | |||
| 2 * count); | |||
| in_map = pipe_buffer_map(context, *elts, PIPE_BUFFER_USAGE_CPU_READ, &src_transfer); | |||
| out_map = pipe_buffer_map(context, new_elts, PIPE_BUFFER_USAGE_CPU_WRITE, &dst_transfer); | |||
| in_map = pipe_buffer_map(context, *elts, PIPE_TRANSFER_READ, &src_transfer); | |||
| out_map = pipe_buffer_map(context, new_elts, PIPE_TRANSFER_WRITE, &dst_transfer); | |||
| in_map += start; | |||
| @@ -398,16 +396,14 @@ static void r300_align_ushort_elts(struct r300_context *r300, | |||
| unsigned short *in_map; | |||
| unsigned short *out_map; | |||
| new_elts = pipe_buffer_create(context->screen, 32, | |||
| PIPE_BUFFER_USAGE_INDEX | | |||
| PIPE_BUFFER_USAGE_CPU_WRITE | | |||
| PIPE_BUFFER_USAGE_GPU_READ, | |||
| new_elts = pipe_buffer_create(context->screen, | |||
| PIPE_BIND_INDEX_BUFFER, | |||
| 2 * count); | |||
| in_map = pipe_buffer_map(context, *elts, | |||
| PIPE_BUFFER_USAGE_CPU_READ, &in_transfer); | |||
| PIPE_TRANSFER_READ, &in_transfer); | |||
| out_map = pipe_buffer_map(context, new_elts, | |||
| PIPE_BUFFER_USAGE_CPU_WRITE, &out_transfer); | |||
| PIPE_TRANSFER_WRITE, &out_transfer); | |||
| memcpy(out_map, in_map+start, 2 * count); | |||
| @@ -574,7 +570,7 @@ void r300_swtcl_draw_arrays(struct pipe_context* pipe, | |||
| for (i = 0; i < r300->vertex_buffer_count; i++) { | |||
| void* buf = pipe_buffer_map(pipe, | |||
| r300->vertex_buffer[i].buffer, | |||
| PIPE_BUFFER_USAGE_CPU_READ, | |||
| PIPE_TRANSFER_READ, | |||
| &vb_transfer[i]); | |||
| draw_set_mapped_vertex_buffer(r300->draw, i, buf); | |||
| } | |||
| @@ -704,8 +700,7 @@ static boolean r300_render_allocate_vertices(struct vbuf_render* render, | |||
| { | |||
| pipe_resource_reference(&r300->vbo, NULL); | |||
| r300render->vbo = pipe_buffer_create(screen, | |||
| 64, | |||
| PIPE_BUFFER_USAGE_VERTEX, | |||
| PIPE_BIND_VERTEX_BUFFER, | |||
| R300_MAX_DRAW_VBO_SIZE); | |||
| r300render->vbo_offset = 0; | |||
| r300render->vbo_size = R300_MAX_DRAW_VBO_SIZE; | |||
| @@ -724,7 +719,7 @@ static void* r300_render_map_vertices(struct vbuf_render* render) | |||
| r300render->vbo_ptr = pipe_buffer_map(&r300render->r300->context, | |||
| r300render->vbo, | |||
| PIPE_BUFFER_USAGE_CPU_WRITE, | |||
| PIPE_TRANSFER_WRITE, | |||
| &r300render->vbo_transfer); | |||
| return ((uint8_t*)r300render->vbo_ptr + r300render->vbo_offset); | |||
| @@ -218,32 +218,32 @@ static boolean r300_is_format_supported(struct pipe_screen* screen, | |||
| } | |||
| /* Check sampler format support. */ | |||
| if ((usage & PIPE_TEXTURE_USAGE_SAMPLER) && | |||
| if ((usage & PIPE_BIND_SAMPLER_VIEW) && | |||
| /* Z24 cannot be sampled from on non-r5xx. */ | |||
| (is_r500 || !is_z24) && | |||
| r300_is_sampler_format_supported(format)) { | |||
| retval |= PIPE_TEXTURE_USAGE_SAMPLER; | |||
| retval |= PIPE_BIND_SAMPLER_VIEW; | |||
| } | |||
| /* Check colorbuffer format support. */ | |||
| if ((usage & (PIPE_TEXTURE_USAGE_RENDER_TARGET | | |||
| PIPE_TEXTURE_USAGE_DISPLAY_TARGET | | |||
| PIPE_TEXTURE_USAGE_SCANOUT | | |||
| PIPE_TEXTURE_USAGE_SHARED)) && | |||
| if ((usage & (PIPE_BIND_RENDER_TARGET | | |||
| PIPE_BIND_DISPLAY_TARGET | | |||
| PIPE_BIND_SCANOUT | | |||
| PIPE_BIND_SHARED)) && | |||
| /* 2101010 cannot be rendered to on non-r5xx. */ | |||
| (is_r500 || !is_color2101010) && | |||
| r300_is_colorbuffer_format_supported(format)) { | |||
| retval |= usage & | |||
| (PIPE_TEXTURE_USAGE_RENDER_TARGET | | |||
| PIPE_TEXTURE_USAGE_DISPLAY_TARGET | | |||
| PIPE_TEXTURE_USAGE_SCANOUT | | |||
| PIPE_TEXTURE_USAGE_SHARED); | |||
| (PIPE_BIND_RENDER_TARGET | | |||
| PIPE_BIND_DISPLAY_TARGET | | |||
| PIPE_BIND_SCANOUT | | |||
| PIPE_BIND_SHARED); | |||
| } | |||
| /* Check depth-stencil format support. */ | |||
| if (usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL && | |||
| if (usage & PIPE_BIND_DEPTH_STENCIL && | |||
| r300_is_zs_format_supported(format)) { | |||
| retval |= PIPE_TEXTURE_USAGE_DEPTH_STENCIL; | |||
| retval |= PIPE_BIND_DEPTH_STENCIL; | |||
| } | |||
| return retval == usage; | |||
| @@ -162,7 +162,7 @@ r300_buffer_map_range(struct pipe_screen *screen, | |||
| if (rbuf->user_buffer) | |||
| return rbuf->user_buffer; | |||
| if (rbuf->b.b.usage & PIPE_BUFFER_USAGE_CONSTANT) { | |||
| if (rbuf->b.b.bind & PIPE_BIND_CONSTANT_BUFFER) { | |||
| goto just_map; | |||
| } | |||
| @@ -182,7 +182,7 @@ r300_buffer_map_range(struct pipe_screen *screen, | |||
| rbuf->map = NULL; | |||
| rbuf->buf = r300_winsys_buffer_create(r300screen, | |||
| 16, | |||
| rbuf->b.b.usage, | |||
| rbuf->b.b.bind, /* XXX */ | |||
| rbuf->b.b.width0); | |||
| break; | |||
| } | |||
| @@ -206,7 +206,7 @@ r300_buffer_flush_mapped_range( struct pipe_screen *screen, | |||
| if (rbuf->user_buffer) | |||
| return; | |||
| if (rbuf->b.b.usage & PIPE_BUFFER_USAGE_CONSTANT) | |||
| if (rbuf->b.b.bind & PIPE_BIND_CONSTANT_BUFFER) | |||
| return; | |||
| /* mark the range as used */ | |||
| @@ -310,6 +310,7 @@ struct pipe_resource *r300_buffer_create(struct pipe_screen *screen, | |||
| { | |||
| struct r300_screen *r300screen = r300_screen(screen); | |||
| struct r300_buffer *rbuf; | |||
| unsigned alignment = 16; | |||
| rbuf = CALLOC_STRUCT(r300_buffer); | |||
| if (!rbuf) | |||
| @@ -322,9 +323,12 @@ struct pipe_resource *r300_buffer_create(struct pipe_screen *screen, | |||
| pipe_reference_init(&rbuf->b.b.reference, 1); | |||
| rbuf->b.b.screen = screen; | |||
| if (bind & R300_BIND_OQBO) | |||
| alignment = 4096; | |||
| rbuf->buf = r300_winsys_buffer_create(r300screen, | |||
| 16, | |||
| rbuf->b.b.usage, | |||
| alignment, | |||
| rbuf->b.b.bind, | |||
| rbuf->b.b.width0); | |||
| if (!rbuf->buf) | |||
| @@ -341,7 +345,7 @@ error1: | |||
| struct pipe_resource *r300_user_buffer_create(struct pipe_screen *screen, | |||
| void *ptr, | |||
| unsigned bytes, | |||
| unsigned usage) | |||
| unsigned bind) | |||
| { | |||
| struct r300_buffer *rbuf; | |||
| @@ -355,7 +359,8 @@ struct pipe_resource *r300_user_buffer_create(struct pipe_screen *screen, | |||
| rbuf->b.vtbl = &r300_buffer_vtbl; | |||
| rbuf->b.b.screen = screen; | |||
| rbuf->b.b.format = PIPE_FORMAT_R8_UNORM; | |||
| rbuf->b.b.usage = usage; | |||
| rbuf->b.b._usage = PIPE_USAGE_IMMUTABLE; | |||
| rbuf->b.b.bind = bind; | |||
| rbuf->b.b.width0 = bytes; | |||
| rbuf->b.b.height0 = 1; | |||
| rbuf->b.b.depth0 = 1; | |||
| @@ -1486,7 +1486,7 @@ static void r300_set_constant_buffer(struct pipe_context *pipe, | |||
| int max_size = 0; | |||
| if (buf == NULL || buf->width0 == 0 || | |||
| (mapped = pipe_buffer_map(pipe, buf, PIPE_BUFFER_USAGE_CPU_READ, &tr)) == NULL) | |||
| (mapped = pipe_buffer_map(pipe, buf, PIPE_TRANSFER_READ, &tr)) == NULL) | |||
| { | |||
| r300->shader_constants[shader].count = 0; | |||
| return; | |||
| @@ -844,14 +844,14 @@ struct pipe_resource* r300_texture_create(struct pipe_screen* screen, | |||
| tex->b.b.screen = screen; | |||
| r300_setup_flags(tex); | |||
| if (!(template->tex_usage & R300_TEXTURE_USAGE_TRANSFER)) { | |||
| if (!(template->flags & R300_RESOURCE_FLAG_TRANSFER)) { | |||
| r300_setup_tiling(screen, tex); | |||
| } | |||
| r300_setup_miptree(rscreen, tex); | |||
| r300_setup_texture_state(rscreen, tex); | |||
| tex->buffer = rws->buffer_create(rws, 2048, | |||
| PIPE_BUFFER_USAGE_PIXEL, | |||
| PIPE_BIND_SAMPLER_VIEW, /* XXX */ | |||
| tex->size); | |||
| rws->buffer_set_tiling(rws, tex->buffer, | |||
| tex->pitch[0], | |||
| @@ -983,8 +983,8 @@ r300_video_surface_create(struct pipe_screen *screen, | |||
| template.width0 = util_next_power_of_two(width); | |||
| template.height0 = util_next_power_of_two(height); | |||
| template.depth0 = 1; | |||
| template.tex_usage = PIPE_TEXTURE_USAGE_SAMPLER | | |||
| PIPE_TEXTURE_USAGE_RENDER_TARGET; | |||
| template.bind = (PIPE_BIND_SAMPLER_VIEW | | |||
| PIPE_BIND_RENDER_TARGET); | |||
| r300_vsfc->tex = screen->resource_create(screen, &template); | |||
| if (!r300_vsfc->tex) | |||
| @@ -68,13 +68,11 @@ static void r300_copy_from_tiled_texture(struct pipe_context *ctx, | |||
| transfer->sr.face, | |||
| transfer->sr.level, | |||
| transfer->box.z, | |||
| PIPE_BUFFER_USAGE_GPU_READ | | |||
| PIPE_BUFFER_USAGE_PIXEL); | |||
| PIPE_BIND_BLIT_SOURCE); | |||
| dst = screen->get_tex_surface(screen, &r300transfer->detiled_texture->b.b, | |||
| 0, 0, 0, | |||
| PIPE_BUFFER_USAGE_GPU_WRITE | | |||
| PIPE_BUFFER_USAGE_PIXEL); | |||
| PIPE_BIND_BLIT_DESTINATION); | |||
| ctx->surface_copy(ctx, dst, 0, 0, src, | |||
| transfer->box.x, transfer->box.y, | |||
| @@ -95,15 +93,13 @@ static void r300_copy_into_tiled_texture(struct pipe_context *ctx, | |||
| src = screen->get_tex_surface(screen, &r300transfer->detiled_texture->b.b, | |||
| 0, 0, 0, | |||
| PIPE_BUFFER_USAGE_GPU_READ | | |||
| PIPE_BUFFER_USAGE_PIXEL); | |||
| PIPE_BIND_BLIT_SOURCE); | |||
| dst = screen->get_tex_surface(screen, tex, | |||
| transfer->sr.face, | |||
| transfer->sr.level, | |||
| transfer->box.z, | |||
| PIPE_BUFFER_USAGE_GPU_WRITE | | |||
| PIPE_BUFFER_USAGE_PIXEL); | |||
| PIPE_BIND_BLIT_DESTINATION); | |||
| /* XXX this flush prevents the following DRM error from occuring: | |||
| * [drm:radeon_cs_ioctl] *ERROR* Failed to parse relocation ! | |||
| @@ -148,8 +144,8 @@ r300_texture_get_transfer(struct pipe_context *ctx, | |||
| if (tex->microtile || tex->macrotile) { | |||
| trans->render_target_usage = | |||
| util_format_is_depth_or_stencil(texture->format) ? | |||
| PIPE_TEXTURE_USAGE_DEPTH_STENCIL : | |||
| PIPE_TEXTURE_USAGE_RENDER_TARGET; | |||
| PIPE_BIND_DEPTH_STENCIL : | |||
| PIPE_BIND_RENDER_TARGET; | |||
| template.target = PIPE_TEXTURE_2D; | |||
| template.format = texture->format; | |||
| @@ -158,18 +154,18 @@ r300_texture_get_transfer(struct pipe_context *ctx, | |||
| template.depth0 = 0; | |||
| template.last_level = 0; | |||
| template.nr_samples = 0; | |||
| template.tex_usage = PIPE_TEXTURE_USAGE_DYNAMIC | | |||
| R300_TEXTURE_USAGE_TRANSFER; | |||
| template._usage = PIPE_USAGE_DYNAMIC; | |||
| template.flags = R300_RESOURCE_FLAG_TRANSFER; | |||
| /* For texture reading, the temporary (detiled) texture is used as | |||
| * a render target when blitting from a tiled texture. */ | |||
| if (usage & PIPE_TRANSFER_READ) { | |||
| template.tex_usage |= trans->render_target_usage; | |||
| template.bind |= trans->render_target_usage; | |||
| } | |||
| /* For texture writing, the temporary texture is used as a sampler | |||
| * when blitting into a tiled texture. */ | |||
| if (usage & PIPE_TRANSFER_WRITE) { | |||
| template.tex_usage |= PIPE_TEXTURE_USAGE_SAMPLER; | |||
| template.bind |= PIPE_BIND_SAMPLER_VIEW; | |||
| } | |||
| /* Create the temporary texture. */ | |||
| @@ -39,6 +39,12 @@ struct pipe_screen* r300_create_screen(struct r300_winsys_screen *rws); | |||
| struct r300_winsys_buffer; | |||
| /* XXX: this is just a bandaid on larger problems in | |||
| * r300_screen_buffer.h which doesn't seem to be fully ported to | |||
| * gallium-resources. | |||
| */ | |||
| #define R300_BIND_OQBO (1<<21) | |||
| enum r300_value_id { | |||
| R300_VID_PCI_ID, | |||
| @@ -172,9 +172,9 @@ softpipe_is_format_supported( struct pipe_screen *screen, | |||
| break; | |||
| } | |||
| if(tex_usage & (PIPE_TEXTURE_USAGE_DISPLAY_TARGET | | |||
| PIPE_TEXTURE_USAGE_SCANOUT | | |||
| PIPE_TEXTURE_USAGE_SHARED)) { | |||
| if(tex_usage & (PIPE_BIND_DISPLAY_TARGET | | |||
| PIPE_BIND_SCANOUT | | |||
| PIPE_BIND_SHARED)) { | |||
| if(!winsys->is_displaytarget_format_supported(winsys, tex_usage, format)) | |||
| return FALSE; | |||
| } | |||
| @@ -92,7 +92,7 @@ softpipe_displaytarget_layout(struct pipe_screen *screen, | |||
| /* Round up the surface size to a multiple of the tile size? | |||
| */ | |||
| spt->dt = winsys->displaytarget_create(winsys, | |||
| spt->base.tex_usage, | |||
| spt->base.bind, | |||
| spt->base.format, | |||
| spt->base.width0, | |||
| spt->base.height0, | |||
| @@ -124,9 +124,9 @@ softpipe_resource_create(struct pipe_screen *screen, | |||
| util_is_power_of_two(template->height0) && | |||
| util_is_power_of_two(template->depth0)); | |||
| if (spt->base.tex_usage & (PIPE_TEXTURE_USAGE_DISPLAY_TARGET | | |||
| PIPE_TEXTURE_USAGE_SCANOUT | | |||
| PIPE_TEXTURE_USAGE_SHARED)) { | |||
| if (spt->base.bind & (PIPE_BIND_DISPLAY_TARGET | | |||
| PIPE_BIND_SCANOUT | | |||
| PIPE_BIND_SHARED)) { | |||
| if (!softpipe_displaytarget_layout(screen, spt)) | |||
| goto fail; | |||
| } | |||
| @@ -237,26 +237,6 @@ softpipe_get_tex_surface(struct pipe_screen *screen, | |||
| ps->offset = spt->level_offset[level]; | |||
| ps->usage = usage; | |||
| /* Because we are softpipe, anything that the state tracker | |||
| * thought was going to be done with the GPU will actually get | |||
| * done with the CPU. Let's adjust the flags to take that into | |||
| * account. | |||
| */ | |||
| if (ps->usage & PIPE_BUFFER_USAGE_GPU_WRITE) { | |||
| /* GPU_WRITE means "render" and that can involve reads (blending) */ | |||
| ps->usage |= PIPE_BUFFER_USAGE_CPU_WRITE | PIPE_BUFFER_USAGE_CPU_READ; | |||
| } | |||
| if (ps->usage & PIPE_BUFFER_USAGE_GPU_READ) | |||
| ps->usage |= PIPE_BUFFER_USAGE_CPU_READ; | |||
| if (ps->usage & (PIPE_BUFFER_USAGE_CPU_WRITE | | |||
| PIPE_BUFFER_USAGE_GPU_WRITE)) { | |||
| /* Mark the surface as dirty. The tile cache will look for this. */ | |||
| spt->timestamp++; | |||
| softpipe_screen(screen)->timestamp++; | |||
| } | |||
| ps->face = face; | |||
| ps->level = level; | |||
| ps->zslice = zslice; | |||
| @@ -433,7 +413,7 @@ static struct pipe_resource * | |||
| softpipe_user_buffer_create(struct pipe_screen *screen, | |||
| void *ptr, | |||
| unsigned bytes, | |||
| unsigned usage) | |||
| unsigned bind_flags) | |||
| { | |||
| struct softpipe_resource *buffer; | |||
| @@ -441,10 +421,13 @@ softpipe_user_buffer_create(struct pipe_screen *screen, | |||
| if(!buffer) | |||
| return NULL; | |||
| pipe_reference_init(&buffer->base.reference, 1); | |||
| buffer->base.screen = screen; | |||
| buffer->base.format = PIPE_FORMAT_R8_UNORM; /* ?? */ | |||
| buffer->base.usage = PIPE_BUFFER_USAGE_CPU_READ | usage; | |||
| buffer->base.bind = bind_flags; | |||
| buffer->base._usage = PIPE_USAGE_IMMUTABLE; | |||
| buffer->base.flags = 0; | |||
| buffer->base.width0 = bytes; | |||
| buffer->base.height0 = 1; | |||
| buffer->base.depth0 = 1; | |||
| @@ -51,7 +51,7 @@ struct softpipe_resource | |||
| /** | |||
| * Display target, only valid for PIPE_TEXTURE_2D with the | |||
| * PIPE_TEXTURE_USAGE_DISPLAY_TARGET usage. | |||
| * PIPE_BIND_DISPLAY_TARGET usage. | |||
| */ | |||
| struct sw_displaytarget *dt; | |||
| @@ -280,7 +280,7 @@ SVGA3D_BeginDefineSurface(struct svga_winsys_context *swc, | |||
| if(!cmd) | |||
| return PIPE_ERROR_OUT_OF_MEMORY; | |||
| swc->surface_relocation(swc, &cmd->sid, sid, PIPE_BUFFER_USAGE_GPU_WRITE); | |||
| swc->surface_relocation(swc, &cmd->sid, sid, SVGA_RELOC_WRITE); | |||
| cmd->surfaceFlags = flags; | |||
| cmd->format = format; | |||
| @@ -366,7 +366,7 @@ SVGA3D_DestroySurface(struct svga_winsys_context *swc, | |||
| if(!cmd) | |||
| return PIPE_ERROR_OUT_OF_MEMORY; | |||
| swc->surface_relocation(swc, &cmd->sid, sid, PIPE_BUFFER_USAGE_GPU_READ); | |||
| swc->surface_relocation(swc, &cmd->sid, sid, SVGA_RELOC_READ); | |||
| swc->commit(swc);; | |||
| return PIPE_OK; | |||
| @@ -432,12 +432,12 @@ SVGA3D_SurfaceDMA(struct svga_winsys_context *swc, | |||
| unsigned surface_flags; | |||
| if(transfer == SVGA3D_WRITE_HOST_VRAM) { | |||
| region_flags = PIPE_BUFFER_USAGE_GPU_READ; | |||
| surface_flags = PIPE_BUFFER_USAGE_GPU_WRITE; | |||
| region_flags = SVGA_RELOC_READ; | |||
| surface_flags = SVGA_RELOC_WRITE; | |||
| } | |||
| else if(transfer == SVGA3D_READ_HOST_VRAM) { | |||
| region_flags = PIPE_BUFFER_USAGE_GPU_WRITE; | |||
| surface_flags = PIPE_BUFFER_USAGE_GPU_READ; | |||
| region_flags = SVGA_RELOC_WRITE; | |||
| surface_flags = SVGA_RELOC_READ; | |||
| } | |||
| else { | |||
| assert(0); | |||
| @@ -490,12 +490,12 @@ SVGA3D_BufferDMA(struct svga_winsys_context *swc, | |||
| unsigned surface_flags; | |||
| if(transfer == SVGA3D_WRITE_HOST_VRAM) { | |||
| region_flags = PIPE_BUFFER_USAGE_GPU_READ; | |||
| surface_flags = PIPE_BUFFER_USAGE_GPU_WRITE; | |||
| region_flags = SVGA_RELOC_READ; | |||
| surface_flags = SVGA_RELOC_WRITE; | |||
| } | |||
| else if(transfer == SVGA3D_READ_HOST_VRAM) { | |||
| region_flags = PIPE_BUFFER_USAGE_GPU_WRITE; | |||
| surface_flags = PIPE_BUFFER_USAGE_GPU_READ; | |||
| region_flags = SVGA_RELOC_WRITE; | |||
| surface_flags = SVGA_RELOC_READ; | |||
| } | |||
| else { | |||
| assert(0); | |||
| @@ -585,7 +585,7 @@ SVGA3D_SetRenderTarget(struct svga_winsys_context *swc, | |||
| cmd->type = type; | |||
| surface_to_surfaceid(swc, surface, &cmd->target, PIPE_BUFFER_USAGE_GPU_WRITE); | |||
| surface_to_surfaceid(swc, surface, &cmd->target, SVGA_RELOC_WRITE); | |||
| swc->commit(swc); | |||
| @@ -1001,8 +1001,8 @@ SVGA3D_BeginSurfaceCopy(struct svga_winsys_context *swc, | |||
| if(!cmd) | |||
| return PIPE_ERROR_OUT_OF_MEMORY; | |||
| surface_to_surfaceid(swc, src, &cmd->src, PIPE_BUFFER_USAGE_GPU_READ); | |||
| surface_to_surfaceid(swc, dest, &cmd->dest, PIPE_BUFFER_USAGE_GPU_WRITE); | |||
| surface_to_surfaceid(swc, src, &cmd->src, SVGA_RELOC_READ); | |||
| surface_to_surfaceid(swc, dest, &cmd->dest, SVGA_RELOC_WRITE); | |||
| *boxes = (SVGA3dCopyBox*) &cmd[1]; | |||
| memset(*boxes, 0, boxesSize); | |||
| @@ -1044,8 +1044,8 @@ SVGA3D_SurfaceStretchBlt(struct svga_winsys_context *swc, | |||
| if(!cmd) | |||
| return PIPE_ERROR_OUT_OF_MEMORY; | |||
| surface_to_surfaceid(swc, src, &cmd->src, PIPE_BUFFER_USAGE_GPU_READ); | |||
| surface_to_surfaceid(swc, dest, &cmd->dest, PIPE_BUFFER_USAGE_GPU_WRITE); | |||
| surface_to_surfaceid(swc, src, &cmd->src, SVGA_RELOC_READ); | |||
| surface_to_surfaceid(swc, dest, &cmd->dest, SVGA_RELOC_WRITE); | |||
| cmd->boxSrc = *boxSrc; | |||
| cmd->boxDest = *boxDest; | |||
| cmd->mode = mode; | |||
| @@ -1374,7 +1374,7 @@ SVGA3D_EndQuery(struct svga_winsys_context *swc, | |||
| cmd->type = type; | |||
| swc->region_relocation(swc, &cmd->guestResult, buffer, 0, | |||
| PIPE_BUFFER_USAGE_GPU_WRITE); | |||
| SVGA_RELOC_WRITE); | |||
| swc->commit(swc); | |||
| @@ -1421,7 +1421,7 @@ SVGA3D_WaitForQuery(struct svga_winsys_context *swc, | |||
| cmd->type = type; | |||
| swc->region_relocation(swc, &cmd->guestResult, buffer, 0, | |||
| PIPE_BUFFER_USAGE_GPU_WRITE); | |||
| SVGA_RELOC_WRITE); | |||
| swc->commit(swc); | |||
| @@ -131,14 +131,14 @@ struct pipe_context *svga_context_create( struct pipe_screen *screen, | |||
| svga->upload_ib = u_upload_create( &svga->pipe, | |||
| 32 * 1024, | |||
| 16, | |||
| PIPE_BUFFER_USAGE_INDEX ); | |||
| PIPE_BIND_INDEX_BUFFER ); | |||
| if (svga->upload_ib == NULL) | |||
| goto no_upload_ib; | |||
| svga->upload_vb = u_upload_create( &svga->pipe, | |||
| 128 * 1024, | |||
| 16, | |||
| PIPE_BUFFER_USAGE_VERTEX ); | |||
| PIPE_BIND_VERTEX_BUFFER ); | |||
| if (svga->upload_vb == NULL) | |||
| goto no_upload_vb; | |||
| @@ -198,7 +198,7 @@ svga_hwtnl_flush( struct svga_hwtnl *hwtnl ) | |||
| swc->surface_relocation(swc, | |||
| &vdecl[i].array.surfaceId, | |||
| vb_handle[i], | |||
| PIPE_BUFFER_USAGE_GPU_READ); | |||
| SVGA_RELOC_READ); | |||
| } | |||
| memcpy( prim, | |||
| @@ -209,7 +209,7 @@ svga_hwtnl_flush( struct svga_hwtnl *hwtnl ) | |||
| swc->surface_relocation(swc, | |||
| &prim[i].indexArray.surfaceId, | |||
| ib_handle[i], | |||
| PIPE_BUFFER_USAGE_GPU_READ); | |||
| SVGA_RELOC_READ); | |||
| pipe_resource_reference(&hwtnl->cmd.prim_ib[i], NULL); | |||
| } | |||
| @@ -51,15 +51,13 @@ static enum pipe_error generate_indices( struct svga_hwtnl *hwtnl, | |||
| struct pipe_resource *dst = NULL; | |||
| void *dst_map = NULL; | |||
| dst = pipe_buffer_create( pipe->screen, 32, | |||
| PIPE_BUFFER_USAGE_INDEX | | |||
| PIPE_BUFFER_USAGE_CPU_WRITE | | |||
| PIPE_BUFFER_USAGE_GPU_READ, | |||
| dst = pipe_buffer_create( pipe->screen, | |||
| PIPE_BIND_INDEX_BUFFER, | |||
| size ); | |||
| if (dst == NULL) | |||
| goto fail; | |||
| dst_map = pipe_buffer_map( pipe, dst, PIPE_BUFFER_USAGE_CPU_WRITE, | |||
| dst_map = pipe_buffer_map( pipe, dst, PIPE_TRANSFER_WRITE, | |||
| &transfer); | |||
| if (dst_map == NULL) | |||
| goto fail; | |||
| @@ -54,19 +54,17 @@ translate_indices( struct svga_hwtnl *hwtnl, | |||
| struct pipe_resource *dst = NULL; | |||
| void *dst_map = NULL; | |||
| dst = pipe_buffer_create( pipe->screen, 32, | |||
| PIPE_BUFFER_USAGE_INDEX | | |||
| PIPE_BUFFER_USAGE_CPU_WRITE | | |||
| PIPE_BUFFER_USAGE_GPU_READ, | |||
| dst = pipe_buffer_create( pipe->screen, | |||
| PIPE_BIND_INDEX_BUFFER, | |||
| size ); | |||
| if (dst == NULL) | |||
| goto fail; | |||
| src_map = pipe_buffer_map( pipe, src, PIPE_BUFFER_USAGE_CPU_READ, &src_transfer ); | |||
| src_map = pipe_buffer_map( pipe, src, PIPE_TRANSFER_READ, &src_transfer ); | |||
| if (src_map == NULL) | |||
| goto fail; | |||
| dst_map = pipe_buffer_map( pipe, dst, PIPE_BUFFER_USAGE_CPU_WRITE, &dst_transfer ); | |||
| dst_map = pipe_buffer_map( pipe, dst, PIPE_TRANSFER_WRITE, &dst_transfer ); | |||
| if (dst_map == NULL) | |||
| goto fail; | |||
| @@ -89,7 +89,7 @@ static struct pipe_query *svga_create_query( struct pipe_context *pipe, | |||
| sq->queryResult = (SVGA3dQueryResult *)sws->buffer_map(sws, | |||
| sq->hwbuf, | |||
| PIPE_BUFFER_USAGE_CPU_WRITE); | |||
| PIPE_TRANSFER_WRITE); | |||
| if(!sq->queryResult) | |||
| goto no_query_result; | |||
| @@ -47,7 +47,7 @@ | |||
| static INLINE boolean | |||
| svga_buffer_needs_hw_storage(unsigned usage) | |||
| { | |||
| return usage & (PIPE_BUFFER_USAGE_VERTEX | PIPE_BUFFER_USAGE_INDEX); | |||
| return usage & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER); | |||
| } | |||
| @@ -76,7 +76,7 @@ svga_buffer_is_referenced( struct pipe_context *pipe, | |||
| * a flush in st_bufferobj_get_subdata, during display list replay. | |||
| */ | |||
| if (sbuf->b.b.usage & (PIPE_BUFFER_USAGE_VERTEX | PIPE_BUFFER_USAGE_INDEX)) | |||
| if (sbuf->b.b.bind & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER)) | |||
| return PIPE_REFERENCED_FOR_READ; | |||
| return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE; | |||
| @@ -302,7 +302,7 @@ svga_buffer_create(struct pipe_screen *screen, | |||
| pipe_reference_init(&sbuf->b.b.reference, 1); | |||
| sbuf->b.b.screen = screen; | |||
| if(svga_buffer_needs_hw_storage(template->usage)) { | |||
| if(svga_buffer_needs_hw_storage(template->bind)) { | |||
| if(svga_buffer_create_host_surface(ss, sbuf) != PIPE_OK) | |||
| goto error2; | |||
| } | |||
| @@ -324,7 +324,7 @@ struct pipe_resource * | |||
| svga_user_buffer_create(struct pipe_screen *screen, | |||
| void *ptr, | |||
| unsigned bytes, | |||
| unsigned usage) | |||
| unsigned bind) | |||
| { | |||
| struct svga_buffer *sbuf; | |||
| @@ -336,7 +336,8 @@ svga_user_buffer_create(struct pipe_screen *screen, | |||
| sbuf->b.vtbl = &svga_buffer_vtbl; | |||
| sbuf->b.b.screen = screen; | |||
| sbuf->b.b.format = PIPE_FORMAT_R8_UNORM; /* ?? */ | |||
| sbuf->b.b.usage = usage; | |||
| sbuf->b.b._usage = PIPE_USAGE_IMMUTABLE; | |||
| sbuf->b.b.bind = bind; | |||
| sbuf->b.b.width0 = bytes; | |||
| sbuf->b.b.height0 = 1; | |||
| sbuf->b.b.depth0 = 1; | |||
| @@ -119,9 +119,9 @@ svga_buffer_create_host_surface(struct svga_screen *ss, | |||
| sbuf->key.flags = 0; | |||
| sbuf->key.format = SVGA3D_BUFFER; | |||
| if(sbuf->b.b.usage & PIPE_BUFFER_USAGE_VERTEX) | |||
| if(sbuf->b.b.bind & PIPE_BIND_VERTEX_BUFFER) | |||
| sbuf->key.flags |= SVGA3D_SURFACE_HINT_VERTEXBUFFER; | |||
| if(sbuf->b.b.usage & PIPE_BUFFER_USAGE_INDEX) | |||
| if(sbuf->b.b.bind & PIPE_BIND_INDEX_BUFFER) | |||
| sbuf->key.flags |= SVGA3D_SURFACE_HINT_INDEXBUFFER; | |||
| sbuf->key.size.width = sbuf->b.b.width0; | |||
| @@ -182,12 +182,12 @@ svga_buffer_upload_command(struct svga_context *svga, | |||
| struct pipe_resource *dummy; | |||
| if(transfer == SVGA3D_WRITE_HOST_VRAM) { | |||
| region_flags = PIPE_BUFFER_USAGE_GPU_READ; | |||
| surface_flags = PIPE_BUFFER_USAGE_GPU_WRITE; | |||
| region_flags = SVGA_RELOC_READ; | |||
| surface_flags = SVGA_RELOC_WRITE; | |||
| } | |||
| else if(transfer == SVGA3D_READ_HOST_VRAM) { | |||
| region_flags = PIPE_BUFFER_USAGE_GPU_WRITE; | |||
| surface_flags = PIPE_BUFFER_USAGE_GPU_READ; | |||
| region_flags = SVGA_RELOC_WRITE; | |||
| surface_flags = SVGA_RELOC_READ; | |||
| } | |||
| else { | |||
| assert(0); | |||
| @@ -415,7 +415,7 @@ svga_buffer_update_hw(struct svga_screen *ss, struct svga_buffer *sbuf) | |||
| return ret; | |||
| pipe_mutex_lock(ss->swc_mutex); | |||
| map = ss->sws->buffer_map(ss->sws, sbuf->hwbuf, PIPE_BUFFER_USAGE_CPU_WRITE); | |||
| map = ss->sws->buffer_map(ss->sws, sbuf->hwbuf, PIPE_TRANSFER_WRITE); | |||
| assert(map); | |||
| if(!map) { | |||
| pipe_mutex_unlock(ss->swc_mutex); | |||
| @@ -263,7 +263,7 @@ svga_transfer_dma(struct svga_transfer *st, | |||
| sws->fence_reference(sws, &fence, NULL); | |||
| } | |||
| hw = sws->buffer_map(sws, st->hwbuf, PIPE_BUFFER_USAGE_CPU_WRITE); | |||
| hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_WRITE); | |||
| assert(hw); | |||
| if(hw) { | |||
| memcpy(hw, sw, length); | |||
| @@ -277,7 +277,7 @@ svga_transfer_dma(struct svga_transfer *st, | |||
| svga_screen_flush(screen, &fence); | |||
| sws->fence_finish(sws, fence, 0); | |||
| hw = sws->buffer_map(sws, st->hwbuf, PIPE_BUFFER_USAGE_CPU_READ); | |||
| hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ); | |||
| assert(hw); | |||
| if(hw) { | |||
| memcpy(sw, hw, length); | |||
| @@ -519,18 +519,18 @@ svga_texture_create(struct pipe_screen *screen, | |||
| tex->key.cachable = 1; | |||
| if(template->tex_usage & PIPE_TEXTURE_USAGE_SAMPLER) | |||
| if (template->bind & PIPE_BIND_SAMPLER_VIEW) | |||
| tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE; | |||
| if(template->tex_usage & PIPE_TEXTURE_USAGE_DISPLAY_TARGET) { | |||
| if (template->bind & PIPE_BIND_DISPLAY_TARGET) { | |||
| tex->key.cachable = 0; | |||
| } | |||
| if(template->tex_usage & PIPE_TEXTURE_USAGE_SHARED) { | |||
| if (template->bind & PIPE_BIND_SHARED) { | |||
| tex->key.cachable = 0; | |||
| } | |||
| if(template->tex_usage & PIPE_TEXTURE_USAGE_SCANOUT) { | |||
| if (template->bind & PIPE_BIND_SCANOUT) { | |||
| tex->key.flags |= SVGA3D_SURFACE_HINT_SCANOUT; | |||
| tex->key.cachable = 0; | |||
| } | |||
| @@ -538,16 +538,16 @@ svga_texture_create(struct pipe_screen *screen, | |||
| /* | |||
| * XXX: Never pass the SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot | |||
| * know beforehand whether a texture will be used as a rendertarget or not | |||
| * and it always requests PIPE_TEXTURE_USAGE_RENDER_TARGET, therefore | |||
| * and it always requests PIPE_BIND_RENDER_TARGET, therefore | |||
| * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose. | |||
| */ | |||
| #if 0 | |||
| if((template->tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) && | |||
| if((template->tex_usage & PIPE_BIND_RENDER_TARGET) && | |||
| !util_format_is_compressed(template->format)) | |||
| tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET; | |||
| #endif | |||
| if(template->tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) | |||
| if(template->bind & PIPE_BIND_DEPTH_STENCIL) | |||
| tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL; | |||
| tex->key.numMipLevels = template->last_level + 1; | |||
| @@ -249,7 +249,7 @@ svga_is_format_supported( struct pipe_screen *screen, | |||
| assert(tex_usage); | |||
| /* Override host capabilities */ | |||
| if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) { | |||
| if (tex_usage & PIPE_BIND_RENDER_TARGET) { | |||
| switch(format) { | |||
| /* Often unsupported/problematic. This means we end up with the same | |||
| @@ -279,11 +279,11 @@ svga_is_format_supported( struct pipe_screen *screen, | |||
| SVGA3dSurfaceFormatCaps mask; | |||
| mask.value = 0; | |||
| if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) | |||
| if (tex_usage & PIPE_BIND_RENDER_TARGET) | |||
| mask.offscreenRenderTarget = 1; | |||
| if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) | |||
| if (tex_usage & PIPE_BIND_DEPTH_STENCIL) | |||
| mask.zStencil = 1; | |||
| if (tex_usage & PIPE_TEXTURE_USAGE_SAMPLER) | |||
| if (tex_usage & PIPE_BIND_SAMPLER_VIEW) | |||
| mask.texture = 1; | |||
| if ((result.u & mask.value) == mask.value) | |||
| @@ -296,7 +296,7 @@ svga_is_format_supported( struct pipe_screen *screen, | |||
| * duplicated list of supported formats which is prone to getting | |||
| * out of sync: | |||
| */ | |||
| if(tex_usage & (PIPE_TEXTURE_USAGE_RENDER_TARGET | PIPE_TEXTURE_USAGE_DEPTH_STENCIL)) | |||
| if(tex_usage & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) | |||
| return svga_translate_format_render(format) != SVGA3D_FORMAT_INVALID; | |||
| else | |||
| return svga_translate_format(format) != SVGA3D_FORMAT_INVALID; | |||
| @@ -95,7 +95,7 @@ static int emit_consts( struct svga_context *svga, | |||
| data = (const float (*)[4])pipe_buffer_map(&svga->pipe, | |||
| svga->curr.cb[unit], | |||
| PIPE_BUFFER_USAGE_CPU_READ, | |||
| PIPE_TRANSFER_READ, | |||
| &transfer); | |||
| if (data == NULL) { | |||
| ret = PIPE_ERROR_OUT_OF_MEMORY; | |||
| @@ -135,7 +135,7 @@ update_tss_binding(struct svga_context *svga, | |||
| svga->swc->surface_relocation(svga->swc, | |||
| &ts[i].value, | |||
| queue.bind[i].view->v->handle, | |||
| PIPE_BUFFER_USAGE_GPU_READ); | |||
| SVGA_RELOC_READ); | |||
| } | |||
| else { | |||
| ts[i].value = SVGA3D_INVALID_ID; | |||
| @@ -224,7 +224,7 @@ static int update_zero_stride( struct svga_context *svga, | |||
| vbuffer->buffer, | |||
| vel->src_offset, | |||
| util_format_get_blocksize(vel->src_format), | |||
| PIPE_BUFFER_USAGE_CPU_READ, | |||
| PIPE_TRANSFER_READ, | |||
| &transfer); | |||
| translate->set_buffer(translate, vel->vertex_buffer_index, | |||
| @@ -210,7 +210,8 @@ svga_get_tex_surface(struct pipe_screen *screen, | |||
| { | |||
| struct svga_texture *tex = svga_texture(pt); | |||
| struct svga_surface *s; | |||
| boolean render = flags & PIPE_BUFFER_USAGE_GPU_WRITE ? TRUE : FALSE; | |||
| boolean render = (flags & (PIPE_BIND_RENDER_TARGET | | |||
| PIPE_BIND_DEPTH_STENCIL)) ? TRUE : FALSE; | |||
| boolean view = FALSE; | |||
| SVGA3dSurfaceFormat format; | |||
| @@ -234,8 +235,6 @@ svga_get_tex_surface(struct pipe_screen *screen, | |||
| format = svga_translate_format_render(pt->format); | |||
| assert(format != SVGA3D_FORMAT_INVALID); | |||
| assert(!(flags & PIPE_BUFFER_USAGE_CPU_READ_WRITE)); | |||
| if (svga_screen(screen)->debug.force_surface_view) | |||
| view = TRUE; | |||
| @@ -86,14 +86,12 @@ svga_vbuf_render_allocate_vertices( struct vbuf_render *render, | |||
| if (!svga_render->vbuf) { | |||
| svga_render->vbuf_size = MAX2(size, svga_render->vbuf_alloc_size); | |||
| svga_render->vbuf = pipe_buffer_create(screen, | |||
| 16, | |||
| PIPE_BUFFER_USAGE_VERTEX, | |||
| PIPE_BIND_VERTEX_BUFFER, | |||
| svga_render->vbuf_size); | |||
| if(!svga_render->vbuf) { | |||
| svga_context_flush(svga, NULL); | |||
| svga_render->vbuf = pipe_buffer_create(screen, | |||
| 16, | |||
| PIPE_BUFFER_USAGE_VERTEX, | |||
| PIPE_BIND_VERTEX_BUFFER, | |||
| svga_render->vbuf_size); | |||
| assert(svga_render->vbuf); | |||
| } | |||
| @@ -261,8 +259,7 @@ svga_vbuf_render_draw( struct vbuf_render *render, | |||
| if (!svga_render->ibuf) { | |||
| svga_render->ibuf_size = MAX2(size, svga_render->ibuf_alloc_size); | |||
| svga_render->ibuf = pipe_buffer_create(screen, | |||
| 2, | |||
| PIPE_BUFFER_USAGE_VERTEX, | |||
| PIPE_BIND_INDEX_BUFFER, | |||
| svga_render->ibuf_size); | |||
| svga_render->ibuf_offset = 0; | |||
| } | |||
| @@ -69,7 +69,7 @@ svga_swtnl_draw_range_elements(struct svga_context *svga, | |||
| for (i = 0; i < svga->curr.num_vertex_buffers; i++) { | |||
| map = pipe_buffer_map(&svga->pipe, | |||
| svga->curr.vb[i].buffer, | |||
| PIPE_BUFFER_USAGE_CPU_READ, | |||
| PIPE_TRANSFER_READ, | |||
| &vb_transfer[i]); | |||
| draw_set_mapped_vertex_buffer(draw, i, map); | |||
| @@ -78,7 +78,7 @@ svga_swtnl_draw_range_elements(struct svga_context *svga, | |||
| /* Map index buffer, if present */ | |||
| if (indexBuffer) { | |||
| map = pipe_buffer_map(&svga->pipe, indexBuffer, | |||
| PIPE_BUFFER_USAGE_CPU_READ, | |||
| PIPE_TRANSFER_READ, | |||
| &ib_transfer); | |||
| draw_set_mapped_element_buffer_range(draw, | |||
| @@ -91,7 +91,7 @@ svga_swtnl_draw_range_elements(struct svga_context *svga, | |||
| if (svga->curr.cb[PIPE_SHADER_VERTEX]) { | |||
| map = pipe_buffer_map(&svga->pipe, | |||
| svga->curr.cb[PIPE_SHADER_VERTEX], | |||
| PIPE_BUFFER_USAGE_CPU_READ, | |||
| PIPE_TRANSFER_READ, | |||
| &cb_transfer); | |||
| assert(map); | |||
| draw_set_mapped_constant_buffer( | |||
| @@ -54,8 +54,13 @@ struct svga_region; | |||
| struct winsys_handle; | |||
| #define SVGA_BUFFER_USAGE_PINNED (PIPE_BUFFER_USAGE_CUSTOM << 0) | |||
| #define SVGA_BUFFER_USAGE_WRAPPED (PIPE_BUFFER_USAGE_CUSTOM << 1) | |||
| #define SVGA_BUFFER_USAGE_PINNED (1 << 0) | |||
| #define SVGA_BUFFER_USAGE_WRAPPED (1 << 1) | |||
| #define SVGA_RELOC_WRITE 0x1 | |||
| #define SVGA_RELOC_READ 0x2 | |||
| /** Opaque surface handle */ | |||
| @@ -72,7 +72,9 @@ void trace_dump_template(const struct pipe_resource *templat) | |||
| trace_dump_member_end(); | |||
| trace_dump_member(uint, templat, last_level); | |||
| trace_dump_member(uint, templat, tex_usage); | |||
| trace_dump_member(uint, templat, _usage); | |||
| trace_dump_member(uint, templat, bind); | |||
| trace_dump_member(uint, templat, flags); | |||
| trace_dump_struct_end(); | |||
| } | |||
| @@ -202,7 +202,7 @@ trace_rbug_texture_info(struct trace_rbug *tr_rbug, struct rbug_header *header, | |||
| util_format_get_blocksize(t->format), | |||
| t->last_level, | |||
| t->nr_samples, | |||
| t->tex_usage, | |||
| t->bind, | |||
| NULL); | |||
| pipe_mutex_unlock(tr_scr->list_mutex); | |||
| @@ -388,8 +388,8 @@ trace_screen_user_buffer_create(struct pipe_screen *_screen, | |||
| trace_dump_call_end(); | |||
| if(result) { | |||
| assert(!(result->usage & TRACE_BUFFER_USAGE_USER)); | |||
| result->usage |= TRACE_BUFFER_USAGE_USER; | |||
| assert(!(result->flags & TRACE_FLAG_USER_BUFFER)); | |||
| result->flags |= TRACE_FLAG_USER_BUFFER; | |||
| } | |||
| return trace_resource_create(tr_scr, result); | |||
| @@ -48,7 +48,7 @@ struct tr_list { | |||
| * without mapping/unmapping. This flag marks user buffers, so that their | |||
| * contents can be dumpped before being used by the pipe context. | |||
| */ | |||
| #define TRACE_BUFFER_USAGE_USER (1 << 31) | |||
| #define TRACE_FLAG_USER_BUFFER (1 << 31) | |||
| struct trace_screen | |||
| @@ -176,22 +176,10 @@ enum pipe_texture_target { | |||
| #define PIPE_TEX_COMPARE_NONE 0 | |||
| #define PIPE_TEX_COMPARE_R_TO_TEXTURE 1 | |||
| #define PIPE_TEXTURE_USAGE_RENDER_TARGET 0x1 | |||
| #define PIPE_TEXTURE_USAGE_DISPLAY_TARGET 0x2 /* windows presentable buffer, ie a backbuffer */ | |||
| #define PIPE_TEXTURE_USAGE_SCANOUT 0x4 /* ie a frontbuffer */ | |||
| #define PIPE_TEXTURE_USAGE_DEPTH_STENCIL 0x8 | |||
| #define PIPE_TEXTURE_USAGE_SAMPLER 0x10 | |||
| #define PIPE_TEXTURE_USAGE_DYNAMIC 0x20 | |||
| #define PIPE_TEXTURE_USAGE_SHARED 0x40 | |||
| /** Pipe driver custom usage flags should be greater or equal to this value */ | |||
| #define PIPE_TEXTURE_USAGE_CUSTOM (1 << 16) | |||
| #define PIPE_TEXTURE_GEOM_NON_SQUARE 0x1 | |||
| #define PIPE_TEXTURE_GEOM_NON_POWER_OF_TWO 0x2 | |||
| /** | |||
| * Surface layout | |||
| * Surface layout -- a hint? Or some driver-internal poking out into | |||
| * the interface? | |||
| */ | |||
| #define PIPE_SURFACE_LAYOUT_LINEAR 0 | |||
| @@ -287,27 +275,64 @@ enum pipe_transfer_usage { | |||
| /* | |||
| * Buffer usage flags | |||
| * Resource binding flags -- state tracker must specify in advance all | |||
| * the ways a resource might be used. | |||
| */ | |||
| #define PIPE_BIND_DEPTH_STENCIL (1 << 0) /* get_tex_surface */ | |||
| #define PIPE_BIND_RENDER_TARGET (1 << 1) /* get_tex_surface */ | |||
| #define PIPE_BIND_SAMPLER_VIEW (1 << 2) /* get_sampler_view */ | |||
| #define PIPE_BIND_VERTEX_BUFFER (1 << 3) /* set_vertex_buffers */ | |||
| #define PIPE_BIND_INDEX_BUFFER (1 << 4) /* draw_elements */ | |||
| #define PIPE_BIND_CONSTANT_BUFFER (1 << 5) /* set_constant_buffer */ | |||
| #define PIPE_BIND_BLIT_SOURCE (1 << 6) /* surface_copy */ | |||
| #define PIPE_BIND_BLIT_DESTINATION (1 << 7) /* surface_copy, fill */ | |||
| #define PIPE_BIND_DISPLAY_TARGET (1 << 8) /* flush_front_buffer */ | |||
| #define PIPE_BIND_TRANSFER_WRITE (1 << 9) /* get_transfer */ | |||
| #define PIPE_BIND_TRANSFER_READ (1 << 10) /* get_transfer */ | |||
| #define PIPE_BIND_CUSTOM (1 << 16) /* state-tracker/winsys usages */ | |||
| /* The first two flags were previously part of the amorphous | |||
| * TEXTURE_USAGE, most of which are now descriptions of the ways a | |||
| * particular texture can be bound to the gallium pipeline. These two | |||
| * do not fit within that and probably need to be migrated to some | |||
| * other place. | |||
| * | |||
| * It seems like scanout is used by the Xorg state tracker to ask for | |||
| * a texture suitable for actual scanout (hence the name), which | |||
| * implies extra layout constraints on some hardware. It may also | |||
| * have some special meaning regarding mouse cursor images. | |||
| * | |||
| * The shared flag is quite underspecified, but certainly isn't a | |||
| * binding flag - it seems more like a message to the winsys to create | |||
| * a shareable allocation. Could it mean that this texture is a valid argument for | |||
| */ | |||
| #define PIPE_BIND_SCANOUT (1 << 14) /* */ | |||
| #define PIPE_BIND_SHARED (1 << 15) /* get_texture_handle ??? */ | |||
| #define PIPE_BUFFER_USAGE_CPU_READ (1 << 0) | |||
| #define PIPE_BUFFER_USAGE_CPU_WRITE (1 << 1) | |||
| #define PIPE_BUFFER_USAGE_GPU_READ (1 << 2) | |||
| #define PIPE_BUFFER_USAGE_GPU_WRITE (1 << 3) | |||
| #define PIPE_BUFFER_USAGE_PIXEL (1 << 4) | |||
| #define PIPE_BUFFER_USAGE_VERTEX (1 << 5) | |||
| #define PIPE_BUFFER_USAGE_INDEX (1 << 6) | |||
| #define PIPE_BUFFER_USAGE_CONSTANT (1 << 7) | |||
| #define PIPE_BUFFER_USAGE_CUSTOM (1 << 16) | |||
| /* Convenient shortcuts */ | |||
| #define PIPE_BUFFER_USAGE_CPU_READ_WRITE \ | |||
| ( PIPE_BUFFER_USAGE_CPU_READ | PIPE_BUFFER_USAGE_CPU_WRITE ) | |||
| #define PIPE_BUFFER_USAGE_GPU_READ_WRITE \ | |||
| ( PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE ) | |||
| #define PIPE_BUFFER_USAGE_WRITE \ | |||
| ( PIPE_BUFFER_USAGE_CPU_WRITE | PIPE_BUFFER_USAGE_GPU_WRITE ) | |||
| /* Flags for the driver about resource behaviour: | |||
| */ | |||
| #define PIPE_RESOURCE_FLAG_GEN_MIPS (1 << 0) /* Driver performs autogen mips */ | |||
| #define PIPE_RESOURCE_FLAG_DRV_PRIV (1 << 16) /* driver/winsys private */ | |||
| #define PIPE_RESOURCE_FLAG_ST_PRIV (1 << 24) /* state-tracker/winsys private */ | |||
| /* Hint about the expected lifecycle of a resource. | |||
| */ | |||
| #define PIPE_USAGE_DEFAULT 0 /* many uploads, draws intermixed */ | |||
| #define PIPE_USAGE_DYNAMIC 1 /* many uploads, draws intermixed */ | |||
| #define PIPE_USAGE_STATIC 2 /* same as immutable?? */ | |||
| #define PIPE_USAGE_IMMUTABLE 3 /* no change after first upload */ | |||
| #define PIPE_USAGE_STREAM 4 /* upload, draw, upload, draw */ | |||
| /* These are intended to be used in calls to is_format_supported, but | |||
| * no driver actually uses these flags, and only the glx/xlib state | |||
| * tracker issues them. | |||
| * | |||
| * Deprecate? | |||
| */ | |||
| #define PIPE_TEXTURE_GEOM_NON_SQUARE 0x1 | |||
| #define PIPE_TEXTURE_GEOM_NON_POWER_OF_TWO 0x2 | |||
| /** | |||
| @@ -280,7 +280,7 @@ struct pipe_surface | |||
| unsigned layout; /**< PIPE_SURFACE_LAYOUT_x */ | |||
| unsigned offset; /**< offset from start of buffer, in bytes */ | |||
| unsigned usage; /**< bitmask of PIPE_BUFFER_USAGE_x */ | |||
| unsigned usage; /**< bitmask of PIPE_BIND_x */ | |||
| unsigned zslice; | |||
| unsigned face; | |||
| @@ -331,11 +331,13 @@ struct pipe_resource | |||
| unsigned width0; | |||
| unsigned height0; | |||
| unsigned depth0; | |||
| unsigned last_level:8; /**< Index of last mipmap level present/defined */ | |||
| unsigned nr_samples:8; /**< for multisampled surfaces, nr of samples */ | |||
| unsigned _usage:8; /* PIPE_USAGE_x (not a bitmask) */ | |||
| unsigned usage; /* xxx: unify with tex_usage */ | |||
| unsigned tex_usage; /**< bitmask of PIPE_TEXTURE_USAGE_* */ | |||
| unsigned bind; /* PIPE_BIND_x */ | |||
| unsigned flags; /* PIPE_RESOURCE_FLAG_x */ | |||
| }; | |||
| @@ -81,7 +81,7 @@ struct sw_winsys | |||
| * pools, or obtained directly from the windowing system. | |||
| * | |||
| * This callback is invoked by the pipe_screen when creating a texture marked | |||
| * with the PIPE_TEXTURE_USAGE_DISPLAY_TARGET flag to get the underlying | |||
| * with the PIPE_BIND_DISPLAY_TARGET flag to get the underlying | |||
| * storage. | |||
| */ | |||
| struct sw_displaytarget * | |||
| @@ -439,12 +439,12 @@ dri1_allocate_textures(struct dri_drawable *drawable, | |||
| case ST_ATTACHMENT_FRONT_RIGHT: | |||
| case ST_ATTACHMENT_BACK_RIGHT: | |||
| format = drawable->stvis.color_format; | |||
| tex_usage = PIPE_TEXTURE_USAGE_DISPLAY_TARGET | | |||
| PIPE_TEXTURE_USAGE_RENDER_TARGET; | |||
| tex_usage = PIPE_BIND_DISPLAY_TARGET | | |||
| PIPE_BIND_RENDER_TARGET; | |||
| break; | |||
| case ST_ATTACHMENT_DEPTH_STENCIL: | |||
| format = drawable->stvis.depth_stencil_format; | |||
| tex_usage = PIPE_TEXTURE_USAGE_DEPTH_STENCIL; | |||
| tex_usage = PIPE_BIND_DEPTH_STENCIL; | |||
| break; | |||
| default: | |||
| format = PIPE_FORMAT_NONE; | |||
| @@ -127,25 +127,25 @@ dri_fill_in_modes(struct dri_screen *screen, | |||
| pf_x8z24 = p_screen->is_format_supported(p_screen, PIPE_FORMAT_Z24X8_UNORM, | |||
| PIPE_TEXTURE_2D, | |||
| PIPE_TEXTURE_USAGE_DEPTH_STENCIL, 0); | |||
| PIPE_BIND_DEPTH_STENCIL, 0); | |||
| pf_z24x8 = p_screen->is_format_supported(p_screen, PIPE_FORMAT_X8Z24_UNORM, | |||
| PIPE_TEXTURE_2D, | |||
| PIPE_TEXTURE_USAGE_DEPTH_STENCIL, 0); | |||
| PIPE_BIND_DEPTH_STENCIL, 0); | |||
| pf_s8z24 = p_screen->is_format_supported(p_screen, PIPE_FORMAT_Z24S8_UNORM, | |||
| PIPE_TEXTURE_2D, | |||
| PIPE_TEXTURE_USAGE_DEPTH_STENCIL, 0); | |||
| PIPE_BIND_DEPTH_STENCIL, 0); | |||
| pf_z24s8 = p_screen->is_format_supported(p_screen, PIPE_FORMAT_S8Z24_UNORM, | |||
| PIPE_TEXTURE_2D, | |||
| PIPE_TEXTURE_USAGE_DEPTH_STENCIL, 0); | |||
| PIPE_BIND_DEPTH_STENCIL, 0); | |||
| pf_a8r8g8b8 = p_screen->is_format_supported(p_screen, PIPE_FORMAT_B8G8R8A8_UNORM, | |||
| PIPE_TEXTURE_2D, | |||
| PIPE_TEXTURE_USAGE_RENDER_TARGET, 0); | |||
| PIPE_BIND_RENDER_TARGET, 0); | |||
| pf_x8r8g8b8 = p_screen->is_format_supported(p_screen, PIPE_FORMAT_B8G8R8X8_UNORM, | |||
| PIPE_TEXTURE_2D, | |||
| PIPE_TEXTURE_USAGE_RENDER_TARGET, 0); | |||
| PIPE_BIND_RENDER_TARGET, 0); | |||
| pf_r5g6b5 = p_screen->is_format_supported(p_screen, PIPE_FORMAT_B5G6R5_UNORM, | |||
| PIPE_TEXTURE_2D, | |||
| PIPE_TEXTURE_USAGE_RENDER_TARGET, 0); | |||
| PIPE_BIND_RENDER_TARGET, 0); | |||
| /* We can only get a 16 or 32 bit depth buffer with getBuffersWithFormat */ | |||
| if (screen->sPriv->dri2.loader && | |||
| @@ -153,10 +153,10 @@ dri_fill_in_modes(struct dri_screen *screen, | |||
| (screen->sPriv->dri2.loader->getBuffersWithFormat != NULL)) { | |||
| pf_z16 = p_screen->is_format_supported(p_screen, PIPE_FORMAT_Z16_UNORM, | |||
| PIPE_TEXTURE_2D, | |||
| PIPE_TEXTURE_USAGE_DEPTH_STENCIL, 0); | |||
| PIPE_BIND_DEPTH_STENCIL, 0); | |||
| pf_z32 = p_screen->is_format_supported(p_screen, PIPE_FORMAT_Z32_UNORM, | |||
| PIPE_TEXTURE_2D, | |||
| PIPE_TEXTURE_USAGE_DEPTH_STENCIL, 0); | |||
| PIPE_BIND_DEPTH_STENCIL, 0); | |||
| } else { | |||
| pf_z16 = FALSE; | |||
| pf_z32 = FALSE; | |||
| @@ -94,7 +94,7 @@ dri_drawable_process_buffers(struct dri_drawable *drawable, | |||
| pipe_resource_reference(&drawable->textures[i], NULL); | |||
| memset(&templ, 0, sizeof(templ)); | |||
| templ.tex_usage = PIPE_TEXTURE_USAGE_RENDER_TARGET; | |||
| templ.tex_usage = PIPE_BIND_RENDER_TARGET; | |||
| templ.target = PIPE_TEXTURE_2D; | |||
| templ.last_level = 0; | |||
| templ.width0 = dri_drawable->w; | |||
| @@ -775,7 +775,8 @@ egl_g3d_find_pixmap_config(_EGLDisplay *dpy, EGLNativePixmapType pix) | |||
| */ | |||
| static struct pipe_surface * | |||
| get_pipe_surface(struct native_display *ndpy, struct native_surface *nsurf, | |||
| enum native_attachment natt) | |||
| enum native_attachment natt, | |||
| unsigned bind) | |||
| { | |||
| struct pipe_resource *textures[NUM_NATIVE_ATTACHMENTS]; | |||
| struct pipe_surface *psurf; | |||
| @@ -786,7 +787,7 @@ get_pipe_surface(struct native_display *ndpy, struct native_surface *nsurf, | |||
| return NULL; | |||
| psurf = ndpy->screen->get_tex_surface(ndpy->screen, textures[natt], | |||
| 0, 0, 0, PIPE_BUFFER_USAGE_GPU_WRITE); | |||
| 0, 0, 0, bind); | |||
| pipe_resource_reference(&textures[natt], NULL); | |||
| return psurf; | |||
| @@ -831,12 +832,13 @@ egl_g3d_copy_buffers(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSurface *surf, | |||
| return EGL_FALSE; | |||
| } | |||
| psurf = get_pipe_surface(gdpy->native, nsurf, NATIVE_ATTACHMENT_FRONT_LEFT); | |||
| psurf = get_pipe_surface(gdpy->native, nsurf, NATIVE_ATTACHMENT_FRONT_LEFT, | |||
| PIPE_BIND_BLIT_DESTINATION); | |||
| if (psurf) { | |||
| struct pipe_surface *psrc; | |||
| psrc = screen->get_tex_surface(screen, gsurf->render_texture, | |||
| 0, 0, 0, PIPE_BUFFER_USAGE_GPU_READ); | |||
| 0, 0, 0, PIPE_BIND_BLIT_SOURCE); | |||
| if (psrc) { | |||
| gdpy->pipe->surface_copy(gdpy->pipe, psurf, 0, 0, | |||
| psrc, 0, 0, psurf->width, psurf->height); | |||
| @@ -53,9 +53,9 @@ kms_surface_validate(struct native_surface *nsurf, uint attachment_mask, | |||
| templ.height0 = ksurf->height; | |||
| templ.depth0 = 1; | |||
| templ.format = ksurf->color_format; | |||
| templ.tex_usage = PIPE_TEXTURE_USAGE_RENDER_TARGET; | |||
| templ.tex_usage = PIPE_BIND_RENDER_TARGET; | |||
| if (ksurf->type == KMS_SURFACE_TYPE_SCANOUT) | |||
| templ.tex_usage |= PIPE_TEXTURE_USAGE_SCANOUT; | |||
| templ.tex_usage |= PIPE_BIND_SCANOUT; | |||
| } | |||
| /* create textures */ | |||
| @@ -591,8 +591,8 @@ kms_display_is_format_supported(struct native_display *ndpy, | |||
| { | |||
| return ndpy->screen->is_format_supported(ndpy->screen, | |||
| fmt, PIPE_TEXTURE_2D, | |||
| (is_color) ? PIPE_TEXTURE_USAGE_RENDER_TARGET : | |||
| PIPE_TEXTURE_USAGE_DEPTH_STENCIL, 0); | |||
| (is_color) ? PIPE_BIND_RENDER_TARGET : | |||
| PIPE_BIND_DEPTH_STENCIL, 0); | |||
| } | |||
| static const struct native_config ** | |||
| @@ -136,7 +136,7 @@ dri2_surface_process_drawable_buffers(struct native_surface *nsurf, | |||
| templ.height0 = dri2surf->height; | |||
| templ.depth0 = 1; | |||
| templ.format = dri2surf->color_format; | |||
| templ.tex_usage = PIPE_TEXTURE_USAGE_RENDER_TARGET; | |||
| templ.bind = PIPE_BIND_RENDER_TARGET; | |||
| valid_mask = 0x0; | |||
| for (i = 0; i < num_xbufs; i++) { | |||
| @@ -277,7 +277,7 @@ dri2_surface_update_buffers(struct native_surface *nsurf, uint buffer_mask) | |||
| templ.height0 = dri2surf->height; | |||
| templ.depth0 = 1; | |||
| templ.format = dri2surf->color_format; | |||
| templ.tex_usage = PIPE_TEXTURE_USAGE_RENDER_TARGET; | |||
| templ.bind = PIPE_BIND_RENDER_TARGET; | |||
| for (att = 0; att < NUM_NATIVE_ATTACHMENTS; att++) { | |||
| if (native_attachment_mask_test(buffer_mask, att)) { | |||
| @@ -581,8 +581,8 @@ is_format_supported(struct pipe_screen *screen, | |||
| enum pipe_format fmt, boolean is_color) | |||
| { | |||
| return screen->is_format_supported(screen, fmt, PIPE_TEXTURE_2D, | |||
| (is_color) ? PIPE_TEXTURE_USAGE_RENDER_TARGET : | |||
| PIPE_TEXTURE_USAGE_DEPTH_STENCIL, 0); | |||
| (is_color) ? PIPE_BIND_RENDER_TARGET : | |||
| PIPE_BIND_DEPTH_STENCIL, 0); | |||
| } | |||
| static boolean | |||
| @@ -138,17 +138,17 @@ ximage_surface_alloc_buffer(struct native_surface *nsurf, | |||
| templ.width0 = xsurf->width; | |||
| templ.height0 = xsurf->height; | |||
| templ.depth0 = 1; | |||
| templ.tex_usage = PIPE_TEXTURE_USAGE_RENDER_TARGET; | |||
| templ.bind = PIPE_BIND_RENDER_TARGET; | |||
| if (xsurf->type != XIMAGE_SURFACE_TYPE_PBUFFER) { | |||
| switch (which) { | |||
| case NATIVE_ATTACHMENT_FRONT_LEFT: | |||
| case NATIVE_ATTACHMENT_FRONT_RIGHT: | |||
| templ.tex_usage |= PIPE_TEXTURE_USAGE_SCANOUT; | |||
| templ.bind |= PIPE_BIND_SCANOUT; | |||
| break; | |||
| case NATIVE_ATTACHMENT_BACK_LEFT: | |||
| case NATIVE_ATTACHMENT_BACK_RIGHT: | |||
| templ.tex_usage |= PIPE_TEXTURE_USAGE_DISPLAY_TARGET; | |||
| templ.bind |= PIPE_BIND_DISPLAY_TARGET; | |||
| break; | |||
| default: | |||
| break; | |||
| @@ -273,7 +273,7 @@ ximage_surface_draw_buffer(struct native_surface *nsurf, | |||
| pipe_surface_reference(&xsurf->draw_surface, NULL); | |||
| psurf = screen->get_tex_surface(screen, | |||
| xbuf->texture, 0, 0, 0, PIPE_BUFFER_USAGE_CPU_READ); | |||
| xbuf->texture, 0, 0, 0, PIPE_BIND_DISPLAY_TARGET); | |||
| if (!psurf) | |||
| return FALSE; | |||
| @@ -317,7 +317,7 @@ static enum pipe_format | |||
| choose_depth_stencil_format(XMesaDisplay xmdpy, int depth, int stencil) | |||
| { | |||
| const enum pipe_texture_target target = PIPE_TEXTURE_2D; | |||
| const unsigned tex_usage = PIPE_TEXTURE_USAGE_DEPTH_STENCIL; | |||
| const unsigned tex_usage = PIPE_BIND_DEPTH_STENCIL; | |||
| const unsigned geom_flags = (PIPE_TEXTURE_GEOM_NON_SQUARE | | |||
| PIPE_TEXTURE_GEOM_NON_POWER_OF_TWO); | |||
| enum pipe_format formats[8], fmt; | |||
| @@ -70,7 +70,7 @@ xmesa_st_framebuffer_display(struct st_framebuffer_iface *stfbi, | |||
| pipe_surface_reference(&xstfb->display_surface, NULL); | |||
| psurf = xstfb->screen->get_tex_surface(xstfb->screen, | |||
| ptex, 0, 0, 0, PIPE_BUFFER_USAGE_CPU_READ); | |||
| ptex, 0, 0, 0, PIPE_BIND_DISPLAY_TARGET); | |||
| if (!psurf) | |||
| return FALSE; | |||
| @@ -110,9 +110,9 @@ xmesa_st_framebuffer_copy_textures(struct st_framebuffer_iface *stfbi, | |||
| } | |||
| src = xstfb->screen->get_tex_surface(xstfb->screen, | |||
| src_ptex, 0, 0, 0, PIPE_BUFFER_USAGE_GPU_READ); | |||
| src_ptex, 0, 0, 0, PIPE_BIND_BLIT_SOURCE); | |||
| dst = xstfb->screen->get_tex_surface(xstfb->screen, | |||
| dst_ptex, 0, 0, 0, PIPE_BUFFER_USAGE_GPU_WRITE); | |||
| dst_ptex, 0, 0, 0, PIPE_BIND_BLIT_DESTINATION); | |||
| if (src && dst) | |||
| pipe->surface_copy(pipe, dst, x, y, src, x, y, width, height); | |||
| @@ -148,7 +148,7 @@ xmesa_st_framebuffer_validate_textures(struct st_framebuffer_iface *stfbi, | |||
| for (i = 0; i < ST_ATTACHMENT_COUNT; i++) { | |||
| enum pipe_format format; | |||
| unsigned tex_usage; | |||
| unsigned bind; | |||
| /* the texture already exists or not requested */ | |||
| if (xstfb->textures[i] || !(mask & (1 << i))) { | |||
| @@ -164,12 +164,12 @@ xmesa_st_framebuffer_validate_textures(struct st_framebuffer_iface *stfbi, | |||
| case ST_ATTACHMENT_FRONT_RIGHT: | |||
| case ST_ATTACHMENT_BACK_RIGHT: | |||
| format = xstfb->stvis.color_format; | |||
| tex_usage = PIPE_TEXTURE_USAGE_DISPLAY_TARGET | | |||
| PIPE_TEXTURE_USAGE_RENDER_TARGET; | |||
| bind = PIPE_BIND_DISPLAY_TARGET | | |||
| PIPE_BIND_RENDER_TARGET; | |||
| break; | |||
| case ST_ATTACHMENT_DEPTH_STENCIL: | |||
| format = xstfb->stvis.depth_stencil_format; | |||
| tex_usage = PIPE_TEXTURE_USAGE_DEPTH_STENCIL; | |||
| bind = PIPE_BIND_DEPTH_STENCIL; | |||
| break; | |||
| default: | |||
| format = PIPE_FORMAT_NONE; | |||
| @@ -178,7 +178,7 @@ xmesa_st_framebuffer_validate_textures(struct st_framebuffer_iface *stfbi, | |||
| if (format != PIPE_FORMAT_NONE) { | |||
| templ.format = format; | |||
| templ.tex_usage = tex_usage; | |||
| templ.bind = bind; | |||
| xstfb->textures[i] = | |||
| xstfb->screen->resource_create(xstfb->screen, &templ); | |||
| @@ -73,7 +73,7 @@ static INLINE struct pipe_resource *create_texture_1d(struct vg_context *ctx, | |||
| templ.width0 = color_data_len; | |||
| templ.height0 = 1; | |||
| templ.depth0 = 1; | |||
| templ.tex_usage = PIPE_TEXTURE_USAGE_SAMPLER; | |||
| templ.bind = PIPE_BIND_SAMPLER_VIEW; | |||
| tex = screen->resource_create(screen, &templ); | |||
| @@ -121,7 +121,7 @@ static INLINE struct pipe_surface * setup_framebuffer(struct vg_image *dst) | |||
| struct pipe_framebuffer_state fb; | |||
| struct pipe_surface *dst_surf = pipe->screen->get_tex_surface( | |||
| pipe->screen, dst->sampler_view->texture, 0, 0, 0, | |||
| PIPE_BUFFER_USAGE_GPU_WRITE); | |||
| PIPE_BIND_RENDER_TARGET); | |||
| /* drawing dest */ | |||
| memset(&fb, 0, sizeof(fb)); | |||
| @@ -176,8 +176,8 @@ static void setup_constant_buffer(struct vg_context *ctx, const void *buffer, | |||
| * avoid gratuitous rendering synchronization. */ | |||
| pipe_resource_reference(cbuf, NULL); | |||
| *cbuf = pipe_buffer_create(pipe->screen, 16, | |||
| PIPE_BUFFER_USAGE_CONSTANT, | |||
| *cbuf = pipe_buffer_create(pipe->screen, | |||
| PIPE_BIND_CONSTANT_BUFFER, | |||
| param_bytes); | |||
| if (*cbuf) { | |||
| @@ -82,7 +82,7 @@ draw_clear_quad(struct vg_context *st, | |||
| buf = pipe_user_buffer_create(pipe->screen, | |||
| st->clear.vertices, | |||
| sizeof(st->clear.vertices), | |||
| PIPE_BUFFER_USAGE_VERTEX); | |||
| PIPE_BIND_VERTEX_BUFFER); | |||
| /* draw */ | |||
| @@ -270,7 +270,7 @@ struct vg_image * image_create(VGImageFormat format, | |||
| image->sampler.normalized_coords = 1; | |||
| assert(screen->is_format_supported(screen, pformat, PIPE_TEXTURE_2D, | |||
| PIPE_TEXTURE_USAGE_SAMPLER, 0)); | |||
| PIPE_BIND_SAMPLER_VIEW, 0)); | |||
| memset(&pt, 0, sizeof(pt)); | |||
| pt.target = PIPE_TEXTURE_2D; | |||
| @@ -279,7 +279,7 @@ struct vg_image * image_create(VGImageFormat format, | |||
| pt.width0 = width; | |||
| pt.height0 = height; | |||
| pt.depth0 = 1; | |||
| pt.tex_usage = PIPE_TEXTURE_USAGE_SAMPLER; | |||
| pt.bind = PIPE_BIND_SAMPLER_VIEW; | |||
| newtex = screen->resource_create(screen, &pt); | |||
| @@ -576,7 +576,7 @@ void image_set_pixels(VGint dx, VGint dy, | |||
| pipe->flush(pipe, PIPE_FLUSH_RENDER_CACHE, NULL); | |||
| surf = screen->get_tex_surface(screen, image_texture(src), 0, 0, 0, | |||
| PIPE_BUFFER_USAGE_GPU_READ); | |||
| PIPE_BIND_BLIT_SOURCE); | |||
| vg_copy_surface(ctx, strb->surface, dx, dy, | |||
| surf, sx+src->x, sy+src->y, width, height); | |||
| @@ -601,8 +601,8 @@ void image_get_pixels(struct vg_image *dst, VGint dx, VGint dy, | |||
| pipe->flush(pipe, PIPE_FLUSH_RENDER_CACHE, NULL); | |||
| surf = screen->get_tex_surface(screen, image_texture(dst), 0, 0, 0, | |||
| PIPE_BUFFER_USAGE_GPU_WRITE | | |||
| PIPE_BUFFER_USAGE_GPU_READ); | |||
| PIPE_BIND_BLIT_SOURCE); | |||
| vg_copy_surface(ctx, surf, dst->x + dx, dst->y + dy, | |||
| strb->surface, sx, sy, width, height); | |||
| @@ -227,8 +227,8 @@ static void setup_mask_operation(VGMaskOperation operation) | |||
| */ | |||
| pipe_resource_reference(cbuf, NULL); | |||
| *cbuf = pipe_buffer_create(ctx->pipe->screen, 1, | |||
| PIPE_BUFFER_USAGE_CONSTANT, | |||
| *cbuf = pipe_buffer_create(ctx->pipe->screen, | |||
| PIPE_BIND_CONSTANT_BUFFER, | |||
| param_bytes); | |||
| if (*cbuf) { | |||
| st_no_flush_pipe_buffer_write(ctx, *cbuf, | |||
| @@ -326,8 +326,8 @@ static void setup_mask_fill(const VGfloat color[4]) | |||
| */ | |||
| pipe_resource_reference(cbuf, NULL); | |||
| *cbuf = pipe_buffer_create(ctx->pipe->screen, 1, | |||
| PIPE_BUFFER_USAGE_CONSTANT, | |||
| *cbuf = pipe_buffer_create(ctx->pipe->screen, | |||
| PIPE_BIND_CONSTANT_BUFFER, | |||
| param_bytes); | |||
| if (*cbuf) { | |||
| st_no_flush_pipe_buffer_write(ctx, *cbuf, 0, param_bytes, color); | |||
| @@ -417,7 +417,7 @@ static void mask_using_texture(struct pipe_sampler_view *sampler_view, | |||
| struct vg_context *ctx = vg_current_context(); | |||
| struct pipe_resource *texture = sampler_view->texture; | |||
| struct pipe_surface *surface = | |||
| alpha_mask_surface(ctx, PIPE_BUFFER_USAGE_GPU_WRITE); | |||
| alpha_mask_surface(ctx, PIPE_BIND_RENDER_TARGET); | |||
| VGint offsets[4], loc[4]; | |||
| if (!surface) | |||
| @@ -496,7 +496,7 @@ struct vg_mask_layer * mask_layer_create(VGint width, VGint height) | |||
| pt.width0 = width; | |||
| pt.height0 = height; | |||
| pt.depth0 = 1; | |||
| pt.tex_usage = PIPE_TEXTURE_USAGE_SAMPLER; | |||
| pt.tex_usage = PIPE_BIND_SAMPLER_VIEW; | |||
| pt.compressed = 0; | |||
| texture = screen->resource_create(screen, &pt); | |||
| @@ -664,7 +664,7 @@ void mask_fill(VGint x, VGint y, VGint width, VGint height, | |||
| struct vg_context *ctx = vg_current_context(); | |||
| VGfloat alpha_color[4] = {.0f, .0f, .0f, value}; | |||
| struct pipe_surface *surf = alpha_mask_surface( | |||
| ctx, PIPE_BUFFER_USAGE_GPU_WRITE); | |||
| ctx, PIPE_BIND_RENDER_TARGET); | |||
| #if DEBUG_MASKS | |||
| debug_printf("mask_fill(%d, %d, %d, %d) with rgba(%f, %f, %f, %f)\n", | |||
| @@ -157,7 +157,7 @@ static INLINE struct pipe_resource *create_gradient_texture(struct vg_paint *p) | |||
| templ.width0 = 1024; | |||
| templ.height0 = 1; | |||
| templ.depth0 = 1; | |||
| templ.tex_usage = PIPE_TEXTURE_USAGE_SAMPLER; | |||
| templ.bind = PIPE_BIND_SAMPLER_VIEW; | |||
| tex = screen->resource_create(screen, &templ); | |||
| @@ -279,7 +279,7 @@ static void draw_polygon(struct vg_context *ctx, | |||
| poly->vbuf= pipe_user_buffer_create(poly->screen, | |||
| poly->data, | |||
| vert_size, | |||
| PIPE_BUFFER_USAGE_VERTEX); | |||
| PIPE_BIND_VERTEX_BUFFER); | |||
| poly->dirty = VG_FALSE; | |||
| } | |||