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r600g: Use hardware sqrt instruction

Piglit quick tests including sqrt pass, no other regressions,
tested on radeon 6670.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
tags/10.3-branchpoint
Glenn Kennard 11 years ago
parent
commit
2fa6d659c3
2 changed files with 4 additions and 7 deletions
  1. 1
    1
      src/gallium/drivers/r600/r600_pipe.c
  2. 3
    6
      src/gallium/drivers/r600/r600_shader.c

+ 1
- 1
src/gallium/drivers/r600/r600_pipe.c View File

case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
return 1; return 1;
case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
return 0;
return 1;
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:

+ 3
- 6
src/gallium/drivers/r600/r600_shader.c View File

{TGSI_OPCODE_SUB, 0, ALU_OP2_ADD, tgsi_op2}, {TGSI_OPCODE_SUB, 0, ALU_OP2_ADD, tgsi_op2},
{TGSI_OPCODE_LRP, 0, ALU_OP0_NOP, tgsi_lrp}, {TGSI_OPCODE_LRP, 0, ALU_OP0_NOP, tgsi_lrp},
{TGSI_OPCODE_CND, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_CND, 0, ALU_OP0_NOP, tgsi_unsupported},
/* gap */
{20, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_SQRT, 0, ALU_OP1_SQRT_IEEE, tgsi_trans_srcx_replicate},
{TGSI_OPCODE_DP2A, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_DP2A, 0, ALU_OP0_NOP, tgsi_unsupported},
/* gap */ /* gap */
{22, 0, ALU_OP0_NOP, tgsi_unsupported}, {22, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_SUB, 0, ALU_OP2_ADD, tgsi_op2}, {TGSI_OPCODE_SUB, 0, ALU_OP2_ADD, tgsi_op2},
{TGSI_OPCODE_LRP, 0, ALU_OP0_NOP, tgsi_lrp}, {TGSI_OPCODE_LRP, 0, ALU_OP0_NOP, tgsi_lrp},
{TGSI_OPCODE_CND, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_CND, 0, ALU_OP0_NOP, tgsi_unsupported},
/* gap */
{20, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_SQRT, 0, ALU_OP1_SQRT_IEEE, tgsi_trans_srcx_replicate},
{TGSI_OPCODE_DP2A, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_DP2A, 0, ALU_OP0_NOP, tgsi_unsupported},
/* gap */ /* gap */
{22, 0, ALU_OP0_NOP, tgsi_unsupported}, {22, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_SUB, 0, ALU_OP2_ADD, tgsi_op2}, {TGSI_OPCODE_SUB, 0, ALU_OP2_ADD, tgsi_op2},
{TGSI_OPCODE_LRP, 0, ALU_OP0_NOP, tgsi_lrp}, {TGSI_OPCODE_LRP, 0, ALU_OP0_NOP, tgsi_lrp},
{TGSI_OPCODE_CND, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_CND, 0, ALU_OP0_NOP, tgsi_unsupported},
/* gap */
{20, 0, ALU_OP0_NOP, tgsi_unsupported},
{TGSI_OPCODE_SQRT, 0, ALU_OP1_SQRT_IEEE, cayman_emit_float_instr},
{TGSI_OPCODE_DP2A, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_DP2A, 0, ALU_OP0_NOP, tgsi_unsupported},
/* gap */ /* gap */
{22, 0, ALU_OP0_NOP, tgsi_unsupported}, {22, 0, ALU_OP0_NOP, tgsi_unsupported},

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