|
|
@@ -27,64 +27,23 @@ static boolean radeon_r300_add_buffer(struct r300_winsys* winsys, |
|
|
|
uint32_t rd, |
|
|
|
uint32_t wd) |
|
|
|
{ |
|
|
|
int i; |
|
|
|
struct radeon_winsys_priv* priv = |
|
|
|
(struct radeon_winsys_priv*)winsys->radeon_winsys; |
|
|
|
struct radeon_cs_space_check* sc = priv->sc; |
|
|
|
struct radeon_bo* bo = ((struct radeon_pipe_buffer*)pbuffer)->bo; |
|
|
|
|
|
|
|
/* Check to see if this BO is already in line for validation; |
|
|
|
* find a slot for it otherwise. */ |
|
|
|
for (i = 0; i < priv->bo_count; i++) { |
|
|
|
if (sc[i].bo == bo) { |
|
|
|
sc[i].read_domains |= rd; |
|
|
|
sc[i].write_domain |= wd; |
|
|
|
return TRUE; |
|
|
|
} |
|
|
|
} |
|
|
|
|
|
|
|
if (priv->bo_count >= RADEON_MAX_BOS) { |
|
|
|
/* Dohoho. Not falling for that one again. Request a flush. */ |
|
|
|
return FALSE; |
|
|
|
} |
|
|
|
|
|
|
|
sc[priv->bo_count].bo = bo; |
|
|
|
sc[priv->bo_count].read_domains = rd; |
|
|
|
sc[priv->bo_count].write_domain = wd; |
|
|
|
priv->bo_count++; |
|
|
|
|
|
|
|
radeon_cs_space_add_persistent_bo(priv->cs, bo, rd, wd); |
|
|
|
return TRUE; |
|
|
|
} |
|
|
|
|
|
|
|
static boolean radeon_r300_validate(struct r300_winsys* winsys) |
|
|
|
{ |
|
|
|
int retval, i; |
|
|
|
struct radeon_winsys_priv* priv = |
|
|
|
(struct radeon_winsys_priv*)winsys->radeon_winsys; |
|
|
|
struct radeon_cs_space_check* sc = priv->sc; |
|
|
|
|
|
|
|
retval = radeon_cs_space_check(priv->cs, sc, priv->bo_count); |
|
|
|
|
|
|
|
if (retval == RADEON_CS_SPACE_OP_TO_BIG) { |
|
|
|
/* We might as well HCF, since this is not going to fit in the card, |
|
|
|
* period. */ |
|
|
|
/* XXX just drop it on the floor instead */ |
|
|
|
exit(1); |
|
|
|
} else if (retval == RADEON_CS_SPACE_FLUSH) { |
|
|
|
/* We must flush before more rendering can commence. */ |
|
|
|
if (radeon_cs_space_check(priv->cs) < 0) { |
|
|
|
return TRUE; |
|
|
|
} |
|
|
|
|
|
|
|
/* XXX should probably be its own function */ |
|
|
|
for (i = 0; i < priv->bo_count; i++) { |
|
|
|
if (sc[i].read_domains && sc[i].write_domain) { |
|
|
|
/* Cute, cute. We need to flush first. */ |
|
|
|
debug_printf("radeon: BO %p can't be read and written; " |
|
|
|
"requesting flush.\n", sc[i].bo); |
|
|
|
return TRUE; |
|
|
|
} |
|
|
|
} |
|
|
|
|
|
|
|
/* Things are fine, we can proceed as normal. */ |
|
|
|
return FALSE; |
|
|
|
} |
|
|
@@ -151,8 +110,7 @@ static void radeon_r300_flush_cs(struct r300_winsys* winsys) |
|
|
|
{ |
|
|
|
struct radeon_winsys_priv* priv = |
|
|
|
(struct radeon_winsys_priv*)winsys->radeon_winsys; |
|
|
|
struct radeon_cs_space_check* sc = priv->sc; |
|
|
|
int retval = 1; |
|
|
|
int retval; |
|
|
|
|
|
|
|
/* Emit the CS. */ |
|
|
|
retval = radeon_cs_emit(priv->cs); |
|
|
@@ -163,8 +121,7 @@ static void radeon_r300_flush_cs(struct r300_winsys* winsys) |
|
|
|
radeon_cs_erase(priv->cs); |
|
|
|
|
|
|
|
/* Clean out BOs. */ |
|
|
|
memset(sc, 0, sizeof(struct radeon_cs_space_check) * RADEON_MAX_BOS); |
|
|
|
priv->bo_count = 0; |
|
|
|
radeon_cs_space_reset_bos(priv->cs); |
|
|
|
} |
|
|
|
|
|
|
|
/* Helper function to do the ioctls needed for setup and init. */ |