ac/nir: init full exec mask for merged shaders.

Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Dave Airlie <airlied@redhat.com>

src/amd/common/ac_llvm_build.c

@@ -1734,3 +1734,11 @@ void ac_optimize_vs_outputs(struct ac_llvm_context *ctx,
 		*num_param_exports = exports.num;
 	}
 }
+
+void ac_init_exec_full_mask(struct ac_llvm_context *ctx)
+{
+	LLVMValueRef full_mask = LLVMConstInt(ctx->i64, ~0ull, 0);
+	ac_build_intrinsic(ctx,
+			   "llvm.amdgcn.init.exec", ctx->voidt,
+			   &full_mask, 1, AC_FUNC_ATTR_CONVERGENT);
+}

src/amd/common/ac_llvm_build.h

@@ -281,6 +281,7 @@ void ac_optimize_vs_outputs(struct ac_llvm_context *ac,
 			    uint8_t *vs_output_param_offset,
 			    uint32_t num_outputs,
 			    uint8_t *num_param_exports);
+void ac_init_exec_full_mask(struct ac_llvm_context *ctx);
 #ifdef __cplusplus
 }
 #endif

src/amd/common/ac_nir_to_llvm.c

@@ -6488,6 +6488,9 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
 	ctx.abi.load_ssbo = radv_load_ssbo;
 	ctx.abi.load_sampler_desc = radv_get_sampler_desc;
 
+	if (shader_count >= 2)
+		ac_init_exec_full_mask(&ctx.ac);
+
 	if (ctx.ac.chip_class == GFX9 &&
 	    shaders[shader_count - 1]->stage == MESA_SHADER_TESS_CTRL)
 		ac_nir_fixup_ls_hs_input_vgprs(&ctx);