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radv: Only allow 16 user SGPRs for compute on GFX9+.

Apparently for compute there are only 16 instead of the 32 for the
graphics path.

Fixes dEQP-VK.binding_model.descriptorset_random.sets16.noarray.ubolimitlow.sbolimitlow.imglimitlow.noiub.comp.0

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
tags/18.3-branchpoint
Bas Nieuwenhuizen 7 years ago
parent
commit
0dd8189f15
1 changed files with 1 additions and 1 deletions
  1. 1
    1
      src/amd/vulkan/radv_nir_to_llvm.c

+ 1
- 1
src/amd/vulkan/radv_nir_to_llvm.c View File

@@ -689,7 +689,7 @@ static void allocate_user_sgprs(struct radv_shader_context *ctx,
if (ctx->shader_info->info.loads_push_constants)
user_sgpr_count += HAVE_32BIT_POINTERS ? 1 : 2;

uint32_t available_sgprs = ctx->options->chip_class >= GFX9 ? 32 : 16;
uint32_t available_sgprs = ctx->options->chip_class >= GFX9 && stage != MESA_SHADER_COMPUTE ? 32 : 16;
uint32_t remaining_sgprs = available_sgprs - user_sgpr_count;
uint32_t num_desc_set =
util_bitcount(ctx->shader_info->info.desc_set_used_mask);

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