This will be used in 3DSTATE_DEPTH_BUFFER in a later patch. Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Paul Berry <stereotype441@gmail.com>undefined
@@ -666,6 +666,7 @@ gen7_blorp_emit_depth_stencil_config(struct brw_context *brw, | |||
uint32_t surftype; | |||
unsigned int depth = MAX2(params->depth.mt->logical_depth0, 1); | |||
GLenum gl_target = params->depth.mt->target; | |||
unsigned int lod; | |||
brw_get_depthstencil_tile_masks(params->depth.mt, | |||
params->depth.level, | |||
@@ -688,6 +689,8 @@ gen7_blorp_emit_depth_stencil_config(struct brw_context *brw, | |||
break; | |||
} | |||
lod = params->depth.level - params->depth.mt->first_level; | |||
/* 3DSTATE_DEPTH_BUFFER */ | |||
{ | |||
uint32_t tile_x = draw_x & tile_mask_x; |
@@ -46,6 +46,7 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw, | |||
uint32_t surftype; | |||
unsigned int depth = 1; | |||
GLenum gl_target = GL_TEXTURE_2D; | |||
unsigned int lod; | |||
const struct intel_renderbuffer *irb = NULL; | |||
const struct gl_renderbuffer *rb = NULL; | |||
@@ -78,6 +79,8 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw, | |||
break; | |||
} | |||
lod = irb ? irb->mt_level - irb->mt->first_level : 0; | |||
/* _NEW_DEPTH, _NEW_STENCIL, _NEW_BUFFERS */ | |||
BEGIN_BATCH(7); | |||
OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER << 16 | (7 - 2)); |